1 | /* z8536.h |
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2 | * |
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3 | * This include file defines information related to a Zilog Z8536 |
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4 | * Counter/Timer/IO Chip. It is a IO mapped part. |
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5 | * |
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6 | * Input parameters: NONE |
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7 | * |
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8 | * Output parameters: NONE |
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9 | * |
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10 | * NOTE: This file shares as much as possible with the include |
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11 | * file for the Z8036 via z8x36.h. |
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12 | * |
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13 | * COPYRIGHT (c) 1989-1997. |
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14 | * On-Line Applications Research Corporation (OAR). |
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15 | * Copyright assigned to U.S. Government, 1994. |
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16 | * |
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17 | * The license and distribution terms for this file may in |
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18 | * the file LICENSE in this distribution or at |
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19 | * http://www.OARcorp.com/rtems/license.html. |
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20 | * |
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21 | * $Id$ |
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22 | */ |
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23 | |
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24 | #ifndef __Z8536_h |
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25 | #define __Z8536_h |
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26 | |
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27 | #ifdef __cplusplus |
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28 | extern "C" { |
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29 | #endif |
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30 | |
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31 | /* macros */ |
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32 | |
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33 | #define VOL8( ptr ) ((volatile rtems_unsigned8 *)(ptr)) |
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34 | |
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35 | #define Z8x36_STATE0 ( z8536 ) \ |
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36 | { char *garbage; \ |
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37 | (garbage) = *(VOL8(z8536+0xC)) \ |
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38 | } |
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39 | |
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40 | #define Z8x36_WRITE( z8536, reg, data ) \ |
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41 | *(VOL8(z8536+0xC)) = (reg); \ |
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42 | *(VOL8(z8536+0xC)) = (data) |
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43 | |
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44 | #define Z8x36_READ( z8536, reg, data ) \ |
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45 | *(VOL8(z8536+0xC)) = (reg); \ |
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46 | (data) = *(VOL8(z8536+0xC)) |
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47 | |
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48 | /* structures */ |
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49 | |
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50 | /* MAIN CONTROL REGISTERS (0x00-0x07) */ |
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51 | #define MASTER_INTR 0x00 /* Master Interrupt Ctl Reg */ |
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52 | #define MASTER_CFG 0x01 /* Master Configuration Ctl Reg */ |
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53 | #define PORTA_VECTOR 0x02 /* Port A - Interrupt Vector */ |
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54 | #define PORTB_VECTOR 0x03 /* Port B - Interrupt Vector */ |
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55 | #define CNT_TMR_VECTOR 0x04 /* Counter/Timer Interrupt Vector */ |
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56 | #define PORTC_DATA_POLARITY 0x05 /* Port C - Data Path Polarity */ |
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57 | #define PORTC_DIRECTION 0x06 /* Port C - Data Direction */ |
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58 | #define PORTC_SPECIAL_IO_CTL 0x07 /* Port C - Special IO Control */ |
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59 | |
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60 | /* MOST OFTEN ACCESSED REGISTERS (0x08 - 0x0f) */ |
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61 | #define PORTA_CMD_STATUS 0x08 /* Port A - Command Status Reg */ |
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62 | #define PORTB_CMD_STATUS 0x09 /* Port B - Command Status Reg */ |
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63 | #define CT1_CMD_STATUS 0x0a /* Ctr/Timer 1 - Command Status Reg */ |
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64 | #define CT2_CMD_STATUS 0x0b /* Ctr/Timer 2 - Command Status Reg */ |
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65 | #define CT3_CMD_STATUS 0x0c /* Ctr/Timer 3 - Command Status Reg */ |
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66 | #define PORTA_DATA 0x0d /* Port A - Data */ |
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67 | #define PORTB_DATA 0x0e /* Port B - Data */ |
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68 | #define PORTC_DATA 0x0f /* Port C - Data */ |
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69 | |
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70 | /* COUNTER/TIMER RELATED REGISTERS (0x10-0x1f) */ |
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71 | #define CT1_CUR_CNT_MSB 0x10 /* Ctr/Timer 1 - Current Count (MSB) */ |
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72 | #define CT1_CUR_CNT_LSB 0x11 /* Ctr/Timer 1 - Current Count (LSB) */ |
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73 | #define CT2_CUR_CNT_MSB 0x12 /* Ctr/Timer 2 - Current Count (MSB) */ |
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74 | #define CT2_CUR_CNT_LSB 0x13 /* Ctr/Timer 2 - Current Count (LSB) */ |
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75 | #define CT3_CUR_CNT_MSB 0x14 /* Ctr/Timer 3 - Current Count (MSB) */ |
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76 | #define CT3_CUR_CNT_LSB 0x15 /* Ctr/Timer 3 - Current Count (LSB) */ |
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77 | #define CT1_TIME_CONST_MSB 0x16 /* Ctr/Timer 1 - Time Constant (MSB) */ |
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78 | #define CT1_TIME_CONST_LSB 0x17 /* Ctr/Timer 1 - Time Constant (LSB) */ |
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79 | #define CT2_TIME_CONST_MSB 0x18 /* Ctr/Timer 2 - Time Constant (MSB) */ |
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80 | #define CT2_TIME_CONST_LSB 0x19 /* Ctr/Timer 2 - Time Constant (LSB) */ |
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81 | #define CT3_TIME_CONST_MSB 0x1a /* Ctr/Timer 3 - Time Constant (MSB) */ |
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82 | #define CT3_TIME_CONST_LSB 0x1b /* Ctr/Timer 3 - Time Constant (LSB) */ |
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83 | #define CT1_MODE_SPEC 0x1c /* Ctr/Timer 1 - Mode Specification */ |
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84 | #define CT2_MODE_SPEC 0x1d /* Ctr/Timer 2 - Mode Specification */ |
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85 | #define CT3_MODE_SPEC 0x1e /* Ctr/Timer 3 - Mode Specification */ |
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86 | #define CURRENT_VECTOR 0x1f /* Current Vector */ |
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87 | |
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88 | /* PORT A SPECIFICATION REGISTERS (0x20 -0x27) */ |
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89 | #define PORTA_MODE 0x20 /* Port A - Mode Specification */ |
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90 | #define PORTA_HANDSHAKE 0x21 /* Port A - Handshake Specification */ |
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91 | #define PORTA_DATA_POLARITY 0x22 /* Port A - Data Path Polarity */ |
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92 | #define PORTA_DIRECTION 0x23 /* Port A - Data Direction */ |
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93 | #define PORTA_SPECIAL_IO_CTL 0x24 /* Port A - Special IO Control */ |
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94 | #define PORTA_PATT_POLARITY 0x25 /* Port A - Pattern Polarity */ |
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95 | #define PORTA_PATT_TRANS 0x26 /* Port A - Pattern Transition */ |
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96 | #define PORTA_PATT_MASK 0x27 /* Port A - Pattern Mask */ |
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97 | |
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98 | /* PORT B SPECIFICATION REGISTERS (0x28-0x2f) */ |
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99 | #define PORTB_MODE 0x28 /* Port B - Mode Specification */ |
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100 | #define PORTB_HANDSHAKE 0x29 /* Port B - Handshake Specification */ |
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101 | #define PORTB_DATA_POLARITY 0x2a /* Port B - Data Path Polarity */ |
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102 | #define PORTB_DIRECTION 0x2b /* Port B - Data Direction */ |
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103 | #define PORTB_SPECIAL_IO_CTL 0x2c /* Port B - Special IO Control */ |
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104 | #define PORTB_PATT_POLARITY 0x2d /* Port B - Pattern Polarity */ |
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105 | #define PORTB_PATT_TRANS 0x2e /* Port B - Pattern Transition */ |
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106 | #define PORTB_PATT_MASK 0x2f /* Port B - Pattern Mask */ |
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107 | |
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108 | #ifdef __cplusplus |
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109 | } |
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110 | #endif |
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111 | |
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112 | #endif |
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