source: rtems/c/src/aclocal/rtems-cpu-subdirs.m4 @ 11ff3a9

Last change on this file since 11ff3a9 was 11ff3a9, checked in by Hesham Almatary <heshamelmatary@…>, on Oct 27, 2017 at 4:18:40 AM

cpukit: RISC-V - make riscv32 code work for riscv64 - v2

  • Use #ifdefs for 32/64 bit code
  • Use unsigned long which is 32-bit on riscv32 and 64-bit on riscv64 (register size)
  • Move the code to a new shared riscv folder to be shared between riscv32 and riscv64
  • Rename RTEMS_CPU extracted from command line to shared riscv target s/riscv*/riscv

Update #3109

  • Property mode set to 100644
File size: 971 bytes
Line 
1AC_DEFUN([_RTEMS_CPU_SUBDIR],
2[
3$1 )    if test -d ${srcdir}/ifelse([$2],,[$1],[$2/$1]) ; then
4  AC_CONFIG_SUBDIRS(ifelse([$2],,[$1],[$2/$1]))
5  fi
6])
7
8## RTEMS_CPU_SUBDIRS([PREFIX])
9AC_DEFUN([RTEMS_CPU_SUBDIRS],
10[
11## EDIT: If adding a new cpu to RTEMS, add it to the case block below.
12case $RTEMS_CPU in
13_RTEMS_CPU_SUBDIR([arm],[$1]);;
14_RTEMS_CPU_SUBDIR([bfin],[$1]);;
15_RTEMS_CPU_SUBDIR([epiphany],[$1]);;
16_RTEMS_CPU_SUBDIR([i386],[$1]);;
17_RTEMS_CPU_SUBDIR([lm32],[$1]);;
18_RTEMS_CPU_SUBDIR([m32c],[$1]);;
19_RTEMS_CPU_SUBDIR([m68k],[$1]);;
20_RTEMS_CPU_SUBDIR([mips],[$1]);;
21_RTEMS_CPU_SUBDIR([moxie],[$1]);;
22_RTEMS_CPU_SUBDIR([nios2],[$1]);;
23_RTEMS_CPU_SUBDIR([no_cpu],[$1]);;
24_RTEMS_CPU_SUBDIR([or1k],[$1]);;
25_RTEMS_CPU_SUBDIR([powerpc],[$1]);;
26_RTEMS_CPU_SUBDIR([riscv],[$1]);;
27_RTEMS_CPU_SUBDIR([sh],[$1]);;
28_RTEMS_CPU_SUBDIR([sparc],[$1]);;
29_RTEMS_CPU_SUBDIR([sparc64],[$1]);;
30_RTEMS_CPU_SUBDIR([v850],[$1]);;
31*) AC_MSG_ERROR([Invalid RTEMS_CPU <[$]{RTEMS_CPU}>])
32esac
33])
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