1 | /* GR-701 PCI Target driver. |
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2 | * |
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3 | * COPYRIGHT (c) 2008. |
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4 | * Cobham Gaisler AB. |
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5 | * |
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6 | * Configures the GR-701 interface PCI board. |
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7 | * This driver provides a AMBA PnP bus by using the general part |
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8 | * of the AMBA PnP bus driver (ambapp_bus.c). |
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9 | * |
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10 | * Driver resources for the AMBA PnP bus provided can be set using |
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11 | * gr701_set_resources(). |
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12 | * |
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13 | * The license and distribution terms for this file may be |
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14 | * found in found in the file LICENSE in this distribution or at |
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15 | * http://www.rtems.org/license/LICENSE. |
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16 | */ |
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17 | |
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18 | #include <inttypes.h> |
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19 | #include <stdio.h> |
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20 | #include <stdlib.h> |
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21 | #include <string.h> |
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22 | #include <sys/types.h> |
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23 | #include <sys/stat.h> |
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24 | |
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25 | #include <bsp.h> |
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26 | #include <rtems/bspIo.h> |
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27 | #include <pci.h> |
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28 | #include <pci/access.h> |
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29 | |
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30 | #include <ambapp.h> |
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31 | |
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32 | #include <ambapp.h> |
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33 | #include <drvmgr/drvmgr.h> |
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34 | #include <drvmgr/ambapp_bus.h> |
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35 | #include <drvmgr/pci_bus.h> |
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36 | #include <drvmgr/bspcommon.h> |
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37 | #include <bsp/genirq.h> |
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38 | |
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39 | #include <bsp/gr_701.h> |
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40 | |
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41 | #include <grlib_impl.h> |
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42 | |
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43 | /* Offset from 0x80000000 (dual bus version) */ |
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44 | #define AHB1_BASE_ADDR 0x80000000 |
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45 | #define AHB1_IOAREA_BASE_ADDR 0x80100000 |
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46 | |
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47 | /* #define DEBUG 1 */ |
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48 | |
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49 | #ifdef DEBUG |
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50 | #define DBG(x...) printk(x) |
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51 | #else |
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52 | #define DBG(x...) |
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53 | #endif |
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54 | |
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55 | int gr701_init1(struct drvmgr_dev *dev); |
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56 | int gr701_init2(struct drvmgr_dev *dev); |
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57 | void gr701_interrupt(void *arg); |
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58 | |
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59 | #define READ_REG(address) (*(volatile unsigned int *)address) |
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60 | |
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61 | /* PCI bride reg layout on AMBA side */ |
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62 | struct amba_bridge_regs { |
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63 | volatile unsigned int bar0; |
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64 | volatile unsigned int bar1; |
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65 | volatile unsigned int bar2; |
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66 | volatile unsigned int bar3; |
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67 | volatile unsigned int bar4;/* 0x10 */ |
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68 | |
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69 | volatile unsigned int unused[4*3-1]; |
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70 | |
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71 | volatile unsigned int ambabars[1]; /* 0x40 */ |
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72 | }; |
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73 | |
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74 | /* PCI bride reg layout on PCI side */ |
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75 | struct pci_bridge_regs { |
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76 | volatile unsigned int bar0; |
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77 | volatile unsigned int bar1; |
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78 | volatile unsigned int bar2; |
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79 | volatile unsigned int bar3; |
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80 | volatile unsigned int bar4; /* 0x10 */ |
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81 | |
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82 | volatile unsigned int ilevel; |
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83 | volatile unsigned int ipend; |
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84 | volatile unsigned int iforce; |
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85 | volatile unsigned int istatus; |
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86 | volatile unsigned int iclear; |
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87 | volatile unsigned int imask; |
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88 | }; |
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89 | |
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90 | /* Private data structure for driver */ |
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91 | struct gr701_priv { |
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92 | /* Driver management */ |
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93 | struct drvmgr_dev *dev; |
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94 | char prefix[16]; |
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95 | SPIN_DECLARE(devlock); |
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96 | |
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97 | struct pci_bridge_regs *pcib; |
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98 | struct amba_bridge_regs *ambab; |
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99 | |
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100 | /* PCI */ |
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101 | pci_dev_t pcidev; |
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102 | struct pci_dev_info *devinfo; |
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103 | |
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104 | /* IRQ */ |
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105 | genirq_t genirq; |
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106 | int interrupt_cnt; |
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107 | |
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108 | /* GR-701 Address translation */ |
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109 | struct drvmgr_map_entry bus_maps_up[2]; |
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110 | struct drvmgr_map_entry bus_maps_down[2]; |
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111 | |
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112 | /* AMBA Plug&Play information on GR-701 */ |
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113 | struct ambapp_bus abus; |
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114 | struct ambapp_mmap amba_maps[3]; |
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115 | struct ambapp_config config; |
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116 | }; |
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117 | |
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118 | int ambapp_gr701_int_register( |
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119 | struct drvmgr_dev *dev, |
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120 | int irq, |
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121 | const char *info, |
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122 | drvmgr_isr handler, |
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123 | void *arg); |
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124 | int ambapp_gr701_int_unregister( |
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125 | struct drvmgr_dev *dev, |
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126 | int irq, |
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127 | drvmgr_isr isr, |
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128 | void *arg); |
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129 | int ambapp_gr701_int_unmask( |
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130 | struct drvmgr_dev *dev, |
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131 | int irq); |
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132 | int ambapp_gr701_int_mask( |
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133 | struct drvmgr_dev *dev, |
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134 | int irq); |
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135 | int ambapp_gr701_int_clear( |
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136 | struct drvmgr_dev *dev, |
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137 | int irq); |
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138 | int ambapp_gr701_get_params( |
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139 | struct drvmgr_dev *dev, |
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140 | struct drvmgr_bus_params *params); |
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141 | |
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142 | struct ambapp_ops ambapp_gr701_ops = { |
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143 | .int_register = ambapp_gr701_int_register, |
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144 | .int_unregister = ambapp_gr701_int_unregister, |
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145 | .int_unmask = ambapp_gr701_int_unmask, |
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146 | .int_mask = ambapp_gr701_int_mask, |
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147 | .int_clear = ambapp_gr701_int_clear, |
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148 | .get_params = ambapp_gr701_get_params |
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149 | }; |
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150 | |
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151 | struct drvmgr_drv_ops gr701_ops = |
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152 | { |
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153 | .init = {gr701_init1, gr701_init2, NULL, NULL}, |
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154 | .remove = NULL, |
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155 | .info = NULL |
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156 | }; |
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157 | |
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158 | struct pci_dev_id_match gr701_ids[] = |
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159 | { |
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160 | PCIID_DEVVEND(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_701), |
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161 | PCIID_END_TABLE /* Mark end of table */ |
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162 | }; |
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163 | |
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164 | struct pci_drv_info gr701_info = |
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165 | { |
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166 | { |
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167 | DRVMGR_OBJ_DRV, /* Driver */ |
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168 | NULL, /* Next driver */ |
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169 | NULL, /* Device list */ |
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170 | DRIVER_PCI_GAISLER_GR701_ID, /* Driver ID */ |
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171 | "GR-701_DRV", /* Driver Name */ |
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172 | DRVMGR_BUS_TYPE_PCI, /* Bus Type */ |
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173 | &gr701_ops, |
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174 | NULL, /* Funcs */ |
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175 | 0, /* No devices yet */ |
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176 | 0, |
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177 | }, |
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178 | &gr701_ids[0] |
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179 | }; |
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180 | |
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181 | /* Driver resources configuration for the AMBA bus on the GR-701 board. |
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182 | * It is declared weak so that the user may override it from the project file, |
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183 | * if the default settings are not enough. |
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184 | * |
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185 | * The configuration consists of an array of configuration pointers, each |
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186 | * pointer determine the configuration of one GR-701 board. Pointer |
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187 | * zero is for board0, pointer 1 for board1 and so on. |
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188 | * |
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189 | * The array must end with a NULL pointer. |
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190 | */ |
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191 | struct drvmgr_bus_res *gr701_resources[] __attribute__((weak)) = |
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192 | { |
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193 | NULL |
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194 | }; |
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195 | |
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196 | void gr701_register_drv(void) |
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197 | { |
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198 | DBG("Registering GR-701 PCI driver\n"); |
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199 | drvmgr_drv_register(&gr701_info.general); |
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200 | } |
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201 | |
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202 | void gr701_interrupt(void *arg) |
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203 | { |
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204 | struct gr701_priv *priv = arg; |
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205 | unsigned int status; |
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206 | int irq = 0; |
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207 | SPIN_ISR_IRQFLAGS(irqflags); |
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208 | |
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209 | SPIN_LOCK(&priv->devlock, irqflags); |
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210 | while ( (status=priv->pcib->istatus) != 0 ) { |
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211 | priv->interrupt_cnt++; /* An interrupt was generated */ |
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212 | irq = status; |
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213 | genirq_doirq(priv->genirq, irq); |
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214 | /* ACK interrupt */ |
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215 | priv->pcib->istatus = 0; |
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216 | } |
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217 | SPIN_UNLOCK(&priv->devlock, irqflags); |
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218 | |
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219 | /* ACK interrupt, this is because PCI is Level, so the IRQ Controller still drives the IRQ. */ |
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220 | if ( irq ) |
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221 | drvmgr_interrupt_clear(priv->dev, 0); |
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222 | } |
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223 | |
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224 | static int gr701_hw_init(struct gr701_priv *priv) |
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225 | { |
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226 | uint32_t com1; |
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227 | struct pci_bridge_regs *pcib; |
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228 | struct amba_bridge_regs *ambab; |
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229 | int mst; |
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230 | unsigned int pci_freq_hz; |
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231 | pci_dev_t pcidev = priv->pcidev; |
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232 | struct pci_dev_info *devinfo = priv->devinfo; |
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233 | |
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234 | /* Set up PCI ==> AMBA */ |
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235 | priv->pcib = pcib = (void *)devinfo->resources[0].address; |
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236 | pcib->bar0 = 0xfc000000; |
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237 | |
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238 | /* Set up GR701 AMBA Masters connection to PCI */ |
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239 | priv->ambab = ambab = (struct amba_bridge_regs *)( |
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240 | devinfo->resources[1].address + 0x400); |
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241 | |
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242 | /* Init all msters, max 16 */ |
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243 | for (mst=0; mst<16; mst++) { |
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244 | ambab->ambabars[mst] = 0x40000000; |
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245 | if (READ_REG(&ambab->ambabars[mst]) != 0x40000000) |
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246 | break; |
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247 | } |
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248 | |
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249 | /* Setup Address translation for AMBA bus, assume that PCI BAR |
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250 | * are mapped 1:1 to CPU. |
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251 | */ |
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252 | |
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253 | priv->amba_maps[0].size = 0x04000000; |
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254 | priv->amba_maps[0].local_adr = devinfo->resources[1].address; |
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255 | priv->amba_maps[0].remote_adr = 0xfc000000; |
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256 | |
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257 | /* Mark end of table */ |
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258 | priv->amba_maps[1].size=0; |
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259 | priv->amba_maps[1].local_adr = 0; |
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260 | priv->amba_maps[1].remote_adr = 0; |
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261 | |
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262 | /* Setup DOWN-streams address translation */ |
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263 | priv->bus_maps_down[0].name = "PCI BAR1 -> AMBA"; |
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264 | priv->bus_maps_down[0].size = priv->amba_maps[0].size; |
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265 | priv->bus_maps_down[0].from_adr = (void *)devinfo->resources[1].address; |
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266 | priv->bus_maps_down[0].to_adr = (void *)0xfc000000; |
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267 | |
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268 | /* Setup UP-streams address translation */ |
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269 | priv->bus_maps_up[0].name = "AMBA PCIF Window"; |
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270 | priv->bus_maps_up[0].size = 0x10000000; |
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271 | priv->bus_maps_up[0].from_adr = (void *)0xe0000000; |
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272 | priv->bus_maps_up[0].to_adr = (void *)0x40000000; |
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273 | |
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274 | /* Mark end of translation tables */ |
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275 | priv->bus_maps_down[1].size = 0; |
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276 | priv->bus_maps_up[1].size = 0; |
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277 | |
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278 | /* Enable I/O and Mem accesses */ |
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279 | pci_cfg_r32(pcidev, PCIR_COMMAND, &com1); |
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280 | com1 |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN; |
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281 | pci_cfg_w32(pcidev, PCIR_COMMAND, com1); |
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282 | |
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283 | /* Start AMBA PnP scan at first AHB bus */ |
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284 | ambapp_scan(&priv->abus, devinfo->resources[1].address + 0x3f00000, |
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285 | NULL, &priv->amba_maps[0]); |
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286 | |
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287 | /* Frequency is the same as the PCI bus frequency */ |
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288 | drvmgr_freq_get(priv->dev, 0, &pci_freq_hz); |
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289 | |
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290 | /* Initialize Frequency of AMBA bus */ |
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291 | ambapp_freq_init(&priv->abus, NULL, pci_freq_hz); |
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292 | |
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293 | /* Init IRQ controller (avoid IRQ generation) */ |
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294 | pcib->imask = 0x0000; |
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295 | pcib->ipend = 0; |
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296 | pcib->iclear = 0xffff; |
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297 | pcib->iforce = 0; |
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298 | pcib->ilevel = 0x0; |
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299 | |
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300 | /* Successfully registered the GR-701 board */ |
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301 | return 0; |
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302 | } |
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303 | |
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304 | static void gr701_hw_init2(struct gr701_priv *priv) |
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305 | { |
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306 | /* Enable PCI Master (for DMA) */ |
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307 | pci_master_enable(priv->pcidev); |
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308 | } |
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309 | |
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310 | /* Called when a PCI target is found with the PCI device and vendor ID |
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311 | * given in gr701_ids[]. |
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312 | */ |
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313 | int gr701_init1(struct drvmgr_dev *dev) |
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314 | { |
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315 | struct gr701_priv *priv; |
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316 | struct pci_dev_info *devinfo; |
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317 | uint32_t bar0, bar1, bar0_size, bar1_size; |
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318 | int resources_cnt; |
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319 | |
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320 | priv = grlib_calloc(1, sizeof(*priv)); |
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321 | if ( !priv ) |
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322 | return DRVMGR_NOMEM; |
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323 | |
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324 | dev->priv = priv; |
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325 | priv->dev = dev; |
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326 | |
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327 | /* Determine number of configurations */ |
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328 | resources_cnt = get_resarray_count(gr701_resources); |
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329 | |
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330 | /* Generate Device prefix */ |
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331 | strcpy(priv->prefix, "/dev/gr701_0"); |
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332 | priv->prefix[11] += dev->minor_drv; |
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333 | mkdir(priv->prefix, S_IRWXU | S_IRWXG | S_IRWXO); |
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334 | priv->prefix[12] = '/'; |
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335 | priv->prefix[13] = '\0'; |
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336 | |
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337 | priv->devinfo = devinfo = (struct pci_dev_info *)dev->businfo; |
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338 | priv->pcidev = devinfo->pcidev; |
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339 | bar0 = devinfo->resources[0].address; |
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340 | bar0_size = devinfo->resources[0].size; |
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341 | bar1 = devinfo->resources[1].address; |
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342 | bar1_size = devinfo->resources[1].size; |
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343 | printk("\n\n--- GR-701[%d] ---\n", dev->minor_drv); |
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344 | printk(" PCI BUS: 0x%x, SLOT: 0x%x, FUNCTION: 0x%x\n", |
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345 | PCI_DEV_EXPAND(priv->pcidev)); |
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346 | printk(" PCI VENDOR: 0x%04x, DEVICE: 0x%04x\n\n\n", |
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347 | devinfo->id.vendor, devinfo->id.device); |
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348 | printk(" PCI BAR[0]: 0x%" PRIx32 " - 0x%" PRIx32 "\n", |
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349 | bar0, bar0 + bar0_size - 1); |
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350 | printk(" PCI BAR[1]: 0x%" PRIx32 " - 0x%" PRIx32 "\n", |
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351 | bar1, bar1 + bar1_size - 1); |
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352 | printk(" IRQ: %d\n\n\n", devinfo->irq); |
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353 | |
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354 | /* all neccessary space assigned to GR-701 target? */ |
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355 | if ((bar0_size == 0) || (bar1_size == 0)) |
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356 | return DRVMGR_ENORES; |
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357 | |
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358 | /* Initialize spin-lock for this PCI perihperal device. This is to |
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359 | * protect the Interrupt Controller Registers. The genirq layer is |
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360 | * protecting its own internals and ISR dispatching. |
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361 | */ |
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362 | SPIN_INIT(&priv->devlock, priv->prefix); |
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363 | |
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364 | priv->genirq = genirq_init(16); |
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365 | if ( priv->genirq == NULL ) { |
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366 | free(priv); |
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367 | dev->priv = NULL; |
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368 | return DRVMGR_FAIL; |
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369 | } |
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370 | |
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371 | if ( gr701_hw_init(priv) ) { |
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372 | genirq_destroy(priv->genirq); |
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373 | free(priv); |
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374 | dev->priv = NULL; |
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375 | printk(" Failed to initialize GR-701 HW\n"); |
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376 | return DRVMGR_FAIL; |
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377 | } |
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378 | |
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379 | /* Init amba bus */ |
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380 | priv->config.abus = &priv->abus; |
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381 | priv->config.ops = &ambapp_gr701_ops; |
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382 | priv->config.maps_up = &priv->bus_maps_up[0]; |
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383 | priv->config.maps_down = &priv->bus_maps_down[0]; |
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384 | if ( priv->dev->minor_drv < resources_cnt ) { |
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385 | priv->config.resources = gr701_resources[priv->dev->minor_drv]; |
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386 | } else { |
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387 | priv->config.resources = NULL; |
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388 | } |
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389 | |
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390 | /* Create and register AMBA PnP bus. */ |
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391 | return ambapp_bus_register(dev, &priv->config); |
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392 | } |
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393 | |
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394 | /* Called when a PCI target is found with the PCI device and vendor ID |
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395 | * given in gr701_ids[]. |
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396 | */ |
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397 | int gr701_init2(struct drvmgr_dev *dev) |
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398 | { |
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399 | struct gr701_priv *priv = dev->priv; |
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400 | |
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401 | /* Clear any old interrupt requests */ |
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402 | drvmgr_interrupt_clear(dev, 0); |
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403 | |
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404 | /* Enable System IRQ so that GR-701 PCI target interrupt goes through. |
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405 | * |
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406 | * It is important to enable it in stage init2. If interrupts were |
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407 | * enabled in init1 this might hang the system when more than one PCI |
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408 | * board is connected, this is because PCI interrupts might be shared |
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409 | * and PCI target 2 have not initialized and might therefore drive |
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410 | * interrupt already when entering init1(). |
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411 | */ |
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412 | drvmgr_interrupt_register(dev, 0, "gr701", gr701_interrupt, priv); |
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413 | |
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414 | gr701_hw_init2(priv); |
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415 | |
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416 | return DRVMGR_OK; |
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417 | } |
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418 | |
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419 | int ambapp_gr701_int_register( |
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420 | struct drvmgr_dev *dev, |
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421 | int irq, |
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422 | const char *info, |
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423 | drvmgr_isr handler, |
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424 | void *arg) |
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425 | { |
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426 | struct gr701_priv *priv = dev->parent->dev->priv; |
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427 | SPIN_IRQFLAGS(irqflags); |
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428 | int status; |
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429 | void *h; |
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430 | |
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431 | h = genirq_alloc_handler(handler, arg); |
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432 | if ( h == NULL ) |
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433 | return DRVMGR_FAIL; |
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434 | |
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435 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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436 | |
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437 | status = genirq_register(priv->genirq, irq, h); |
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438 | if ( status == 0 ) { |
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439 | /* Clear IRQ for first registered handler */ |
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440 | priv->pcib->iclear = (1<<irq); |
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441 | } else if ( status == 1 ) |
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442 | status = 0; |
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443 | |
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444 | if (status != 0) { |
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445 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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446 | genirq_free_handler(h); |
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447 | return DRVMGR_FAIL; |
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448 | } |
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449 | |
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450 | status = genirq_enable(priv->genirq, irq, handler, arg); |
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451 | if ( status == 0 ) { |
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452 | /* Enable IRQ for first enabled handler only */ |
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453 | priv->pcib->imask |= (1<<irq); /* unmask interrupt source */ |
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454 | } else if ( status == 1 ) |
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455 | status = DRVMGR_OK; |
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456 | |
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457 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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458 | |
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459 | return status; |
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460 | } |
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461 | |
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462 | int ambapp_gr701_int_unregister( |
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463 | struct drvmgr_dev *dev, |
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464 | int irq, |
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465 | drvmgr_isr isr, |
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466 | void *arg) |
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467 | { |
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468 | struct gr701_priv *priv = dev->parent->dev->priv; |
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469 | SPIN_IRQFLAGS(irqflags); |
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470 | int status; |
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471 | void *handler; |
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472 | |
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473 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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474 | |
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475 | status = genirq_disable(priv->genirq, irq, isr, arg); |
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476 | if ( status == 0 ) { |
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477 | /* Disable IRQ only when no enabled handler exists */ |
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478 | priv->pcib->imask &= ~(1<<irq); /* mask interrupt source */ |
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479 | } |
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480 | |
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481 | handler = genirq_unregister(priv->genirq, irq, isr, arg); |
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482 | if ( handler == NULL ) |
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483 | status = DRVMGR_FAIL; |
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484 | else |
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485 | status = DRVMGR_OK; |
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486 | |
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487 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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488 | |
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489 | if (handler) |
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490 | genirq_free_handler(handler); |
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491 | |
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492 | return status; |
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493 | } |
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494 | |
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495 | int ambapp_gr701_int_unmask( |
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496 | struct drvmgr_dev *dev, |
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497 | int irq) |
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498 | { |
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499 | struct gr701_priv *priv = dev->parent->dev->priv; |
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500 | SPIN_IRQFLAGS(irqflags); |
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501 | |
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502 | DBG("GR-701 IRQ %d: enable\n", irq); |
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503 | |
---|
504 | if ( genirq_check(priv->genirq, irq) ) |
---|
505 | return DRVMGR_FAIL; |
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506 | |
---|
507 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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508 | |
---|
509 | /* Enable IRQ */ |
---|
510 | priv->pcib->imask |= (1<<irq); /* unmask interrupt source */ |
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511 | |
---|
512 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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513 | |
---|
514 | return DRVMGR_OK; |
---|
515 | } |
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516 | |
---|
517 | int ambapp_gr701_int_mask( |
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518 | struct drvmgr_dev *dev, |
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519 | int irq) |
---|
520 | { |
---|
521 | struct gr701_priv *priv = dev->parent->dev->priv; |
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522 | SPIN_IRQFLAGS(irqflags); |
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523 | |
---|
524 | DBG("GR-701 IRQ %d: disable\n", irq); |
---|
525 | |
---|
526 | if ( genirq_check(priv->genirq, irq) ) |
---|
527 | return DRVMGR_FAIL; |
---|
528 | |
---|
529 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
---|
530 | |
---|
531 | /* Disable IRQ */ |
---|
532 | priv->pcib->imask &= ~(1<<irq); /* mask interrupt source */ |
---|
533 | |
---|
534 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
---|
535 | |
---|
536 | return DRVMGR_OK; |
---|
537 | } |
---|
538 | |
---|
539 | int ambapp_gr701_int_clear( |
---|
540 | struct drvmgr_dev *dev, |
---|
541 | int irq) |
---|
542 | { |
---|
543 | struct gr701_priv *priv = dev->parent->dev->priv; |
---|
544 | |
---|
545 | if ( genirq_check(priv->genirq, irq) ) |
---|
546 | return DRVMGR_FAIL; |
---|
547 | |
---|
548 | priv->pcib->iclear = (1<<irq); |
---|
549 | |
---|
550 | return DRVMGR_OK; |
---|
551 | } |
---|
552 | |
---|
553 | int ambapp_gr701_get_params(struct drvmgr_dev *dev, struct drvmgr_bus_params *params) |
---|
554 | { |
---|
555 | struct gr701_priv *priv = dev->parent->dev->priv; |
---|
556 | |
---|
557 | /* Device name prefix pointer, skip /dev */ |
---|
558 | params->dev_prefix = &priv->prefix[5]; |
---|
559 | |
---|
560 | return 0; |
---|
561 | } |
---|
562 | |
---|
563 | void gr701_print_dev(struct drvmgr_dev *dev, int options) |
---|
564 | { |
---|
565 | struct gr701_priv *priv = dev->priv; |
---|
566 | struct pci_dev_info *devinfo = priv->devinfo; |
---|
567 | unsigned int freq_hz; |
---|
568 | uint32_t bar0, bar1, bar0_size, bar1_size; |
---|
569 | |
---|
570 | /* Print */ |
---|
571 | printf("--- GR-701 [bus 0x%x, dev 0x%x, fun 0x%x] ---\n", |
---|
572 | PCI_DEV_EXPAND(priv->pcidev)); |
---|
573 | bar0 = devinfo->resources[0].address; |
---|
574 | bar0_size = devinfo->resources[0].size; |
---|
575 | bar1 = devinfo->resources[1].address; |
---|
576 | bar1_size = devinfo->resources[1].size; |
---|
577 | |
---|
578 | printf(" PCI BAR[0]: 0x%" PRIx32 " - 0x%" PRIx32 "\n", |
---|
579 | bar0, bar0 + bar0_size - 1); |
---|
580 | printf(" PCI BAR[1]: 0x%" PRIx32 " - 0x%" PRIx32 "\n", |
---|
581 | bar1, bar1 + bar1_size - 1); |
---|
582 | printf(" IRQ: %d\n", devinfo->irq); |
---|
583 | |
---|
584 | /* Frequency is the same as the PCI bus frequency */ |
---|
585 | drvmgr_freq_get(dev, 0, &freq_hz); |
---|
586 | |
---|
587 | printf(" FREQ: %u Hz\n", freq_hz); |
---|
588 | printf(" IMASK: 0x%08x\n", priv->pcib->imask); |
---|
589 | printf(" IPEND: 0x%08x\n", priv->pcib->ipend); |
---|
590 | |
---|
591 | /* Print amba config */ |
---|
592 | if ( options & GR701_OPTIONS_AMBA ) { |
---|
593 | ambapp_print(&priv->abus, 10); |
---|
594 | } |
---|
595 | |
---|
596 | #if 0 |
---|
597 | /* Print IRQ handlers and their arguments */ |
---|
598 | if ( options & GR701_OPTIONS_IRQ ) { |
---|
599 | int i; |
---|
600 | for(i=0; i<16; i++) { |
---|
601 | printf(" IRQ[%02d]: 0x%x, arg: 0x%x\n", |
---|
602 | i, (unsigned int)priv->isrs[i].handler, (unsigned int)priv->isrs[i].arg); |
---|
603 | } |
---|
604 | } |
---|
605 | #endif |
---|
606 | } |
---|
607 | |
---|
608 | void gr701_print(int options) |
---|
609 | { |
---|
610 | struct pci_drv_info *drv = &gr701_info; |
---|
611 | struct drvmgr_dev *dev; |
---|
612 | |
---|
613 | dev = drv->general.dev; |
---|
614 | while(dev) { |
---|
615 | gr701_print_dev(dev, options); |
---|
616 | dev = dev->next_in_drv; |
---|
617 | } |
---|
618 | } |
---|