1 | /* |
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2 | * GRLIB/LEON3 extended interrupt controller |
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3 | * |
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4 | * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) |
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5 | * |
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6 | * COPYRIGHT (c) 2011 |
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7 | * Aeroflex Gaisler |
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8 | * |
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9 | * The license and distribution terms for this file may be |
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10 | * found in the file LICENSE in this distribution or at |
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11 | * http://www.rtems.org/license/LICENSE. |
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12 | * |
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13 | */ |
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14 | |
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15 | #include <leon.h> |
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16 | #include <bsp/irq.h> |
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17 | #include <bsp/irq-generic.h> |
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18 | |
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19 | /* GRLIB extended IRQ controller IRQ number */ |
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20 | int LEON3_IrqCtrl_EIrq = -1; |
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21 | |
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22 | /* Initialize Extended Interrupt controller */ |
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23 | void leon3_ext_irq_init(void) |
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24 | { |
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25 | if ( (LEON3_IrqCtrl_Regs->mpstat >> 16) & 0xf ) { |
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26 | /* Extended IRQ controller available */ |
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27 | LEON3_IrqCtrl_EIrq = (LEON3_IrqCtrl_Regs->mpstat >> 16) & 0xf; |
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28 | } |
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29 | } |
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30 | |
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31 | bool bsp_interrupt_is_valid_vector(rtems_vector_number vector) |
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32 | { |
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33 | if (vector == 0) { |
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34 | return false; |
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35 | } |
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36 | |
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37 | if (LEON3_IrqCtrl_EIrq > 0) { |
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38 | return vector <= BSP_INTERRUPT_VECTOR_MAX_EXT; |
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39 | } |
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40 | |
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41 | return vector <= BSP_INTERRUPT_VECTOR_MAX_STD; |
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42 | } |
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43 | |
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44 | #if defined(RTEMS_SMP) |
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45 | Processor_mask leon3_interrupt_affinities[BSP_INTERRUPT_VECTOR_MAX_STD + 1]; |
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46 | #endif |
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47 | |
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48 | void bsp_interrupt_facility_initialize(void) |
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49 | { |
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50 | #if defined(RTEMS_SMP) |
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51 | Processor_mask affinity; |
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52 | size_t i; |
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53 | |
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54 | _Processor_mask_From_index(&affinity, rtems_scheduler_get_processor()); |
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55 | |
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56 | for (i = 0; i < RTEMS_ARRAY_SIZE(leon3_interrupt_affinities); ++i) { |
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57 | leon3_interrupt_affinities[i] = affinity; |
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58 | } |
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59 | #endif |
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60 | } |
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61 | |
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62 | rtems_status_code bsp_interrupt_get_attributes( |
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63 | rtems_vector_number vector, |
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64 | rtems_interrupt_attributes *attributes |
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65 | ) |
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66 | { |
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67 | bool is_standard_interrupt; |
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68 | |
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69 | is_standard_interrupt = (vector <= BSP_INTERRUPT_VECTOR_MAX_STD); |
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70 | attributes->is_maskable = (vector != 15); |
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71 | attributes->can_enable = true; |
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72 | attributes->maybe_enable = true; |
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73 | attributes->can_disable = true; |
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74 | attributes->maybe_disable = true; |
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75 | attributes->can_raise = true; |
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76 | attributes->can_raise_on = is_standard_interrupt; |
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77 | attributes->can_clear = true; |
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78 | attributes->cleared_by_acknowledge = true; |
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79 | attributes->can_get_affinity = is_standard_interrupt; |
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80 | attributes->can_set_affinity = is_standard_interrupt; |
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81 | return RTEMS_SUCCESSFUL; |
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82 | } |
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83 | |
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84 | rtems_status_code bsp_interrupt_is_pending( |
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85 | rtems_vector_number vector, |
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86 | bool *pending |
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87 | ) |
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88 | { |
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89 | #if defined(RTEMS_SMP) |
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90 | rtems_interrupt_level level; |
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91 | uint32_t bit; |
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92 | |
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93 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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94 | bsp_interrupt_assert(pending != NULL); |
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95 | bit = 1U << vector; |
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96 | |
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97 | rtems_interrupt_local_disable(level); |
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98 | *pending = (LEON3_IrqCtrl_Regs->ipend & bit) != 0 || |
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99 | (LEON3_IrqCtrl_Regs->force[rtems_scheduler_get_processor()] & bit) != 0; |
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100 | rtems_interrupt_local_enable(level); |
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101 | return RTEMS_SUCCESSFUL; |
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102 | #else |
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103 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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104 | *pending = !BSP_Is_interrupt_pending(vector); |
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105 | return RTEMS_SUCCESSFUL; |
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106 | #endif |
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107 | } |
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108 | |
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109 | rtems_status_code bsp_interrupt_raise(rtems_vector_number vector) |
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110 | { |
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111 | uint32_t bit; |
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112 | |
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113 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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114 | bit = 1U << vector; |
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115 | |
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116 | if ( vector <= BSP_INTERRUPT_VECTOR_MAX_STD ) { |
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117 | uint32_t cpu_count; |
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118 | uint32_t cpu_index; |
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119 | |
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120 | cpu_count = rtems_scheduler_get_processor_maximum(); |
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121 | |
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122 | for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) { |
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123 | LEON3_IrqCtrl_Regs->force[cpu_index] = bit; |
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124 | } |
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125 | } else { |
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126 | rtems_interrupt_lock_context lock_context; |
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127 | |
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128 | /* |
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129 | * This is a very dangerous operation and should only be used for test |
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130 | * software. We may accidentally clear the pending state set by |
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131 | * peripherals with this read-modify-write operation. |
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132 | */ |
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133 | LEON3_IRQCTRL_ACQUIRE(&lock_context); |
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134 | LEON3_IrqCtrl_Regs->ipend |= bit; |
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135 | LEON3_IRQCTRL_RELEASE(&lock_context); |
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136 | } |
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137 | |
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138 | return RTEMS_SUCCESSFUL; |
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139 | } |
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140 | |
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141 | #if defined(RTEMS_SMP) |
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142 | rtems_status_code bsp_interrupt_raise_on( |
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143 | rtems_vector_number vector, |
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144 | uint32_t cpu_index |
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145 | ) |
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146 | { |
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147 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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148 | bsp_interrupt_assert(cpu_index < rtems_scheduler_get_processor_maximum()); |
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149 | |
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150 | if ( vector > BSP_INTERRUPT_VECTOR_MAX_STD ) { |
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151 | return RTEMS_UNSATISFIED; |
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152 | } |
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153 | |
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154 | LEON3_IrqCtrl_Regs->force[cpu_index] = 1U << vector; |
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155 | return RTEMS_SUCCESSFUL; |
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156 | } |
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157 | #endif |
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158 | |
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159 | rtems_status_code bsp_interrupt_clear(rtems_vector_number vector) |
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160 | { |
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161 | uint32_t bit; |
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162 | |
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163 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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164 | bit = 1U << vector; |
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165 | |
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166 | LEON3_IrqCtrl_Regs->iclear = bit; |
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167 | |
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168 | if (vector <= BSP_INTERRUPT_VECTOR_MAX_STD) { |
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169 | LEON3_IrqCtrl_Regs->force[rtems_scheduler_get_processor()] = bit << 16; |
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170 | } |
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171 | |
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172 | return RTEMS_SUCCESSFUL; |
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173 | } |
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174 | |
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175 | rtems_status_code bsp_interrupt_vector_is_enabled( |
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176 | rtems_vector_number vector, |
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177 | bool *enabled |
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178 | ) |
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179 | { |
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180 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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181 | *enabled = |
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182 | !BSP_Cpu_Is_interrupt_masked(vector, _LEON3_Get_current_processor()); |
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183 | return RTEMS_SUCCESSFUL; |
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184 | } |
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185 | |
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186 | #if defined(RTEMS_SMP) |
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187 | static void leon3_interrupt_vector_enable(rtems_vector_number vector) |
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188 | { |
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189 | uint32_t cpu_index; |
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190 | uint32_t cpu_count; |
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191 | Processor_mask affinity; |
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192 | uint32_t bit; |
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193 | uint32_t unmasked; |
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194 | |
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195 | if (vector <= BSP_INTERRUPT_VECTOR_MAX_STD) { |
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196 | affinity = leon3_interrupt_affinities[vector]; |
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197 | } else { |
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198 | affinity = leon3_interrupt_affinities[LEON3_IrqCtrl_EIrq]; |
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199 | } |
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200 | |
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201 | cpu_count = rtems_scheduler_get_processor_maximum(); |
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202 | bit = 1U << vector; |
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203 | unmasked = 0; |
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204 | |
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205 | for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) { |
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206 | uint32_t mask; |
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207 | |
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208 | mask = LEON3_IrqCtrl_Regs->mask[cpu_index]; |
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209 | |
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210 | if (_Processor_mask_Is_set(&affinity, cpu_index)) { |
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211 | ++unmasked; |
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212 | mask |= bit; |
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213 | } else { |
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214 | mask &= ~bit; |
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215 | } |
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216 | |
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217 | LEON3_IrqCtrl_Regs->mask[cpu_index] = mask; |
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218 | } |
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219 | |
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220 | if (unmasked > 1) { |
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221 | LEON3_IrqCtrl_Regs->bcast |= bit; |
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222 | } else { |
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223 | LEON3_IrqCtrl_Regs->bcast &= ~bit; |
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224 | } |
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225 | } |
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226 | #endif |
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227 | |
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228 | rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) |
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229 | { |
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230 | #if defined(RTEMS_SMP) |
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231 | rtems_interrupt_lock_context lock_context; |
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232 | |
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233 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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234 | LEON3_IRQCTRL_ACQUIRE(&lock_context); |
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235 | leon3_interrupt_vector_enable(vector); |
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236 | LEON3_IRQCTRL_RELEASE(&lock_context); |
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237 | #else |
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238 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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239 | BSP_Cpu_Unmask_interrupt(vector, _LEON3_Get_current_processor()); |
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240 | #endif |
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241 | return RTEMS_SUCCESSFUL; |
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242 | } |
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243 | |
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244 | rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) |
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245 | { |
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246 | #if defined(RTEMS_SMP) |
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247 | rtems_interrupt_lock_context lock_context; |
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248 | uint32_t bit; |
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249 | uint32_t cpu_index; |
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250 | uint32_t cpu_count; |
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251 | |
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252 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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253 | bit = 1U << vector; |
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254 | cpu_count = rtems_scheduler_get_processor_maximum(); |
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255 | |
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256 | LEON3_IRQCTRL_ACQUIRE(&lock_context); |
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257 | |
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258 | for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) { |
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259 | LEON3_IrqCtrl_Regs->mask[cpu_index] &= ~bit; |
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260 | } |
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261 | |
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262 | LEON3_IrqCtrl_Regs->bcast &= ~bit; |
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263 | |
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264 | LEON3_IRQCTRL_RELEASE(&lock_context); |
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265 | #else |
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266 | bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector)); |
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267 | BSP_Cpu_Mask_interrupt(vector, _LEON3_Get_current_processor()); |
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268 | #endif |
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269 | return RTEMS_SUCCESSFUL; |
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270 | } |
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271 | |
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272 | #if defined(RTEMS_SMP) |
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273 | rtems_status_code bsp_interrupt_set_affinity( |
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274 | rtems_vector_number vector, |
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275 | const Processor_mask *affinity |
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276 | ) |
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277 | { |
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278 | rtems_interrupt_lock_context lock_context; |
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279 | uint32_t cpu_count; |
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280 | uint32_t cpu_index; |
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281 | uint32_t bit; |
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282 | |
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283 | if (vector >= RTEMS_ARRAY_SIZE(leon3_interrupt_affinities)) { |
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284 | return RTEMS_UNSATISFIED; |
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285 | } |
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286 | |
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287 | cpu_count = rtems_scheduler_get_processor_maximum(); |
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288 | bit = 1U << vector; |
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289 | |
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290 | LEON3_IRQCTRL_ACQUIRE(&lock_context); |
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291 | leon3_interrupt_affinities[vector] = *affinity; |
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292 | |
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293 | /* |
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294 | * If the interrupt is enabled on at least one processor, then re-enable it |
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295 | * using the new affinity. |
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296 | */ |
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297 | for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) { |
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298 | if ((LEON3_IrqCtrl_Regs->mask[cpu_index] & bit) != 0) { |
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299 | leon3_interrupt_vector_enable(vector); |
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300 | break; |
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301 | } |
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302 | } |
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303 | |
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304 | LEON3_IRQCTRL_RELEASE(&lock_context); |
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305 | return RTEMS_SUCCESSFUL; |
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306 | } |
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307 | |
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308 | rtems_status_code bsp_interrupt_get_affinity( |
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309 | rtems_vector_number vector, |
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310 | Processor_mask *affinity |
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311 | ) |
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312 | { |
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313 | if (vector >= RTEMS_ARRAY_SIZE(leon3_interrupt_affinities)) { |
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314 | return RTEMS_UNSATISFIED; |
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315 | } |
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316 | |
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317 | *affinity = leon3_interrupt_affinities[vector]; |
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318 | return RTEMS_SUCCESSFUL; |
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319 | } |
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320 | #endif |
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