[d6ebf40] | 1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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| 2 | |
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[7f32fa4] | 3 | /* |
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| 4 | * RTEMS SMP Support for Single Core |
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| 5 | * |
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| 6 | * COPYRIGHT (c) 1989-2011. |
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| 7 | * On-Line Applications Research Corporation (OAR). |
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| 8 | * |
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[d6ebf40] | 9 | * Redistribution and use in source and binary forms, with or without |
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| 10 | * modification, are permitted provided that the following conditions |
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| 11 | * are met: |
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| 12 | * 1. Redistributions of source code must retain the above copyright |
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| 13 | * notice, this list of conditions and the following disclaimer. |
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| 14 | * 2. Redistributions in binary form must reproduce the above copyright |
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| 15 | * notice, this list of conditions and the following disclaimer in the |
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| 16 | * documentation and/or other materials provided with the distribution. |
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| 17 | * |
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 28 | * POSSIBILITY OF SUCH DAMAGE. |
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[7f32fa4] | 29 | */ |
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| 30 | |
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[f8ff2a0] | 31 | #include <rtems/score/cpu.h> |
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[7f32fa4] | 32 | |
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[53e008b] | 33 | uint32_t _CPU_SMP_Initialize( void ) |
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[7f32fa4] | 34 | { |
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| 35 | /* return the number of CPUs */ |
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| 36 | return 1; |
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| 37 | } |
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| 38 | |
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[53e008b] | 39 | bool _CPU_SMP_Start_processor( uint32_t cpu_index ) |
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| 40 | { |
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| 41 | return true; |
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| 42 | } |
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| 43 | |
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| 44 | void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ) |
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| 45 | { |
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| 46 | } |
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| 47 | |
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[c34f94f7] | 48 | void _CPU_SMP_Prepare_start_multitasking( void ) |
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| 49 | { |
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| 50 | } |
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| 51 | |
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[ca63ae2] | 52 | void _CPU_SMP_Send_interrupt( uint32_t target_processor_index ) |
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[7f32fa4] | 53 | { |
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| 54 | } |
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