1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
---|
2 | |
---|
3 | /** |
---|
4 | * @file |
---|
5 | * |
---|
6 | * @ingroup bsp_interrupt |
---|
7 | * |
---|
8 | * @brief This source file contains the implementation of the interrupt event |
---|
9 | * recording support. |
---|
10 | */ |
---|
11 | |
---|
12 | /* |
---|
13 | * Copyright (C) 2022 embedded brains GmbH |
---|
14 | * |
---|
15 | * Redistribution and use in source and binary forms, with or without |
---|
16 | * modification, are permitted provided that the following conditions |
---|
17 | * are met: |
---|
18 | * 1. Redistributions of source code must retain the above copyright |
---|
19 | * notice, this list of conditions and the following disclaimer. |
---|
20 | * 2. Redistributions in binary form must reproduce the above copyright |
---|
21 | * notice, this list of conditions and the following disclaimer in the |
---|
22 | * documentation and/or other materials provided with the distribution. |
---|
23 | * |
---|
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
---|
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
---|
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
---|
27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
---|
28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
---|
29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
---|
30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
---|
31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
---|
32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
---|
33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
---|
34 | * POSSIBILITY OF SUCH DAMAGE. |
---|
35 | */ |
---|
36 | |
---|
37 | #include <bsp/irq-generic.h> |
---|
38 | |
---|
39 | #include <rtems/record.h> |
---|
40 | |
---|
41 | /* The regular interrupt entries are registered in this table */ |
---|
42 | static rtems_interrupt_entry * |
---|
43 | _Record_Interrupt_dispatch_table[ BSP_INTERRUPT_DISPATCH_TABLE_SIZE ]; |
---|
44 | |
---|
45 | /* |
---|
46 | * Provide one interrupt entry for the _Record_Interrupt_handler() interrupt |
---|
47 | * dispatch wrapper for each interrupt vector. |
---|
48 | */ |
---|
49 | static rtems_interrupt_entry |
---|
50 | _Record_Interrupt_entry_table[ BSP_INTERRUPT_DISPATCH_TABLE_SIZE ]; |
---|
51 | |
---|
52 | rtems_interrupt_entry **bsp_interrupt_get_dispatch_table_slot( |
---|
53 | rtems_vector_number index |
---|
54 | ) |
---|
55 | { |
---|
56 | return &_Record_Interrupt_dispatch_table[ index ]; |
---|
57 | } |
---|
58 | |
---|
59 | static void _Record_Interrupt_handler( void *arg ) |
---|
60 | { |
---|
61 | uintptr_t vector; |
---|
62 | rtems_interrupt_entry *entry; |
---|
63 | |
---|
64 | vector = (uintptr_t) arg; |
---|
65 | rtems_record_produce( RTEMS_RECORD_INTERRUPT_ENTRY, vector ); |
---|
66 | |
---|
67 | entry = bsp_interrupt_entry_load_acquire( |
---|
68 | &_Record_Interrupt_dispatch_table[ vector ] |
---|
69 | ); |
---|
70 | |
---|
71 | if ( RTEMS_PREDICT_TRUE( entry != NULL ) ) { |
---|
72 | bsp_interrupt_dispatch_entries( entry ); |
---|
73 | } else { |
---|
74 | #if defined(RTEMS_SMP) |
---|
75 | bsp_interrupt_spurious( vector ); |
---|
76 | #else |
---|
77 | bsp_interrupt_handler_default( vector ); |
---|
78 | #endif |
---|
79 | } |
---|
80 | |
---|
81 | rtems_record_produce( RTEMS_RECORD_INTERRUPT_EXIT, vector ); |
---|
82 | } |
---|
83 | |
---|
84 | void _Record_Interrupt_initialize( void ) |
---|
85 | { |
---|
86 | uintptr_t i; |
---|
87 | |
---|
88 | /* |
---|
89 | * Let each interrupt dispatch table slot reference the |
---|
90 | * _Record_Interrupt_handler() interrupt dispatch wrapper. |
---|
91 | */ |
---|
92 | for ( i = 0; i < BSP_INTERRUPT_DISPATCH_TABLE_SIZE; ++i ) { |
---|
93 | _Record_Interrupt_entry_table[ i ].handler = _Record_Interrupt_handler; |
---|
94 | _Record_Interrupt_entry_table[ i ].arg = (void *) i; |
---|
95 | bsp_interrupt_dispatch_table[ i ] = &_Record_Interrupt_entry_table[ i ]; |
---|
96 | } |
---|
97 | } |
---|