[e67b2b8d] | 1 | /* GR-TMTC-1553 PCI Target driver. |
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| 2 | * |
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| 3 | * COPYRIGHT (c) 2008. |
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| 4 | * Cobham Gaisler AB. |
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| 5 | * |
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| 6 | * Configures the GR-TMTC-1553 interface PCI board. |
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| 7 | * This driver provides a AMBA PnP bus by using the general part |
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| 8 | * of the AMBA PnP bus driver (ambapp_bus.c). |
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| 9 | * |
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| 10 | * Driver resources for the AMBA PnP bus provided can be set using |
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| 11 | * gr_tmtc_1553_set_resources(). |
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| 12 | * |
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| 13 | * The license and distribution terms for this file may be |
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| 14 | * found in found in the file LICENSE in this distribution or at |
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[4a7d1026] | 15 | * http://www.rtems.org/license/LICENSE. |
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[e67b2b8d] | 16 | */ |
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| 17 | |
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[c05d7a9d] | 18 | #include <inttypes.h> |
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[e67b2b8d] | 19 | #include <stdio.h> |
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| 20 | #include <stdlib.h> |
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| 21 | #include <string.h> |
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| 22 | #include <sys/types.h> |
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| 23 | #include <sys/stat.h> |
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| 24 | |
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| 25 | #include <bsp.h> |
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| 26 | #include <rtems/bspIo.h> |
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| 27 | #include <pci.h> |
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| 28 | #include <pci/access.h> |
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| 29 | |
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[31720925] | 30 | #include <grlib/ambapp.h> |
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| 31 | #include <grlib/grlib.h> |
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[e67b2b8d] | 32 | #include <drvmgr/drvmgr.h> |
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[31720925] | 33 | #include <grlib/ambapp_bus.h> |
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[e67b2b8d] | 34 | #include <drvmgr/pci_bus.h> |
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[31720925] | 35 | #include <grlib/bspcommon.h> |
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| 36 | #include <grlib/genirq.h> |
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[e67b2b8d] | 37 | |
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[31720925] | 38 | #include <grlib/gr_tmtc_1553.h> |
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[e67b2b8d] | 39 | |
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[31720925] | 40 | #include <grlib/grlib_impl.h> |
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[e67b2b8d] | 41 | |
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| 42 | /*#define DEBUG 1 */ |
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| 43 | |
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| 44 | #ifdef DEBUG |
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| 45 | #define DBG(x...) printk(x) |
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| 46 | #else |
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| 47 | #define DBG(x...) |
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| 48 | #endif |
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| 49 | |
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| 50 | /* PCI ID */ |
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| 51 | #define PCIID_VENDOR_GAISLER 0x1AC8 |
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| 52 | |
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| 53 | int gr_tmtc_1553_init1(struct drvmgr_dev *dev); |
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| 54 | int gr_tmtc_1553_init2(struct drvmgr_dev *dev); |
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[103bbde] | 55 | void gr_tmtc_1553_isr (void *arg); |
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[e67b2b8d] | 56 | |
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| 57 | struct gr_tmtc_1553_ver { |
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| 58 | const unsigned int amba_freq_hz; /* The frequency */ |
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| 59 | const unsigned int amba_ioarea; /* The address where the PnP IOAREA starts at */ |
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| 60 | }; |
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| 61 | |
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| 62 | /* Private data structure for driver */ |
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| 63 | struct gr_tmtc_1553_priv { |
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| 64 | /* Driver management */ |
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[ce76b9d2] | 65 | struct drvmgr_dev *dev; |
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[e67b2b8d] | 66 | char prefix[32]; |
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[ce76b9d2] | 67 | SPIN_DECLARE(devlock); |
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[e67b2b8d] | 68 | |
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| 69 | /* PCI */ |
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| 70 | pci_dev_t pcidev; |
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| 71 | struct pci_dev_info *devinfo; |
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| 72 | |
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| 73 | /* IRQ */ |
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| 74 | genirq_t genirq; |
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| 75 | |
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| 76 | struct gr_tmtc_1553_ver *version; |
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| 77 | struct irqmp_regs *irq; |
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| 78 | struct drvmgr_map_entry bus_maps_down[2]; |
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| 79 | |
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| 80 | struct ambapp_bus abus; |
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| 81 | struct ambapp_mmap amba_maps[4]; |
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| 82 | struct ambapp_config config; |
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| 83 | }; |
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| 84 | |
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| 85 | struct gr_tmtc_1553_ver gr_tmtc_1553_ver0 = { |
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| 86 | .amba_freq_hz = 33333333, |
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| 87 | .amba_ioarea = 0xfff00000, |
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| 88 | }; |
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| 89 | |
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| 90 | |
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| 91 | int ambapp_tmtc_1553_int_register( |
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| 92 | struct drvmgr_dev *dev, |
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| 93 | int irq, |
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| 94 | const char *info, |
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| 95 | drvmgr_isr handler, |
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| 96 | void *arg); |
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| 97 | int ambapp_tmtc_1553_int_unregister( |
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| 98 | struct drvmgr_dev *dev, |
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| 99 | int irq, |
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| 100 | drvmgr_isr handler, |
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| 101 | void *arg); |
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| 102 | int ambapp_tmtc_1553_int_unmask( |
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| 103 | struct drvmgr_dev *dev, |
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| 104 | int irq); |
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| 105 | int ambapp_tmtc_1553_int_mask( |
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| 106 | struct drvmgr_dev *dev, |
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| 107 | int irq); |
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| 108 | int ambapp_tmtc_1553_int_clear( |
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| 109 | struct drvmgr_dev *dev, |
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| 110 | int irq); |
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| 111 | int ambapp_tmtc_1553_get_params( |
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| 112 | struct drvmgr_dev *dev, |
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| 113 | struct drvmgr_bus_params *params); |
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| 114 | |
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| 115 | struct ambapp_ops ambapp_tmtc_1553_ops = { |
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| 116 | .int_register = ambapp_tmtc_1553_int_register, |
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| 117 | .int_unregister = ambapp_tmtc_1553_int_unregister, |
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| 118 | .int_unmask = ambapp_tmtc_1553_int_unmask, |
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| 119 | .int_mask = ambapp_tmtc_1553_int_mask, |
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| 120 | .int_clear = ambapp_tmtc_1553_int_clear, |
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| 121 | .get_params = ambapp_tmtc_1553_get_params |
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| 122 | }; |
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| 123 | |
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| 124 | struct drvmgr_drv_ops gr_tmtc_1553_ops = |
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| 125 | { |
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| 126 | {gr_tmtc_1553_init1, gr_tmtc_1553_init2, NULL, NULL}, |
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| 127 | NULL, |
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| 128 | NULL |
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| 129 | }; |
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| 130 | |
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| 131 | struct pci_dev_id_match gr_tmtc_1553_ids[] = |
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| 132 | { |
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| 133 | PCIID_DEVVEND(PCIID_VENDOR_GAISLER, PCIID_DEVICE_GR_TMTC_1553), |
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| 134 | PCIID_END_TABLE /* Mark end of table */ |
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| 135 | }; |
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| 136 | |
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| 137 | struct pci_drv_info gr_tmtc_1553_info = |
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| 138 | { |
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| 139 | { |
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| 140 | DRVMGR_OBJ_DRV, /* Driver */ |
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| 141 | NULL, /* Next driver */ |
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| 142 | NULL, /* Device list */ |
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| 143 | DRIVER_PCI_GAISLER_TMTC_1553_ID, /* Driver ID */ |
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| 144 | "GR-TMTC-1553_DRV", /* Driver Name */ |
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| 145 | DRVMGR_BUS_TYPE_PCI, /* Bus Type */ |
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| 146 | &gr_tmtc_1553_ops, |
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| 147 | NULL, /* Funcs */ |
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| 148 | 0, /* No devices yet */ |
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| 149 | 0, |
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| 150 | }, |
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| 151 | &gr_tmtc_1553_ids[0] |
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| 152 | }; |
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| 153 | |
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| 154 | /* Driver resources configuration for the AMBA bus on the GR-RASTA-IO board. |
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| 155 | * It is declared weak so that the user may override it from the project file, |
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| 156 | * if the default settings are not enough. |
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| 157 | * |
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| 158 | * The configuration consists of an array of configuration pointers, each |
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| 159 | * pointer determine the configuration of one GR-RASTA-IO board. Pointer |
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| 160 | * zero is for board0, pointer 1 for board1 and so on. |
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| 161 | * |
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| 162 | * The array must end with a NULL pointer. |
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| 163 | */ |
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| 164 | struct drvmgr_bus_res *gr_tmtc_1553_resources[] __attribute__((weak)) = |
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| 165 | { |
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| 166 | NULL |
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| 167 | }; |
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| 168 | |
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| 169 | void gr_tmtc_1553_register_drv(void) |
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| 170 | { |
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| 171 | DBG("Registering GR-TMTC-1553 PCI driver\n"); |
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| 172 | drvmgr_drv_register(&gr_tmtc_1553_info.general); |
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| 173 | } |
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| 174 | |
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| 175 | void gr_tmtc_1553_isr (void *arg) |
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| 176 | { |
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| 177 | struct gr_tmtc_1553_priv *priv = arg; |
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| 178 | unsigned int status, tmp; |
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| 179 | int irq; |
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[ce76b9d2] | 180 | SPIN_ISR_IRQFLAGS(irqflags); |
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| 181 | |
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[e67b2b8d] | 182 | tmp = status = priv->irq->ipend; |
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| 183 | |
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| 184 | /* DBG("GR-RASTA-IO: IRQ 0x%x\n",status); */ |
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| 185 | |
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[ce76b9d2] | 186 | SPIN_LOCK(&priv->devlock, irqflags); |
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[e67b2b8d] | 187 | for(irq=0; irq<16; irq++) { |
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| 188 | if ( status & (1<<irq) ) { |
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| 189 | genirq_doirq(priv->genirq, irq); |
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| 190 | priv->irq->iclear = (1<<irq); |
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| 191 | status &= ~(1<<irq); |
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| 192 | if ( status == 0 ) |
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| 193 | break; |
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| 194 | } |
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| 195 | } |
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[ce76b9d2] | 196 | SPIN_UNLOCK(&priv->devlock, irqflags); |
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[e67b2b8d] | 197 | |
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| 198 | /* ACK interrupt, this is because PCI is Level, so the IRQ Controller still drives the IRQ. */ |
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| 199 | if ( tmp ) |
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| 200 | drvmgr_interrupt_clear(priv->dev, 0); |
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| 201 | |
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| 202 | DBG("GR-TMTC-1553-IRQ: 0x%x\n", tmp); |
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| 203 | } |
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| 204 | |
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[103bbde] | 205 | static int gr_tmtc_1553_hw_init(struct gr_tmtc_1553_priv *priv) |
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[e67b2b8d] | 206 | { |
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| 207 | unsigned int *page0 = NULL; |
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| 208 | struct ambapp_dev *tmp; |
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| 209 | unsigned int pci_freq_hz; |
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| 210 | struct pci_dev_info *devinfo = priv->devinfo; |
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| 211 | uint32_t bar0, bar0_size; |
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| 212 | |
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| 213 | /* Select version of GR-TMTC-1553 board */ |
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| 214 | switch (devinfo->rev) { |
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| 215 | case 0: |
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| 216 | priv->version = &gr_tmtc_1553_ver0; |
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| 217 | break; |
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| 218 | default: |
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| 219 | return -2; |
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| 220 | } |
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| 221 | |
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| 222 | bar0 = devinfo->resources[0].address; |
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| 223 | bar0_size = devinfo->resources[0].size; |
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| 224 | page0 = (unsigned int *)(bar0 + bar0_size/2); |
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| 225 | |
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| 226 | /* Point PAGE0 to start of board address map. RAM at 0xff000000, APB at 0xffc00000, IOAREA at 0xfff000000 */ |
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| 227 | /* XXX We assume little endian host with byte twisting enabled here */ |
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| 228 | *page0 = 0x010000ff; /* Set little endian mode on peripheral. */ |
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| 229 | |
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| 230 | /* Scan AMBA Plug&Play */ |
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| 231 | |
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| 232 | /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */ |
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| 233 | priv->amba_maps[0].size = 0x1000000; |
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| 234 | priv->amba_maps[0].local_adr = bar0; |
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| 235 | priv->amba_maps[0].remote_adr = 0xff000000; |
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| 236 | |
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| 237 | /* Addresses not matching with map be untouched */ |
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| 238 | priv->amba_maps[2].size = 0xfffffff0; |
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| 239 | priv->amba_maps[2].local_adr = 0; |
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| 240 | priv->amba_maps[2].remote_adr = 0; |
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| 241 | |
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| 242 | /* Mark end of table */ |
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| 243 | priv->amba_maps[3].size=0; |
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| 244 | priv->amba_maps[3].local_adr = 0; |
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| 245 | priv->amba_maps[3].remote_adr = 0; |
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| 246 | |
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| 247 | /* Start AMBA PnP scan at first AHB bus */ |
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| 248 | ambapp_scan(&priv->abus, |
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| 249 | bar0 + (priv->version->amba_ioarea & ~0xff000000), |
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| 250 | NULL, &priv->amba_maps[0]); |
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| 251 | |
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| 252 | /* Frequency is the hsame as the PCI bus frequency */ |
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[103bbde] | 253 | drvmgr_freq_get(priv->dev, 0, &pci_freq_hz); |
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[e67b2b8d] | 254 | |
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| 255 | ambapp_freq_init(&priv->abus, NULL, pci_freq_hz); |
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| 256 | |
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| 257 | /* Find IRQ controller */ |
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[103bbde] | 258 | tmp = (struct ambapp_dev *)ambapp_for_each(&priv->abus, |
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[e67b2b8d] | 259 | (OPTIONS_ALL|OPTIONS_APB_SLVS), |
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| 260 | VENDOR_GAISLER, GAISLER_IRQMP, |
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| 261 | ambapp_find_by_idx, NULL); |
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| 262 | if ( !tmp ) { |
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| 263 | return -4; |
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| 264 | } |
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| 265 | priv->irq = (struct irqmp_regs *)DEV_TO_APB(tmp)->start; |
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| 266 | /* Set up irq controller */ |
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| 267 | priv->irq->mask[0] = 0; |
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| 268 | priv->irq->iclear = 0xffff; |
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| 269 | priv->irq->ilevel = 0; |
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| 270 | |
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| 271 | /* DOWN streams translation table */ |
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| 272 | priv->bus_maps_down[0].name = "PCI BAR0 -> AMBA"; |
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| 273 | priv->bus_maps_down[0].size = priv->amba_maps[0].size; |
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| 274 | priv->bus_maps_down[0].from_adr = (void *)priv->amba_maps[0].local_adr; |
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| 275 | priv->bus_maps_down[0].to_adr = (void *)priv->amba_maps[0].remote_adr; |
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| 276 | /* Mark end of translation table */ |
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| 277 | priv->bus_maps_down[1].size = 0; |
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| 278 | |
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| 279 | /* Successfully registered the board */ |
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| 280 | return 0; |
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| 281 | } |
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| 282 | |
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| 283 | |
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| 284 | /* Called when a PCI target is found with the PCI device and vendor ID |
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| 285 | * given in gr_tmtc_1553_ids[]. |
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| 286 | */ |
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| 287 | int gr_tmtc_1553_init1(struct drvmgr_dev *dev) |
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| 288 | { |
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| 289 | struct gr_tmtc_1553_priv *priv; |
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| 290 | struct pci_dev_info *devinfo; |
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| 291 | int status; |
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| 292 | uint32_t bar0, bar0_size; |
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[103bbde] | 293 | int resources_cnt; |
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[e67b2b8d] | 294 | |
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| 295 | /* PCI device does not have the IRQ line register, when PCI autoconf configures it the configuration |
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| 296 | * is forgotten. We take the IRQ number from the PCI Host device (AMBA device), this works as long |
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| 297 | * as PCI-IRQs are ored together on the bus. |
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| 298 | * |
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| 299 | * Note that this only works on LEON. |
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| 300 | */ |
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| 301 | ((struct pci_dev_info *)dev->businfo)->irq = ((struct amba_dev_info *)dev->parent->dev->businfo)->info.irq; |
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[103bbde] | 302 | |
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[11f3b9a] | 303 | priv = grlib_calloc(1, sizeof(*priv)); |
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[e67b2b8d] | 304 | if ( !priv ) |
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| 305 | return DRVMGR_NOMEM; |
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| 306 | |
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| 307 | dev->priv = priv; |
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| 308 | priv->dev = dev; |
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| 309 | |
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| 310 | /* Determine number of configurations */ |
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[103bbde] | 311 | resources_cnt = get_resarray_count(gr_tmtc_1553_resources); |
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[e67b2b8d] | 312 | |
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| 313 | /* Generate Device prefix */ |
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| 314 | |
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[ce76b9d2] | 315 | strcpy(priv->prefix, "/dev/tmtc1553_0"); |
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| 316 | priv->prefix[14] += dev->minor_drv; |
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[e67b2b8d] | 317 | mkdir(priv->prefix, S_IRWXU | S_IRWXG | S_IRWXO); |
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[ce76b9d2] | 318 | priv->prefix[15] = '/'; |
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| 319 | priv->prefix[16] = '\0'; |
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[e67b2b8d] | 320 | |
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| 321 | priv->devinfo = devinfo = (struct pci_dev_info *)dev->businfo; |
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| 322 | priv->pcidev = devinfo->pcidev; |
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| 323 | bar0 = devinfo->resources[0].address; |
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| 324 | bar0_size = devinfo->resources[0].size; |
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[56a7540] | 325 | printk("\n\n--- GR-TMTC-1553[%d] ---\n", dev->minor_drv); |
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| 326 | printk(" PCI BUS: 0x%x, SLOT: 0x%x, FUNCTION: 0x%x\n", |
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[e67b2b8d] | 327 | PCI_DEV_EXPAND(priv->pcidev)); |
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[56a7540] | 328 | printk(" PCI VENDOR: 0x%04x, DEVICE: 0x%04x\n", |
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[e67b2b8d] | 329 | devinfo->id.vendor, devinfo->id.device); |
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[c05d7a9d] | 330 | printk(" PCI BAR[0]: 0x%" PRIx32 " - 0x%" PRIx32 "\n", |
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| 331 | bar0, bar0 + bar0_size - 1); |
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[56a7540] | 332 | printk(" IRQ: %d\n\n\n", devinfo->irq); |
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[e67b2b8d] | 333 | |
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| 334 | /* all neccessary space assigned to GR-TMTC-1553 target? */ |
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| 335 | if (bar0_size == 0) |
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| 336 | return DRVMGR_ENORES; |
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| 337 | |
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[ce76b9d2] | 338 | /* Initialize spin-lock for this PCI peripheral device. This is to |
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| 339 | * protect the Interrupt Controller Registers. The genirq layer is |
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| 340 | * protecting its own internals and ISR dispatching. |
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| 341 | */ |
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| 342 | SPIN_INIT(&priv->devlock, priv->prefix); |
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| 343 | |
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[e67b2b8d] | 344 | priv->genirq = genirq_init(16); |
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| 345 | if ( priv->genirq == NULL ) { |
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| 346 | free(priv); |
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| 347 | dev->priv = NULL; |
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| 348 | return DRVMGR_FAIL; |
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| 349 | } |
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| 350 | |
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| 351 | status = gr_tmtc_1553_hw_init(priv); |
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| 352 | if ( status != 0 ) { |
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| 353 | genirq_destroy(priv->genirq); |
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| 354 | free(priv); |
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| 355 | dev->priv = NULL; |
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[56a7540] | 356 | printk(" Failed to initialize GR-TMTC-1553 HW: %d\n", status); |
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[e67b2b8d] | 357 | return DRVMGR_FAIL; |
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| 358 | } |
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| 359 | |
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| 360 | /* Init amba bus */ |
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| 361 | priv->config.abus = &priv->abus; |
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| 362 | priv->config.ops = &ambapp_tmtc_1553_ops; |
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| 363 | priv->config.maps_down = &priv->bus_maps_down[0]; |
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| 364 | /* This PCI device has only target interface so DMA is not supported, |
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| 365 | * which means that translation from AMBA->PCI should fail if attempted. |
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| 366 | */ |
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| 367 | priv->config.maps_up = DRVMGR_TRANSLATE_NO_BRIDGE; |
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[103bbde] | 368 | if ( priv->dev->minor_drv < resources_cnt ) { |
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[e67b2b8d] | 369 | priv->config.resources = gr_tmtc_1553_resources[priv->dev->minor_drv]; |
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| 370 | } else { |
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| 371 | priv->config.resources = NULL; |
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| 372 | } |
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| 373 | |
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| 374 | /* Create And Register AMBA PnP Bus */ |
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| 375 | return ambapp_bus_register(dev, &priv->config); |
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| 376 | } |
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| 377 | |
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| 378 | int gr_tmtc_1553_init2(struct drvmgr_dev *dev) |
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| 379 | { |
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| 380 | struct gr_tmtc_1553_priv *priv = dev->priv; |
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| 381 | |
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| 382 | /* Clear any old interrupt requests */ |
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| 383 | drvmgr_interrupt_clear(dev, 0); |
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| 384 | |
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| 385 | /* Enable System IRQ so that GR-TMTC-1553 PCI target interrupt goes through. |
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| 386 | * |
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| 387 | * It is important to enable it in stage init2. If interrupts were enabled in init1 |
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| 388 | * this might hang the system when more than one PCI target is connected, this is |
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| 389 | * because PCI interrupts might be shared and PCI target 2 have not initialized and |
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| 390 | * might therefore drive interrupt already when entering init1(). |
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| 391 | */ |
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| 392 | drvmgr_interrupt_register( |
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| 393 | dev, |
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| 394 | 0, |
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| 395 | "gr_tmtc_1553", |
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| 396 | gr_tmtc_1553_isr, |
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| 397 | (void *)priv); |
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| 398 | |
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| 399 | return DRVMGR_OK; |
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| 400 | } |
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| 401 | |
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| 402 | int ambapp_tmtc_1553_int_register( |
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| 403 | struct drvmgr_dev *dev, |
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| 404 | int irq, |
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| 405 | const char *info, |
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| 406 | drvmgr_isr handler, |
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| 407 | void *arg) |
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| 408 | { |
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| 409 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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[ce76b9d2] | 410 | SPIN_IRQFLAGS(irqflags); |
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[e67b2b8d] | 411 | int status; |
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[ce76b9d2] | 412 | void *h; |
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[e67b2b8d] | 413 | |
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[ce76b9d2] | 414 | h = genirq_alloc_handler(handler, arg); |
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| 415 | if ( h == NULL ) |
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| 416 | return DRVMGR_FAIL; |
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[e67b2b8d] | 417 | |
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[ce76b9d2] | 418 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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| 419 | |
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| 420 | status = genirq_register(priv->genirq, irq, h); |
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[e67b2b8d] | 421 | if ( status == 0 ) { |
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| 422 | /* Disable and clear IRQ for first registered handler */ |
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| 423 | priv->irq->iclear = (1<<irq); |
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| 424 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
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| 425 | } else if ( status == 1 ) |
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| 426 | status = 0; |
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| 427 | |
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| 428 | if (status != 0) { |
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[ce76b9d2] | 429 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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| 430 | genirq_free_handler(h); |
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[e67b2b8d] | 431 | return DRVMGR_FAIL; |
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| 432 | } |
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| 433 | |
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| 434 | status = genirq_enable(priv->genirq, irq, handler, arg); |
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| 435 | if ( status == 0 ) { |
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| 436 | /* Enable IRQ for first enabled handler only */ |
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| 437 | priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */ |
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| 438 | } else if ( status == 1 ) |
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| 439 | status = 0; |
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| 440 | |
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[ce76b9d2] | 441 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 442 | |
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| 443 | return status; |
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| 444 | } |
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| 445 | |
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| 446 | int ambapp_tmtc_1553_int_unregister( |
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| 447 | struct drvmgr_dev *dev, |
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| 448 | int irq, |
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| 449 | drvmgr_isr isr, |
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| 450 | void *arg) |
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| 451 | { |
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| 452 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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[ce76b9d2] | 453 | SPIN_IRQFLAGS(irqflags); |
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[e67b2b8d] | 454 | int status; |
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[ce76b9d2] | 455 | void *handler; |
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[e67b2b8d] | 456 | |
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[ce76b9d2] | 457 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 458 | |
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| 459 | status = genirq_disable(priv->genirq, irq, isr, arg); |
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| 460 | if ( status == 0 ) { |
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| 461 | /* Disable IRQ only when no enabled handler exists */ |
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| 462 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
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| 463 | } else if ( status == 1 ) |
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| 464 | status = 0; |
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| 465 | |
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[ce76b9d2] | 466 | handler = genirq_unregister(priv->genirq, irq, isr, arg); |
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| 467 | if ( handler == NULL ) |
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[e67b2b8d] | 468 | status = DRVMGR_FAIL; |
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[ce76b9d2] | 469 | else |
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| 470 | status = DRVMGR_OK; |
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| 471 | |
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| 472 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 473 | |
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[ce76b9d2] | 474 | if (handler) |
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| 475 | genirq_free_handler(handler); |
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[e67b2b8d] | 476 | |
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| 477 | return status; |
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| 478 | } |
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| 479 | |
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| 480 | int ambapp_tmtc_1553_int_unmask( |
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| 481 | struct drvmgr_dev *dev, |
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| 482 | int irq) |
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| 483 | { |
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| 484 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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[ce76b9d2] | 485 | SPIN_IRQFLAGS(irqflags); |
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[e67b2b8d] | 486 | |
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| 487 | DBG("TMTC-1553 IRQ %d: enable\n", irq); |
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| 488 | |
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| 489 | if ( genirq_check(priv->genirq, irq) ) |
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| 490 | return DRVMGR_FAIL; |
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| 491 | |
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[ce76b9d2] | 492 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 493 | |
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| 494 | /* Enable IRQ */ |
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| 495 | priv->irq->mask[0] |= (1<<irq); /* unmask interrupt source */ |
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| 496 | |
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[ce76b9d2] | 497 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 498 | |
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| 499 | return DRVMGR_OK; |
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| 500 | } |
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| 501 | |
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| 502 | int ambapp_tmtc_1553_int_mask( |
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| 503 | struct drvmgr_dev *dev, |
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| 504 | int irq) |
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| 505 | { |
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| 506 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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[ce76b9d2] | 507 | SPIN_IRQFLAGS(irqflags); |
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[e67b2b8d] | 508 | |
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| 509 | DBG("TMTC-1553 IRQ %d: disable\n", irq); |
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| 510 | |
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| 511 | if ( genirq_check(priv->genirq, irq) ) |
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| 512 | return DRVMGR_FAIL; |
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| 513 | |
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[ce76b9d2] | 514 | SPIN_LOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 515 | |
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| 516 | /* Disable IRQ */ |
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| 517 | priv->irq->mask[0] &= ~(1<<irq); /* mask interrupt source */ |
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| 518 | |
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[ce76b9d2] | 519 | SPIN_UNLOCK_IRQ(&priv->devlock, irqflags); |
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[e67b2b8d] | 520 | |
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| 521 | return DRVMGR_OK; |
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| 522 | } |
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| 523 | |
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| 524 | int ambapp_tmtc_1553_int_clear( |
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| 525 | struct drvmgr_dev *dev, |
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| 526 | int irq) |
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| 527 | { |
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| 528 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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| 529 | |
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| 530 | if ( genirq_check(priv->genirq, irq) ) |
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| 531 | return DRVMGR_FAIL; |
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| 532 | |
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| 533 | priv->irq->iclear = (1<<irq); |
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| 534 | |
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| 535 | return DRVMGR_OK; |
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| 536 | } |
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| 537 | |
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| 538 | int ambapp_tmtc_1553_get_params(struct drvmgr_dev *dev, struct drvmgr_bus_params *params) |
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| 539 | { |
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| 540 | struct gr_tmtc_1553_priv *priv = dev->parent->dev->priv; |
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| 541 | |
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| 542 | /* Device name prefix pointer, skip /dev */ |
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| 543 | params->dev_prefix = &priv->prefix[5]; |
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| 544 | |
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| 545 | return 0; |
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| 546 | } |
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| 547 | |
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| 548 | void gr_tmtc_1553_print_dev(struct drvmgr_dev *dev, int options) |
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| 549 | { |
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| 550 | struct gr_tmtc_1553_priv *priv = dev->priv; |
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| 551 | struct pci_dev_info *devinfo = priv->devinfo; |
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| 552 | uint32_t bar0, bar0_size; |
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| 553 | |
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| 554 | /* Print */ |
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| 555 | printf("--- GR-TMTC-1553 [bus 0x%x, dev 0x%x, fun 0x%x] ---\n", |
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| 556 | PCI_DEV_EXPAND(priv->pcidev)); |
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| 557 | |
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| 558 | bar0 = devinfo->resources[0].address; |
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| 559 | bar0_size = devinfo->resources[0].size; |
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| 560 | |
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[c05d7a9d] | 561 | printf(" PCI BAR[0]: 0x%" PRIx32 " - 0x%" PRIx32 "\n", |
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| 562 | bar0, bar0 + bar0_size - 1); |
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| 563 | printf(" IRQ REGS: 0x%" PRIxPTR "\n", (uintptr_t)priv->irq); |
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[e67b2b8d] | 564 | printf(" IRQ: %d\n", devinfo->irq); |
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| 565 | printf(" FREQ: %d Hz\n", priv->version->amba_freq_hz); |
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| 566 | printf(" IMASK: 0x%08x\n", priv->irq->mask[0]); |
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| 567 | printf(" IPEND: 0x%08x\n", priv->irq->ipend); |
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| 568 | |
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| 569 | /* Print amba config */ |
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| 570 | if ( options & TMTC_1553_OPTIONS_AMBA ) { |
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| 571 | ambapp_print(&priv->abus, 10); |
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| 572 | } |
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| 573 | #if 0 |
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| 574 | /* Print IRQ handlers and their arguments */ |
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| 575 | if ( options & TMTC_1553_OPTIONS_IRQ ) { |
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| 576 | int i; |
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| 577 | for(i=0; i<16; i++) { |
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| 578 | printf(" IRQ[%02d]: 0x%x, arg: 0x%x\n", |
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| 579 | i, (unsigned int)priv->isrs[i].handler, (unsigned int)priv->isrs[i].arg); |
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| 580 | } |
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| 581 | } |
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| 582 | #endif |
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| 583 | } |
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| 584 | |
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| 585 | void gr_tmtc_1553_print(int options) |
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| 586 | { |
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| 587 | struct pci_drv_info *drv = &gr_tmtc_1553_info; |
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| 588 | struct drvmgr_dev *dev; |
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| 589 | |
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| 590 | dev = drv->general.dev; |
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| 591 | while(dev) { |
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| 592 | gr_tmtc_1553_print_dev(dev, options); |
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| 593 | dev = dev->next_in_drv; |
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| 594 | } |
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| 595 | } |
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