[3bb4122] | 1 | /* Memory Controller driver (FTMTRL, MCTRL) |
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| 2 | * |
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| 3 | * COPYRIGHT (c) 2008. |
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| 4 | * Cobham Gaisler AB. |
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| 5 | * |
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| 6 | * This file contains the driver for the MCTRL memory controller. |
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| 7 | * The driver sets the memory configuration registers (MCFG1, MCFG2, MCFG3) |
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| 8 | * during driver initialization |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in found in the file LICENSE in this distribution or at |
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[4a7d1026] | 12 | * http://www.rtems.org/license/LICENSE. |
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[3bb4122] | 13 | */ |
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| 14 | |
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| 15 | /******************* Driver manager interface ***********************/ |
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| 16 | #include <stdlib.h> |
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| 17 | #include <string.h> |
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| 18 | #include <stdio.h> |
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| 19 | |
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| 20 | #include <drvmgr/drvmgr.h> |
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[31720925] | 21 | #include <grlib/ambapp_bus.h> |
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[3bb4122] | 22 | |
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[31720925] | 23 | #include <grlib/mctrl.h> |
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[445e253] | 24 | |
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[31720925] | 25 | #include <grlib/grlib_impl.h> |
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[11f3b9a] | 26 | |
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[3bb4122] | 27 | #define MEMSET(priv, start, c, length) memset((void *)start, c, length) |
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| 28 | |
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| 29 | #define DBG(args...) |
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| 30 | /*#define DBG(args...) printk(args)*/ |
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| 31 | |
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| 32 | struct mctrl_regs { |
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| 33 | unsigned int mcfg[8]; |
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| 34 | }; |
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| 35 | |
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| 36 | struct mctrl_priv; |
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| 37 | |
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| 38 | struct mctrl_ops { |
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| 39 | void (*mcfg_set)(struct mctrl_priv *priv, int index, void *regs, unsigned int regval); |
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| 40 | }; |
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| 41 | |
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| 42 | struct mctrl_priv { |
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| 43 | struct drvmgr_dev *dev; |
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| 44 | void *regs; |
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| 45 | unsigned int mcfg[8]; /* The wanted memory configuration */ |
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| 46 | unsigned int configured; /* Determines what mcfgs was configured by user */ |
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| 47 | struct mctrl_ops *ops; /* Operation may depend on hardware */ |
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| 48 | }; |
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| 49 | |
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| 50 | static int mctrl_init1(struct drvmgr_dev *dev); |
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| 51 | static int mctrl_remove(struct drvmgr_dev *dev); |
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| 52 | |
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| 53 | /* Standard MCFG registers */ |
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| 54 | static void mctrl_set_std(struct mctrl_priv *priv, int index, void *regs, unsigned int regval); |
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| 55 | |
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| 56 | struct mctrl_ops std_mctrl_ops = |
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| 57 | { |
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| 58 | mctrl_set_std |
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| 59 | }; |
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| 60 | |
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| 61 | struct drvmgr_drv_ops mctrl_ops = |
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| 62 | { |
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| 63 | .init = {mctrl_init1, NULL, NULL, NULL}, |
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| 64 | .remove = mctrl_remove, |
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| 65 | .info = NULL |
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| 66 | }; |
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| 67 | |
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| 68 | struct amba_dev_id mctrl_ids[] = |
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| 69 | { |
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| 70 | {VENDOR_ESA, ESA_MCTRL}, |
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| 71 | {VENDOR_GAISLER, GAISLER_FTMCTRL}, |
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| 72 | {VENDOR_GAISLER, GAISLER_FTSRCTRL}, |
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| 73 | {0, 0} /* Mark end of table */ |
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| 74 | }; |
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| 75 | |
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| 76 | struct amba_drv_info mctrl_drv_info = |
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| 77 | { |
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| 78 | { |
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| 79 | DRVMGR_OBJ_DRV, /* Driver */ |
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| 80 | NULL, /* Next driver */ |
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| 81 | NULL, /* Device list */ |
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| 82 | DRIVER_AMBAPP_MCTRL_ID, /* Driver ID */ |
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| 83 | "MCTRL_DRV", /* Driver Name */ |
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| 84 | DRVMGR_BUS_TYPE_AMBAPP, /* Bus Type */ |
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| 85 | &mctrl_ops, |
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| 86 | NULL, /* Funcs */ |
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| 87 | 0, /* No devices yet */ |
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| 88 | 0, |
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| 89 | }, |
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| 90 | &mctrl_ids[0] |
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| 91 | }; |
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| 92 | |
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| 93 | void mctrl_register_drv (void) |
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| 94 | { |
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| 95 | DBG("Registering MCTRL driver\n"); |
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| 96 | drvmgr_drv_register(&mctrl_drv_info.general); |
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| 97 | } |
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| 98 | |
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| 99 | static int mctrl_init1(struct drvmgr_dev *dev) |
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| 100 | { |
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| 101 | struct mctrl_priv *priv; |
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| 102 | struct amba_dev_info *ambadev; |
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| 103 | struct ambapp_core *pnpinfo; |
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| 104 | int i; |
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| 105 | char res_name[16]; |
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| 106 | union drvmgr_key_value *value; |
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| 107 | unsigned int start, length; |
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| 108 | |
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| 109 | DBG("MCTRL[%d] on bus %s\n", dev->minor_drv, dev->parent->dev->name); |
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[11f3b9a] | 110 | priv = dev->priv = grlib_calloc(1, sizeof(*priv)); |
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[3bb4122] | 111 | if ( !priv ) |
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| 112 | return DRVMGR_NOMEM; |
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| 113 | priv->dev = dev; |
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| 114 | |
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| 115 | /* Get device information from AMBA PnP information */ |
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| 116 | ambadev = (struct amba_dev_info *)priv->dev->businfo; |
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| 117 | if ( ambadev == NULL ) { |
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| 118 | return DRVMGR_FAIL; |
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| 119 | } |
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| 120 | pnpinfo = &ambadev->info; |
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| 121 | if ( pnpinfo->apb_slv == NULL ) { |
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| 122 | /* LEON2 PnP systems are missing the APB interface */ |
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| 123 | priv->regs = (void *)0x80000000; |
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| 124 | } else { |
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| 125 | priv->regs = (void *)pnpinfo->apb_slv->start; |
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| 126 | } |
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| 127 | |
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| 128 | /* Depending on Hardware selection write/read routines */ |
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| 129 | switch ( pnpinfo->vendor ) { |
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| 130 | case VENDOR_ESA: |
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| 131 | switch ( pnpinfo->device ) { |
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| 132 | case ESA_MCTRL: |
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| 133 | default: |
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| 134 | priv->ops = &std_mctrl_ops; |
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| 135 | } |
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| 136 | break; |
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| 137 | |
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| 138 | case VENDOR_GAISLER: |
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| 139 | switch ( pnpinfo->device ) { |
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| 140 | case GAISLER_FTMCTRL: |
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| 141 | case GAISLER_FTSRCTRL: |
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| 142 | default: |
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| 143 | priv->ops = &std_mctrl_ops; |
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| 144 | } |
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| 145 | break; |
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| 146 | |
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| 147 | default: |
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| 148 | priv->ops = &std_mctrl_ops; |
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| 149 | break; |
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| 150 | } |
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| 151 | |
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| 152 | /* Find user configuration from bus resources */ |
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| 153 | priv->configured = 0; |
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| 154 | strcpy(res_name, "mcfgX"); |
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| 155 | for(i=0; i<8; i++) { |
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| 156 | res_name[4] = '1' + i; |
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[4d3e70f4] | 157 | value = drvmgr_dev_key_get(priv->dev, res_name, DRVMGR_KT_INT); |
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[3bb4122] | 158 | if ( value ) { |
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| 159 | priv->mcfg[i] = value->i; |
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| 160 | priv->configured |= (1<<i); |
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| 161 | } |
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| 162 | } |
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| 163 | |
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| 164 | /* Init hardware registers right away, other devices may depend on it in init2(), also |
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| 165 | * the washing depend on it. |
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| 166 | */ |
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| 167 | for ( i=0; i<8; i++) { |
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| 168 | if ( priv->configured & (1<<i) ) { |
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| 169 | DBG("Setting MCFG%d to 0x%08x\n", i+1, priv->mcfg[i]); |
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| 170 | priv->ops->mcfg_set(priv, i, priv->regs, priv->mcfg[i]); |
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| 171 | } |
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| 172 | } |
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| 173 | |
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| 174 | /* Wash memory partitions if user wants */ |
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| 175 | for (i=0; i<9; i++) { |
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| 176 | strcpy(res_name, "washXStart"); |
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| 177 | res_name[4] = '0' + i; |
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[4d3e70f4] | 178 | value = drvmgr_dev_key_get(priv->dev, res_name, DRVMGR_KT_INT); |
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[3bb4122] | 179 | if ( value ) { |
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| 180 | start = value->i; |
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| 181 | strcpy(res_name, "washXLength"); |
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| 182 | res_name[4] = '0' + i; |
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[4d3e70f4] | 183 | value = drvmgr_dev_key_get(priv->dev, res_name, DRVMGR_KT_INT); |
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[3bb4122] | 184 | if ( value ) { |
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| 185 | length = value->i; |
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| 186 | |
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| 187 | if ( length > 0 ) { |
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| 188 | DBG("MCTRL: Washing 0x%08x-0x%08x\n", start, start+length-1); |
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| 189 | |
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| 190 | MEMSET(priv, (void *)start, 0, length); |
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| 191 | } |
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| 192 | } |
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| 193 | } |
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| 194 | } |
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| 195 | |
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| 196 | return DRVMGR_OK; |
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| 197 | } |
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| 198 | |
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| 199 | static int mctrl_remove(struct drvmgr_dev *dev) |
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| 200 | { |
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| 201 | /* Nothing to be done */ |
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| 202 | DBG("Removing %s\n", dev->name); |
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| 203 | return DRVMGR_OK; |
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| 204 | } |
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| 205 | |
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| 206 | /* Standard Operations */ |
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| 207 | static void mctrl_set_std(struct mctrl_priv *priv, int index, void *regs, unsigned int regval) |
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| 208 | { |
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| 209 | struct mctrl_regs *pregs = regs; |
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| 210 | |
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| 211 | /* Store new value */ |
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| 212 | pregs->mcfg[index] = regval; |
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| 213 | } |
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