1 | /* |
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2 | * start.S -- Initialization code for SH7750 generic BSP |
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3 | * |
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4 | * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia |
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5 | * Author: Victor V. Vengerov <vvv@oktet.ru> |
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6 | * |
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7 | * Based on work: |
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8 | * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and |
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9 | * Bernd Becker (becker@faw.uni-ulm.de) |
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10 | * |
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11 | * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany |
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12 | * |
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13 | * This program is distributed in the hope that it will be useful, |
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14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
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16 | * |
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17 | * Modified to reflect Hitachi EDK SH7045F: |
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18 | * John M. Mills (jmills@tga.com) |
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19 | * TGA Technologies, Inc. |
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20 | * 100 Pinnacle Way, Suite 140 |
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21 | * Norcross, GA 30071 U.S.A. |
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22 | * |
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23 | * |
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24 | * This modified file may be copied and distributed in accordance |
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25 | * the above-referenced license. It is provided for critique and |
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26 | * developmental purposes without any warranty nor representation |
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27 | * by the authors or by TGA Technologies. |
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28 | * |
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29 | * COPYRIGHT (c) 1999-2001. |
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30 | * On-Line Applications Research Corporation (OAR). |
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31 | * |
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32 | * The license and distribution terms for this file may be |
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33 | * found in the file LICENSE in this distribution or at |
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34 | * http://www.rtems.org/license/LICENSE. |
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35 | */ |
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36 | |
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37 | #include <rtems/asm.h> |
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38 | #include "rtems/score/sh4_regs.h" |
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39 | #include "rtems/score/sh7750_regs.h" |
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40 | |
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41 | BEGIN_CODE |
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42 | PUBLIC(start) |
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43 | |
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44 | /* |
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45 | * Algorithm of the first part of the start(): |
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46 | * |
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47 | * 1. Initialize stack |
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48 | * 2. Are we from reset or from gdb? Set value for boot_mode in r9. |
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49 | * 3. Initialize hardware if we are from reset. Cache is off. |
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50 | * 4. Copy data from flash to ram; set up boot mode and jump to real address. |
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51 | * 5. Zero out bss. |
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52 | * 6. Turn memory cach on. |
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53 | */ |
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54 | |
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55 | SYM (start): |
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56 | ! install the stack pointer |
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57 | mov.l stack_k,r15 |
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58 | |
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59 | mov.l initial_sr_k,r0 |
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60 | ldc r0,ssr |
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61 | ldc r0,sr |
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62 | |
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63 | ! let us see if we are from gdb stub or from power-on reset |
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64 | bsr fake_func |
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65 | nop |
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66 | fake_func: |
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67 | |
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68 | sts pr, r0 |
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69 | shlr8 r0 |
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70 | mov.l reset_pc_value_shift_8_k, r1 |
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71 | cmp/eq r0, r1 |
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72 | movt r9 ! r9 == ! boot_mode |
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73 | neg r9, r9 |
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74 | add #1, r9 ! r9 == boot_mode |
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75 | |
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76 | ! what is in boot_mode? |
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77 | cmp/pl r9 ! r9 > 0 -> T = 1 |
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78 | |
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79 | ! if boot_mode != SH4_BOOT_MODE_FLASH |
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80 | bt hw_init_end |
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81 | nop |
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82 | |
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83 | #if START_HW_INIT /* from $RTEMS_BSP.cfg */ |
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84 | ! Initialize minimal hardware |
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85 | ! to run hw_init we need to calculate its address |
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86 | ! as it is before data copying |
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87 | mov.l hw_init_k, r0 |
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88 | mov.l copy_start_k, r1 |
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89 | mov.l copy_end_k, r2 |
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90 | cmp/ge r0, r1 |
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91 | bt 0f |
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92 | cmp/ge r0, r2 |
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93 | bf 0f |
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94 | ! if copy_start <= hw_init <= copy_end then |
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95 | neg r1, r1 |
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96 | mov.l copy_start_in_rom_k, r3 |
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97 | add r1,r0 |
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98 | add r3, r0 |
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99 | 0: |
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100 | jsr @r0 |
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101 | nop !delay slot |
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102 | #endif /* START_HW_INIT */ |
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103 | hw_init_end: |
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104 | |
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105 | #if COPY_DATA_FROM_ROM |
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106 | ! copy data from rom to ram |
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107 | mov.l copy_start_k, r0 |
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108 | mov.l copy_end_k, r1 |
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109 | mov.l copy_start_in_rom_k, r2 |
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110 | |
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111 | ! if copy_from == copy_to do not copy anything |
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112 | cmp/eq r0, r2 |
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113 | bt real_address |
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114 | nop |
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115 | |
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116 | copy_data_cycle: |
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117 | cmp/ge r1, r0 |
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118 | bt end_of_copy_data_cycle |
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119 | nop |
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120 | mov.l @r2+, r3 |
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121 | mov.l r3, @r0 |
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122 | add #4, r0 |
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123 | bra copy_data_cycle |
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124 | nop |
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125 | |
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126 | end_of_copy_data_cycle: |
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127 | #endif |
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128 | ! go to 0x8....... adresses |
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129 | mov.l real_address_k, r0 |
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130 | lds r0, pr |
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131 | rts |
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132 | nop |
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133 | real_address: |
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134 | ! write boot_mode to ram |
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135 | mov.l boot_mode_k, r5 |
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136 | mov.l r9, @r5 |
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137 | |
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138 | zero_bss: |
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139 | ! zero out bss |
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140 | mov.l __bss_start_k,r0 |
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141 | mov.l __bss_end_k,r1 |
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142 | mov #0,r2 |
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143 | 0: |
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144 | mov.l r2,@r0 |
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145 | add #4,r0 |
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146 | cmp/ge r0,r1 |
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147 | bt 0b |
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148 | nop |
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149 | |
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150 | ! Turn cache on |
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151 | mov.l cache_on_k, r0 |
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152 | jsr @r0 |
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153 | nop !delay slot |
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154 | |
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155 | ! Save old value of VBR register. We will need it to allow |
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156 | ! debugger agent hook exceptions. |
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157 | mov.l __VBR_Saved_k,r0 |
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158 | stc vbr,r5 |
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159 | mov.l r5,@r0 |
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160 | ! Set up VBR register |
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161 | mov.l _vbr_base_k,r0 |
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162 | ldc r0,vbr |
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163 | |
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164 | ! initialise fpscr for gcc |
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165 | mov.l set_fpscr_k, r1 |
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166 | jsr @r1 |
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167 | nop |
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168 | |
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169 | ! Set FPSCR register |
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170 | mov.l initial_fpscr_k,r0 |
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171 | lds r0,fpscr |
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172 | |
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173 | ! call the mainline |
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174 | mov #0,r4 ! argc |
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175 | mov.l main_k,r0 |
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176 | jsr @r0 |
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177 | nop |
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178 | |
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179 | ! call exit |
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180 | mov r0,r4 |
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181 | mov.l exit_k,r0 |
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182 | jsr @r0 |
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183 | or r0,r0 |
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184 | |
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185 | .global _stop |
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186 | _stop: |
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187 | mov #11,r0 |
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188 | mov #0,r4 |
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189 | trapa #0x3f |
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190 | nop |
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191 | __stop: |
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192 | bra __stop |
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193 | nop |
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194 | |
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195 | END_CODE |
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196 | |
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197 | .align 2 |
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198 | #if START_HW_INIT |
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199 | copy_start_k: |
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200 | .long copy_start |
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201 | copy_end_k: |
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202 | .long copy_end |
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203 | #endif |
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204 | #if COPY_DATA_FROM_ROM |
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205 | copy_start_in_rom_k: |
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206 | .long copy_start_in_rom |
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207 | #endif |
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208 | |
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209 | real_address_k: |
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210 | .long real_address |
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211 | set_fpscr_k: |
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212 | .long ___set_fpscr |
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213 | _vbr_base_k: |
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214 | .long SYM(_vbr_base) |
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215 | __VBR_Saved_k: |
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216 | .long SYM(_VBR_Saved) |
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217 | stack_k: |
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218 | .long SYM(_Configuration_Interrupt_stack_area_end) |
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219 | __bss_start_k: |
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220 | .long __bss_start |
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221 | __bss_end_k: |
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222 | .LONG __bss_end |
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223 | main_k: |
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224 | .long SYM(boot_card) |
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225 | exit_k: |
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226 | .long SYM(_exit) |
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227 | |
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228 | #if START_HW_INIT /* from $RTEMS_BSP.cfg */ |
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229 | hw_init_k: |
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230 | .long SYM(early_hw_init) |
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231 | #endif /* START_HW_INIT */ |
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232 | |
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233 | cache_on_k: |
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234 | .long SYM(bsp_cache_on) |
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235 | |
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236 | vects_k: |
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237 | .long SYM(vectab) |
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238 | vects_size: |
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239 | .word 255 |
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240 | |
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241 | .align 2 |
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242 | initial_sr_k: |
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243 | .long SH4_SR_MD | SH4_SR_IMASK |
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244 | initial_fpscr_k: |
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245 | #ifdef __SH4__ |
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246 | .long SH4_FPSCR_DN | SH4_FPSCR_PR | SH4_FPSCR_RM |
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247 | #else |
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248 | .long SH4_FPSCR_DN | SH4_FPSCR_RM |
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249 | #endif |
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250 | |
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251 | reset_pc_value_shift_8_k: |
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252 | .long 0xa00000 |
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253 | |
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254 | boot_mode_k: |
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255 | .long _boot_mode |
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256 | |
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257 | #ifdef __ELF__ |
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258 | .section .bss,"aw" |
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259 | #else |
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260 | .section .bss |
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261 | #endif |
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262 | |
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263 | .global __sh4sim_dummy_register |
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264 | __sh4sim_dummy_register: |
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265 | .long 0 |
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266 | |
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267 | .section .data |
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268 | .global _boot_mode |
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269 | _boot_mode: |
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270 | .long 0 |
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