source: rtems/bsps/sh/gensh4/start/start.S @ 511dc4b

Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 19, 2018 at 7:09:51 AM

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

  • Property mode set to 100644
File size: 6.0 KB
Line 
1/*
2 * start.S -- Initialization code for SH7750 generic BSP
3 *
4 * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
5 * Author: Victor V. Vengerov <vvv@oktet.ru>
6 *
7 * Based on work:
8 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
9 *           Bernd Becker (becker@faw.uni-ulm.de)
10 *
11 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 *  Modified to reflect Hitachi EDK SH7045F:
18 *  John M. Mills (jmills@tga.com)
19 *  TGA Technologies, Inc.
20 *  100 Pinnacle Way, Suite 140
21 *  Norcross, GA 30071 U.S.A.
22 *
23 *
24 *  This modified file may be copied and distributed in accordance
25 *  the above-referenced license. It is provided for critique and
26 *  developmental purposes without any warranty nor representation
27 *  by the authors or by TGA Technologies.
28 *
29 *  COPYRIGHT (c) 1999-2001.
30 *  On-Line Applications Research Corporation (OAR).
31 *
32 *  The license and distribution terms for this file may be
33 *  found in the file LICENSE in this distribution or at
34 *  http://www.rtems.org/license/LICENSE.
35 */
36
37#include <rtems/asm.h>
38#include "rtems/score/sh4_regs.h"
39#include "rtems/score/sh7750_regs.h"
40
41        BEGIN_CODE
42        PUBLIC(start)
43
44/*
45 * Algorithm of the first part of the start():
46 *
47 * 1. Initialize stack
48 * 2. Are we from reset or from gdb? Set value for boot_mode in r9.
49 * 3. Initialize hardware if we are from reset. Cache is off.
50 * 4. Copy data from flash to ram; set up boot mode and jump to real address.
51 * 5. Zero out bss.
52 * 6. Turn memory cach on.
53 */
54
55SYM (start):
56        ! install the stack pointer
57        mov.l   stack_k,r15
58
59        mov.l   initial_sr_k,r0
60        ldc     r0,ssr
61        ldc     r0,sr
62
63        ! let us see if we are from gdb stub or from power-on reset
64        bsr     fake_func
65        nop
66fake_func:
67
68        sts     pr, r0
69        shlr8   r0
70        mov.l   reset_pc_value_shift_8_k, r1
71        cmp/eq  r0, r1
72        movt    r9      ! r9 == ! boot_mode
73        neg     r9, r9
74        add     #1, r9  ! r9 == boot_mode
75
76        ! what is in boot_mode?
77        cmp/pl  r9      ! r9 > 0  ->  T = 1
78
79        ! if boot_mode != SH4_BOOT_MODE_FLASH
80        bt      hw_init_end
81        nop
82
83#if START_HW_INIT       /* from $RTEMS_BSP.cfg */
84        ! Initialize minimal hardware
85        ! to run hw_init we need to calculate its address
86        ! as it is before data copying
87        mov.l   hw_init_k, r0
88        mov.l   copy_start_k, r1
89        mov.l   copy_end_k, r2
90        cmp/ge  r0, r1
91        bt      0f
92        cmp/ge  r0, r2
93        bf      0f
94        ! if  copy_start <= hw_init <= copy_end  then
95        neg     r1, r1
96        mov.l   copy_start_in_rom_k, r3
97        add     r1,r0
98        add     r3, r0
990:
100        jsr @r0
101        nop             !delay slot
102#endif /* START_HW_INIT */
103hw_init_end:
104
105#if COPY_DATA_FROM_ROM
106        ! copy data from rom to ram
107        mov.l   copy_start_k, r0
108        mov.l   copy_end_k, r1
109        mov.l   copy_start_in_rom_k, r2
110
111        ! if copy_from == copy_to do not copy anything
112        cmp/eq  r0, r2
113        bt      real_address
114        nop
115
116copy_data_cycle:
117        cmp/ge  r1, r0
118        bt      end_of_copy_data_cycle
119        nop
120        mov.l   @r2+, r3
121        mov.l   r3, @r0
122        add     #4, r0
123        bra     copy_data_cycle
124        nop
125
126end_of_copy_data_cycle:
127#endif
128        ! go to 0x8....... adresses
129        mov.l   real_address_k, r0
130        lds     r0, pr
131        rts
132        nop
133real_address:
134        ! write boot_mode to ram
135        mov.l   boot_mode_k, r5
136        mov.l   r9, @r5
137
138zero_bss:
139        ! zero out bss
140        mov.l   __bss_start_k,r0
141        mov.l   __bss_end_k,r1
142        mov     #0,r2
1430:
144        mov.l   r2,@r0
145        add     #4,r0
146        cmp/ge  r0,r1
147        bt      0b
148        nop
149
150        ! Turn cache on
151        mov.l   cache_on_k, r0
152        jsr @r0
153        nop     !delay slot
154
155        ! Save old value of VBR register. We will need it to allow
156        ! debugger agent hook exceptions.
157        mov.l   __VBR_Saved_k,r0
158        stc     vbr,r5
159        mov.l   r5,@r0
160        ! Set up VBR register
161        mov.l   _vbr_base_k,r0
162        ldc     r0,vbr
163
164        ! initialise fpscr for gcc
165        mov.l set_fpscr_k, r1
166        jsr @r1
167        nop
168
169        ! Set FPSCR register
170        mov.l   initial_fpscr_k,r0
171        lds     r0,fpscr
172
173        ! call the mainline
174        mov #0,r4               ! argc
175        mov.l main_k,r0
176        jsr @r0
177        nop
178
179        ! call exit
180        mov     r0,r4
181        mov.l   exit_k,r0
182        jsr     @r0
183        or      r0,r0
184
185        .global _stop
186_stop:
187        mov     #11,r0
188        mov     #0,r4
189        trapa   #0x3f
190        nop
191__stop:
192        bra     __stop
193        nop
194
195        END_CODE
196
197        .align 2
198#if START_HW_INIT
199copy_start_k:
200        .long copy_start
201copy_end_k:
202        .long copy_end
203#endif
204#if COPY_DATA_FROM_ROM
205copy_start_in_rom_k:
206        .long copy_start_in_rom
207#endif
208
209real_address_k:
210        .long real_address
211set_fpscr_k:
212    .long   ___set_fpscr
213_vbr_base_k:
214        .long   SYM(_vbr_base)
215__VBR_Saved_k:
216        .long   SYM(_VBR_Saved)
217stack_k:
218        .long   SYM(_Configuration_Interrupt_stack_area_end)
219__bss_start_k:
220        .long   __bss_start
221__bss_end_k:
222        .LONG   __bss_end
223main_k:
224        .long   SYM(boot_card)
225exit_k:
226        .long   SYM(_exit)
227
228#if     START_HW_INIT   /* from $RTEMS_BSP.cfg */
229hw_init_k:
230        .long   SYM(early_hw_init)
231#endif /* START_HW_INIT */
232
233cache_on_k:
234        .long   SYM(bsp_cache_on)
235
236vects_k:
237        .long   SYM(vectab)
238vects_size:
239        .word   255
240
241    .align 2
242initial_sr_k:
243        .long   SH4_SR_MD | SH4_SR_IMASK
244initial_fpscr_k:
245#ifdef __SH4__
246        .long   SH4_FPSCR_DN | SH4_FPSCR_PR | SH4_FPSCR_RM
247#else
248        .long   SH4_FPSCR_DN | SH4_FPSCR_RM
249#endif
250
251reset_pc_value_shift_8_k:
252        .long   0xa00000
253
254boot_mode_k:
255        .long   _boot_mode
256
257#ifdef __ELF__
258        .section .bss,"aw"
259#else
260        .section .bss
261#endif
262
263        .global __sh4sim_dummy_register
264__sh4sim_dummy_register:
265        .long   0
266
267        .section    .data
268        .global _boot_mode
269_boot_mode:
270        .long   0
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