source: rtems/bsps/sh/gensh2/start/linkcmds.rom @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

  • Property mode set to 100644
File size: 7.4 KB
Line 
1/*
2 * This is an adapted linker script from egcs-1.0.1
3 *
4 * Memory layout for an SH7045F with main memory in area 2
5 * This memory layout it very similar to that used for Hitachi's
6 * EVB with CMON in FLASH
7 *
8 * NOTE: The ram start address may vary, all other start addresses are fixed
9 *       Not suiteable for gdb's simulator
10 *
11 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
12 *           Bernd Becker (becker@faw.uni-ulm.de)
13 *
14 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
15 *
16 *  This program is distributed in the hope that it will be useful,
17 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19 *
20 *
21 *  COPYRIGHT (c) 1998.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be
25 *  found in the file LICENSE in this distribution or at
26 *  http://www.rtems.org/license/LICENSE.
27 *
28 *      Modified to reflect SH7045F processor and EVB:
29 *      John M. Mills (jmills@tga.com)
30 *      TGA Technologies, Inc.
31 *      100 Pinnacle Way, Suite 140
32 *      Norcross, GA 30071 U.S.A.
33 *
34 *      This modified file may be copied and distributed in accordance
35 *      the above-referenced license. It is provided for critique and
36 *      developmental purposes without any warranty nor representation
37 *      by the authors or by TGA Technologies.
38 */
39
40OUTPUT_ARCH(sh)
41ENTRY(_start)
42STARTUP(start.o)
43
44/* These asignments represent actual SH7045F EVB architecture */
45_RamBase = DEFINED(_RamBase) ? _RamBase : 0x00400000;
46_RamSize = DEFINED(_RamSize) ? _RamSize : 0x0008000;
47_HeapSize = DEFINED(_HeapSize) ? _HeapSize : 0x0;
48
49MEMORY
50{
51  rom           : o = 0x00000000, l = 0x00040000
52  ram           : o = 0x00400000, l = 0x00080000
53  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
54  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
55}
56
57
58/* Sections are defined for RAM loading and monitor debugging */
59SECTIONS
60{
61  /* boot vector table */
62  .monvects 0x00000000 (NOLOAD): {
63    _monvects = . ;
64  } > rom
65
66  /* monitor play area */
67  .monram 0x00400000 (NOLOAD) :
68  {
69  _ramstart = .;
70  } > ram
71
72  /* monitor vector table */
73  .vects   0x00402000 (NOLOAD) : {
74    _vectab = . ;
75    *(.vects);
76  }
77
78  /* Read-only sections, merged into text segment: */
79
80  . = 0x00404000 ;
81  .interp        : { *(.interp)         }
82  .hash          : { *(.hash)           }
83  .dynsym        : { *(.dynsym)         }
84  .dynstr        : { *(.dynstr)         }
85  .gnu.version   : { *(.gnu.version)    }
86  .gnu.version_d : { *(.gnu.version_d)  }
87  .gnu.version_r : { *(.gnu.version_r)  }
88  .rela.dyn       :
89    {
90      *(.rela.init)
91      *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
92      *(.rela.fini)
93      *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
94      *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
95      *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
96      *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
97      *(.rela.ctors)
98      *(.rela.dtors)
99      *(.rela.got)
100      *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
101      *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
102      *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
103      *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
104      *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
105    } >ram
106  .rel.text      :
107    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
108  .rel.data      :
109    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
110  .rel.rodata    :
111    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
112  .rel.got       : { *(.rel.got)                }
113  .rel.ctors     : { *(.rel.ctors)      }
114  .rel.dtors     : { *(.rel.dtors)      }
115  .rel.init      : { *(.rel.init)       }
116  .rel.fini      : { *(.rel.fini)       }
117  .rel.bss       : { *(.rel.bss)                }
118  .rel.plt       : { *(.rel.plt)                }
119  .init          : { *(.init)   } =0
120  .plt           : { *(.plt)    }
121  .text   .      :
122  {
123    *(.text*)
124    *(.stub)
125
126    /*
127     * Special FreeBSD sysctl sections.
128     */
129    . = ALIGN (16);
130    ___start_set_sysctl_set = .;
131    *(set_sysc*);   /* set_sysctl_* but name is truncated by SH-coff */
132    ___stop_set_sysctl_set = ABSOLUTE(.);
133    *(set_doma*);   /* set_domain_* but name is truncated by SH-coff */
134    *(set_pseudo_*);
135
136    /* .gnu.warning sections are handled specially by elf32.em.  */
137    *(.gnu.warning)
138    *(.gnu.linkonce.t*)
139  } > ram
140  _etext = .;
141  PROVIDE (etext = .);
142  .fini    .  : { *(.fini)    } > ram =0
143  .rodata  .  : { *(.rodata) KEEP (*(SORT(.rtemsroset.*))) *(.gnu.linkonce.r*) } > ram
144  .rodata1 .  : { *(.rodata1) } > ram
145  .tdata : {
146    __TLS_Data_begin = .;
147    *(.tdata .tdata.* .gnu.linkonce.td.*)
148    __TLS_Data_end = .;
149  } > ram
150  .tbss : {
151    __TLS_BSS_begin = .;
152    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
153    __TLS_BSS_end = .;
154  } > ram
155  __TLS_Data_size = __TLS_Data_end - __TLS_Data_begin;
156  __TLS_Data_begin = __TLS_Data_size != 0 ? __TLS_Data_begin : __TLS_BSS_begin;
157  __TLS_Data_end = __TLS_Data_size != 0 ? __TLS_Data_end : __TLS_BSS_begin;
158  __TLS_BSS_size = __TLS_BSS_end - __TLS_BSS_begin;
159  __TLS_Size = __TLS_BSS_end - __TLS_Data_begin;
160  __TLS_Alignment = MAX (ALIGNOF (.tdata), ALIGNOF (.tbss));
161  /* Adjust the address for the data segment.  We want to adjust up to
162     the same address within the page on the next page up.  */
163  . = ALIGN(128) + (. & (128 - 1));
164  .data  .  :
165  {
166    *(.data)
167    KEEP (*(SORT(.rtemsrwset.*)))
168    *(.gnu.linkonce.d*)
169    CONSTRUCTORS
170  } > ram
171  .data1  . : { *(.data1) }
172  .ctors  .       :
173  {
174    ___ctors = .;
175    *(.ctors)
176    ___ctors_end = .;
177  }
178  .dtors  .       :
179  {
180    ___dtors = .;
181    *(.dtors)
182    ___dtors_end = .;
183  }
184  .got     .      : { *(.got.plt) *(.got) }
185  .dynamic .      : { *(.dynamic) }
186  /* We want the small data sections together, so single-instruction offsets
187     can access them all, and initialized data all before uninitialized, so
188     we can shorten the on-disk segment size.  */
189  .sdata   .  : { *(.sdata) }
190  _edata  =  .;
191  PROVIDE (edata = .);
192  __bss_start = .;
193  .sbss    .  : { *(.sbss*) *(.scommon) }
194  .bss     .  :
195  {
196   *(.dynbss)
197   *(.bss .bss* .gnu.linkonce.b*)
198   *(COMMON)
199  } > ram
200  _end = . ;
201  PROVIDE (end = .);
202
203  _HeapStart = . ;
204  . = . + 1024 * 20 ;
205  PROVIDE( _HeapEnd = . );
206
207  _WorkAreaBase = . ;
208
209  .rtemsstack (NOLOAD) : {
210    *(SORT(.rtemsstack.*))
211  } > onchip_ram
212
213  /* Stabs debugging sections.  */
214  .stab 0 : { *(.stab) }
215  .stabstr 0 : { *(.stabstr) }
216  .stab.excl 0 : { *(.stab.excl) }
217  .stab.exclstr 0 : { *(.stab.exclstr) }
218  .stab.index 0 : { *(.stab.index) }
219  .stab.indexstr 0 : { *(.stab.indexstr) }
220  .comment 0 : { *(.comment) }
221  /* DWARF debug sections.
222     Symbols in the DWARF debugging sections are relative to the beginning
223     of the section so we begin them at 0.  */
224  /* DWARF 1 */
225  .debug          0 : { *(.debug) }
226  .line           0 : { *(.line) }
227  /* GNU DWARF 1 extensions */
228  .debug_srcinfo  0 : { *(.debug_srcinfo) }
229  .debug_sfnames  0 : { *(.debug_sfnames) }
230  /* DWARF 1.1 and DWARF 2 */
231  .debug_aranges  0 : { *(.debug_aranges) }
232  .debug_pubnames 0 : { *(.debug_pubnames) }
233  /* DWARF 2 */
234  .debug_info     0 : { *(.debug_info) }
235  .debug_abbrev   0 : { *(.debug_abbrev) }
236  .debug_line     0 : { *(.debug_line) }
237  .debug_frame    0 : { *(.debug_frame) }
238  .debug_str      0 : { *(.debug_str) }
239  .debug_loc      0 : { *(.debug_loc) }
240  .debug_macinfo  0 : { *(.debug_macinfo) }
241  /* SGI/MIPS DWARF 2 extensions */
242  .debug_weaknames 0 : { *(.debug_weaknames) }
243  .debug_funcnames 0 : { *(.debug_funcnames) }
244  .debug_typenames 0 : { *(.debug_typenames) }
245  .debug_varnames  0 : { *(.debug_varnames) }
246  /* These must appear regardless of  .  */
247}
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