source: rtems/bsps/sh/gensh2/clock/ckinit.c @ bb99cd0d

5
Last change on this file since bb99cd0d was bb99cd0d, checked in by Sebastian Huber <sebastian.huber@…>, on Dec 5, 2019 at 6:22:33 PM

clock: Simplify driver initialization

Use a system initialization handler instead of a legacy IO driver.

Update #3834.

  • Property mode set to 100644
File size: 5.7 KB
Line 
1/*
2 *  This file contains the clock driver the Hitachi SH 704X
3 */
4
5/*
6 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
7 *           Bernd Becker (becker@faw.uni-ulm.de)
8 *
9 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
10 *
11 *  This program is distributed in the hope that it will be useful,
12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
14 *
15 *  COPYRIGHT (c) 1998.
16 *  On-Line Applications Research Corporation (OAR).
17 *
18 *      Modified to reflect registers of sh7045 processor:
19 *      John M. Mills (jmills@tga.com)
20 *      TGA Technologies, Inc.
21 *      100 Pinnacle Way, Suite 140
22 *      Norcross, GA 30071 U.S.A.
23 *      August, 1999
24 *
25 *      This modified file may be copied and distributed in accordance
26 *      the above-referenced license. It is provided for critique and
27 *      developmental purposes without any warranty nor representation
28 *      by the authors or by TGA Technologies.
29 *
30 *  The license and distribution terms for this file may be
31 *  found in the file LICENSE in this distribution or at
32 *  http://www.rtems.org/license/LICENSE.
33 */
34
35#include <rtems.h>
36
37#include <stdlib.h>
38
39#include <rtems/clockdrv.h>
40#include <rtems/score/sh_io.h>
41#include <rtems/score/sh.h>
42#include <rtems/score/ispsh7045.h>
43#include <rtems/score/iosh7045.h>
44
45static void Clock_exit( void );
46
47extern uint32_t bsp_clicks_per_second;
48
49#define _MTU_COUNTER0_MICROSECOND (Clock_MHZ/16)
50
51#ifndef CLOCKPRIO
52#define CLOCKPRIO 10
53#endif
54
55#define MTU0_STARTMASK  0xfe
56#define MTU0_SYNCMASK   0xfe
57#define MTU0_MODEMASK   0xc0
58#define MTU0_TCRMASK    0x22 /* bit 7 also used, vs 703x */
59#define MTU0_STAT_MASK  0xc0
60#define MTU0_IRQMASK    0xfe
61#define MTU0_TIERMASK   0x01
62#define IPRC_MTU0_MASK  0xff0f
63#define MTU0_TIORVAL    0x08
64
65/*
66 *  The interrupt vector number associated with the clock tick device
67 *  driver.
68 */
69
70#define CLOCK_VECTOR MTUA0_ISP_V
71
72/*
73 *  Clock_driver_ticks is a monotonically increasing counter of the
74 *  number of clock ticks since the driver was initialized.
75 */
76volatile uint32_t   Clock_driver_ticks;
77
78static rtems_isr Clock_isr( rtems_vector_number vector );
79static uint32_t   Clock_MHZ ;
80
81/*
82 *  Clock_isrs is the number of clock ISRs until the next invocation of
83 *  the RTEMS clock tick routine.  The clock tick device driver
84 *  gets an interrupt once a millisecond and counts down until the
85 *  length of time between the user configured microseconds per tick
86 *  has passed.
87 */
88uint32_t   Clock_isrs;              /* ISRs until next tick */
89static uint32_t   Clock_isrs_const;        /* only calculated once */
90
91/*
92 *  The previous ISR on this clock tick interrupt vector.
93 */
94rtems_isr_entry  Old_ticker;
95
96/*
97 *  Isr Handler
98 */
99static rtems_isr Clock_isr(
100  rtems_vector_number vector
101)
102{
103  /*
104   * bump the number of clock driver ticks since initialization
105   *
106
107   * determine if it is time to announce the passing of tick as configured
108   * to RTEMS through the rtems_clock_tick directive
109   *
110   * perform any timer dependent tasks
111   */
112  uint8_t   temp;
113
114  /* reset the flags of the status register */
115  temp = read8( MTU_TSR0) & MTU0_STAT_MASK;
116  write8( temp, MTU_TSR0);
117
118  Clock_driver_ticks++ ;
119
120  if( Clock_isrs == 1)
121    {
122      rtems_clock_tick();
123      Clock_isrs = Clock_isrs_const;
124    }
125  else
126    {
127      Clock_isrs-- ;
128    }
129}
130
131/*
132 *  Install_clock
133 *
134 *  Install a clock tick handler and reprograms the chip.  This
135 *  is used to initially establish the clock tick.
136 */
137static void Install_clock(
138  rtems_isr_entry clock_isr
139)
140{
141  uint8_t   temp8 = 0;
142  uint32_t   factor = 1000000;
143
144  /*
145   *  Initialize the clock tick device driver variables
146   */
147
148  Clock_driver_ticks = 0;
149  Clock_isrs_const = rtems_configuration_get_microseconds_per_tick() / 10000;
150  Clock_isrs = Clock_isrs_const;
151
152  factor /= rtems_configuration_get_microseconds_per_tick(); /* minimalization of integer division error */
153  Clock_MHZ = bsp_clicks_per_second / factor ;
154
155  rtems_interrupt_catch( Clock_isr, CLOCK_VECTOR, &Old_ticker );
156
157  /*
158   *  Hardware specific initialize goes here
159   */
160
161  /* stop Timer 0 */
162  temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
163  write8( temp8, MTU_TSTR);
164
165  /* set initial counter value to 0 */
166  write16( 0, MTU_TCNT0);
167
168  /* Timer 0 runs independent */
169  temp8 = read8( MTU_TSYR) & MTU0_SYNCMASK;
170  write8( temp8, MTU_TSYR);
171
172  /* Timer 0 normal mode */
173  temp8 = read8( MTU_TMDR0) & MTU0_MODEMASK;
174  write8( temp8, MTU_TMDR0);
175
176  /* TCNT is cleared by GRA ; internal clock /16 */
177  write8( MTU0_TCRMASK , MTU_TCR0);
178
179  /* use GRA without I/O - pins  */
180  write8( MTU0_TIORVAL, MTU_TIORL0);
181
182  /* reset flags of the status register */
183  temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK;
184  write8( temp8, MTU_TSR0);
185
186  /* Irq if is equal GRA */
187  temp8 = read8( MTU_TIER0) | MTU0_TIERMASK;
188  write8( temp8, MTU_TIER0);
189
190  /* set interrupt priority */
191  if( sh_set_irq_priority( CLOCK_VECTOR, CLOCKPRIO ) != RTEMS_SUCCESSFUL)
192    rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED);
193
194  /* set counter limits */
195  write16( _MTU_COUNTER0_MICROSECOND, MTU_GR0A);
196
197  /* start counter */
198  temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK;
199  write8( temp8, MTU_TSTR);
200
201  /*
202   *  Schedule the clock cleanup routine to execute if the application exits.
203   */
204  atexit( Clock_exit );
205}
206
207/*
208 *  Clean up before the application exits
209 */
210void Clock_exit( void )
211{
212  uint8_t   temp8 = 0;
213
214  /* turn off the timer interrupts */
215  /* set interrupt priority to 0 */
216  if( sh_set_irq_priority( CLOCK_VECTOR, 0 ) != RTEMS_SUCCESSFUL)
217    rtems_fatal_error_occurred( RTEMS_UNSATISFIED);
218
219/*
220 *   temp16 = read16( MTU_TIER0) & IPRC_MTU0_IRQMASK;
221 *   write16( temp16, MTU_TIER0);
222 */
223
224  /* stop counter */
225  temp8 = read8( MTU_TSTR) & MTU0_STARTMASK;
226  write8( temp8, MTU_TSTR);
227
228  /* old vector shall not be installed */
229}
230
231void _Clock_Initialize( void )
232{
233  Install_clock( Clock_isr );
234}
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