source: rtems/bsps/riscv/riscv_generic/start/start.S @ 511dc4b

5
Last change on this file since 511dc4b was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 3.5 KB
Line 
1/*
2 * Copyright (c) 2015 University of York.
3 * Hesham Almatary <hesham@alumni.york.ac.uk>
4 *
5 * Copyright (c) 2013, The Regents of the University of California (Regents).
6 * All Rights Reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29#include <bsp/linker-symbols.h>
30#include <rtems/score/riscv-utility.h>
31#include <rtems/score/cpu.h>
32#include <rtems/asm.h>
33
34EXTERN(bsp_section_bss_begin)
35EXTERN(bsp_section_bss_end)
36EXTERN(ISR_Handler)
37EXTERN(bsp_start_vector_table_size)
38EXTERN(bsp_vector_table_size)
39EXTERN(bsp_section_stack_begin)
40
41PUBLIC(bsp_start_vector_table_begin)
42PUBLIC(bsp_start_vector_table_end)
43PUBLIC(_start)
44
45.section .start, "wax"
46TYPE_FUNC(_start)
47SYM(_start):
48  li x2, 0
49  li x3, 0
50  li x4, 0
51  li x5, 0
52  li x6, 0
53  li x7, 0
54  li x8, 0
55  li x9, 0
56  li x10, 0
57  li x11, 0
58  li x12, 0
59  li x13, 0
60  li x14, 0
61  li x15, 0
62  li x16, 0
63  li x17, 0
64  li x18, 0
65  li x19, 0
66  li x20, 0
67  li x21, 0
68  li x22, 0
69  li x23, 0
70  li x24, 0
71  li x25, 0
72  li x26, 0
73  li x27, 0
74  li x28, 0
75  li x29, 0
76  li x30, 0
77  li x31, 0
78
79  la t0, ISR_Handler
80  csrw mtvec, t0
81
82  /* load stack and frame pointers */
83  la sp, _Configuration_Interrupt_stack_area_end
84
85  /* Clearing .bss */
86  la t0, bsp_section_bss_begin
87  la t1, bsp_section_bss_end
88
89_loop_clear_bss:
90  bge   t0, t1, _end_clear_bss
91  SREG    x0, 0(t0)
92  addi  t0, t0, CPU_SIZEOF_POINTER
93  j     _loop_clear_bss
94_end_clear_bss:
95
96  /* Init FPU unit if it's there */
97  li t0, MSTATUS_FS
98  csrs mstatus, t0
99
100  j boot_card
101
102  .align 4
103bsp_start_vector_table_begin:
104  .word _RISCV_Exception_default /* User int */
105  .word _RISCV_Exception_default /* Supervisor int */
106  .word _RISCV_Exception_default /* Reserved */
107  .word _RISCV_Exception_default /* Machine int */
108  .word _RISCV_Exception_default /* User timer int */
109  .word _RISCV_Exception_default /* Supervisor Timer int */
110  .word _RISCV_Exception_default /* Reserved */
111  .word _RISCV_Exception_default /* Machine Timer int */
112  .word _RISCV_Exception_default /* User external int */
113  .word _RISCV_Exception_default /* Supervisor external int */
114  .word _RISCV_Exception_default /* Reserved */
115  .word _RISCV_Exception_default /* Machine external int */
116  .word _RISCV_Exception_default
117  .word _RISCV_Exception_default
118  .word _RISCV_Exception_default
119  .word _RISCV_Exception_default
120bsp_start_vector_table_end:
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