source: rtems/bsps/riscv/riscv/include/bsp/irq.h @ 6f5d88a

Last change on this file since 6f5d88a was 6f5d88a, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 22, 2018 at 5:06:57 AM

bsp/riscv_generic: Rename to "riscv"

Update #3433.

  • Property mode set to 100644
File size: 1.7 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup RISCV_IRQ
5 *
6 * @brief Interrupt definitions.
7 */
8
9/*
10 *
11 * Copyright (c) 2015 University of York.
12 * Hesham Almatary <hesham@alumni.york.ac.uk>
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 *    notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 *    notice, this list of conditions and the following disclaimer in the
21 *    documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 */
35
36#ifndef LIBBSP_GENERIC_RISCV_IRQ_H
37#define LIBBSP_GENERIC_RISCV_IRQ_H
38
39#ifndef ASM
40
41#include <rtems.h>
42#include <rtems/irq.h>
43#include <rtems/irq-extension.h>
44
45#define BSP_INTERRUPT_VECTOR_MIN  0x0
46#define BSP_INTERRUPT_VECTOR_MAX  0x24
47
48#endif /* ASM */
49#endif /* LIBBSP_GENERIC_RISCV_IRQ_H */
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