source: rtems/bsps/riscv/riscv/include/bsp.h @ 26853a06

Last change on this file since 26853a06 was 26853a06, checked in by Alan Cudmore <alan.cudmore@…>, on 03/15/23 at 13:41:53

bsps/riscv: add riscv/kendrytek210 BSP variant source changes

This patch adds support for the Kendryte K210 RISC-V BSP variant.
The SoC uses the existing Interrupt Controller, Timer, and console UART.
It only needs SoC specific initialization and an embedded device tree binary
similar to the polarfire SoC BSP.

Updates #4876
  • Property mode set to 100644
File size: 2.2 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @ingroup RTEMSBSPsRISCVGeneric
7 *
8 * @brief Global BSP definitions.
9 */
10
11/*
12 *
13 * Copyright (c) 2015 University of York.
14 * Hesham Almatary <hesham@alumni.york.ac.uk>
15 *
16 * COPYRIGHT (c) 1989-1999.
17 * On-Line Applications Research Corporation (OAR).
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 * 1. Redistributions of source code must retain the above copyright
23 *    notice, this list of conditions and the following disclaimer.
24 * 2. Redistributions in binary form must reproduce the above copyright
25 *    notice, this list of conditions and the following disclaimer in the
26 *    documentation and/or other materials provided with the distribution.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 */
40
41#ifndef LIBBSP_RISCV_GENERIC_H
42#define LIBBSP_RISCV_GENERIC_H
43
44/**
45 * @defgroup RTEMSBSPsRISCVGeneric Generic
46 *
47 * @ingroup RTEMSBSPsRISCV
48 *
49 * @brief Generic RISC-V Board Support Package.
50 *
51 * @{
52 */
53
54#include <rtems.h>
55#include <rtems/clockdrv.h>
56#include <rtems/console.h>
57
58#include <bspopts.h>
59#include <bsp/default-initial-extension.h>
60
61#include <rtems/devnull.h>
62
63#if RISCV_ENABLE_KENDRYTE_K210_SUPPORT != 0
64   #include <bsp/k210.h>
65#endif
66
67#ifdef __cplusplus
68extern "C" {
69#endif
70
71#define BSP_FEATURE_IRQ_EXTENSION
72
73#define BSP_FDT_IS_SUPPORTED
74
75#ifdef __cplusplus
76}
77#endif
78
79/** @} */
80
81#endif /* LIBBSP_RISCV_GENERIC_H */
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