1 | /* |
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2 | * Copyright (c) 2018 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <info@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <rtems/bspIo.h> |
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16 | #include <rtems/console.h> |
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17 | #include <rtems/sysinit.h> |
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18 | #include <rtems/termiostypes.h> |
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19 | |
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20 | #include <bsp/fatal.h> |
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21 | #include <bsp/fdt.h> |
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22 | #include <bsp/irq.h> |
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23 | #include <bsp/riscv.h> |
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24 | |
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25 | #include <dev/serial/htif.h> |
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26 | #include <libchip/ns16550.h> |
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27 | |
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28 | #include <libfdt.h> |
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29 | #include <string.h> |
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30 | |
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31 | #if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 |
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32 | #include <bsp/fe310-uart.h> |
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33 | fe310_uart_context fe310_uart_instance; |
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34 | #endif |
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35 | |
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36 | #if RISCV_ENABLE_HTIF_SUPPORT != 0 |
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37 | static htif_console_context htif_console_instance; |
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38 | #endif |
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39 | |
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40 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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41 | static ns16550_context ns16550_instances[RISCV_CONSOLE_MAX_NS16550_DEVICES]; |
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42 | #endif |
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43 | |
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44 | static struct { |
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45 | rtems_termios_device_context *context; |
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46 | void (*putchar)(rtems_termios_device_context *base, char c); |
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47 | int (*getchar)(rtems_termios_device_context *base); |
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48 | } riscv_console; |
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49 | |
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50 | static void riscv_output_char(char c) |
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51 | { |
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52 | (*riscv_console.putchar)(riscv_console.context, c); |
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53 | } |
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54 | |
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55 | static int riscv_get_console_node(const void *fdt) |
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56 | { |
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57 | const char *stdout_path; |
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58 | int node; |
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59 | |
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60 | node = fdt_path_offset(fdt, "/chosen"); |
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61 | |
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62 | stdout_path = fdt_getprop(fdt, node, "stdout-path", NULL); |
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63 | if (stdout_path == NULL) { |
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64 | stdout_path = ""; |
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65 | } |
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66 | |
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67 | #if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 |
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68 | int root; |
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69 | int soc; |
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70 | root = fdt_path_offset(fdt, "/"); |
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71 | soc = fdt_subnode_offset(fdt, root, "soc"); |
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72 | |
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73 | int offset=fdt_subnode_offset(fdt, soc,stdout_path); |
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74 | |
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75 | return offset; |
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76 | #else |
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77 | return fdt_path_offset(fdt, stdout_path); |
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78 | #endif |
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79 | } |
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80 | |
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81 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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82 | static uint8_t riscv_console_get_reg_8(uintptr_t addr, uint8_t i) |
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83 | { |
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84 | volatile uint8_t *reg; |
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85 | |
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86 | reg = (uint8_t *) addr; |
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87 | return reg[i]; |
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88 | } |
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89 | |
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90 | static void riscv_console_set_reg_8(uintptr_t addr, uint8_t i, uint8_t val) |
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91 | { |
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92 | volatile uint8_t *reg; |
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93 | |
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94 | reg = (uint8_t *)addr; |
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95 | reg[i] = val; |
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96 | } |
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97 | |
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98 | static uint8_t riscv_console_get_reg_32(uintptr_t addr, uint8_t i) |
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99 | { |
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100 | volatile uint32_t *reg; |
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101 | |
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102 | reg = (uint32_t *) addr; |
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103 | return reg[i]; |
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104 | } |
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105 | |
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106 | static void riscv_console_set_reg_32(uintptr_t addr, uint8_t i, uint8_t val) |
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107 | { |
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108 | volatile uint32_t *reg; |
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109 | |
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110 | reg = (uint32_t *)addr; |
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111 | reg[i] = val; |
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112 | } |
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113 | #endif |
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114 | |
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115 | #define RISCV_CONSOLE_IS_COMPATIBLE(actual, actual_len, desired) \ |
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116 | (actual_len == sizeof(desired) \ |
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117 | && memcmp(actual, desired, sizeof(desired) - 1) == 0) |
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118 | |
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119 | static void riscv_console_probe(void) |
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120 | { |
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121 | const void *fdt; |
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122 | int node; |
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123 | int console_node; |
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124 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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125 | size_t ns16550_devices; |
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126 | #endif |
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127 | |
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128 | fdt = bsp_fdt_get(); |
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129 | console_node = riscv_get_console_node(fdt); |
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130 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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131 | ns16550_devices = 0; |
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132 | #endif |
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133 | |
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134 | node = fdt_next_node(fdt, -1, NULL); |
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135 | |
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136 | while (node >= 0) { |
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137 | const char *compat; |
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138 | int compat_len; |
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139 | |
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140 | compat = fdt_getprop(fdt, node, "compatible", &compat_len); |
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141 | if (compat == NULL) { |
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142 | compat_len = 0; |
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143 | } |
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144 | |
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145 | #if RISCV_ENABLE_HTIF_SUPPORT != 0 |
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146 | if (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len, "ucb,htif0")) { |
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147 | htif_console_context_init(&htif_console_instance.base, node); |
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148 | |
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149 | riscv_console.context = &htif_console_instance.base; |
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150 | riscv_console.putchar = htif_console_putchar; |
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151 | riscv_console.getchar = htif_console_getchar; |
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152 | }; |
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153 | #endif |
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154 | |
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155 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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156 | if ( |
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157 | (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len, "ns16550a") |
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158 | || RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len, "ns16750")) |
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159 | && ns16550_devices < RISCV_CONSOLE_MAX_NS16550_DEVICES |
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160 | ) { |
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161 | ns16550_context *ctx; |
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162 | fdt32_t *val; |
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163 | int len; |
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164 | |
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165 | ctx = &ns16550_instances[ns16550_devices]; |
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166 | ctx->initial_baud = BSP_CONSOLE_BAUD; |
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167 | |
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168 | /* Get register shift property of the UART device */ |
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169 | val = (fdt32_t *) fdt_getprop(fdt, node, "reg-shift", &len); |
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170 | |
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171 | if (val != NULL && fdt32_to_cpu(val[0]) == 2) { |
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172 | ctx->get_reg = riscv_console_get_reg_32; |
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173 | ctx->set_reg = riscv_console_set_reg_32; |
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174 | } else { |
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175 | ctx->get_reg = riscv_console_get_reg_8; |
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176 | ctx->set_reg = riscv_console_set_reg_8; |
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177 | } |
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178 | |
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179 | if (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len, "ns16750")) { |
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180 | ctx->has_precision_clock_synthesizer = true; |
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181 | } |
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182 | |
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183 | ctx->port = (uintptr_t) riscv_fdt_get_address(fdt, node); |
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184 | |
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185 | if (ctx->port == 0) { |
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186 | bsp_fatal(RISCV_FATAL_NO_NS16550_REG_IN_DEVICE_TREE); |
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187 | } |
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188 | |
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189 | val = (fdt32_t *) fdt_getprop(fdt, node, "clock-frequency", &len); |
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190 | |
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191 | if (val == NULL || len != 4) { |
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192 | bsp_fatal(RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE); |
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193 | } |
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194 | |
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195 | ctx->clock = fdt32_to_cpu(val[0]); |
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196 | |
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197 | val = (fdt32_t *) fdt_getprop(fdt, node, "interrupts", &len); |
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198 | |
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199 | if (val == NULL || len != 4) { |
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200 | bsp_fatal(RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE); |
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201 | } |
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202 | |
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203 | ctx->irq = RISCV_INTERRUPT_VECTOR_EXTERNAL(fdt32_to_cpu(val[0])); |
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204 | |
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205 | if (node == console_node) { |
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206 | riscv_console.context = &ctx->base; |
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207 | riscv_console.putchar = ns16550_polled_putchar; |
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208 | riscv_console.getchar = ns16550_polled_getchar; |
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209 | } |
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210 | |
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211 | rtems_termios_device_context_initialize(&ctx->base, "NS16550"); |
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212 | ns16550_probe(&ctx->base); |
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213 | |
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214 | ++ns16550_devices; |
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215 | } |
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216 | #endif |
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217 | |
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218 | #if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 |
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219 | if (RISCV_CONSOLE_IS_COMPATIBLE(compat, compat_len, "sifive,uart0")) { |
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220 | fe310_uart_context *ctx; |
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221 | |
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222 | ctx = &fe310_uart_instance; |
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223 | ctx->regs = riscv_fdt_get_address(fdt, node); |
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224 | if (ctx->regs == NULL) { |
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225 | bsp_fatal(RISCV_FATAL_NO_NS16550_REG_IN_DEVICE_TREE); |
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226 | } |
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227 | |
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228 | if (node == console_node) { |
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229 | riscv_console.context = &ctx->base; |
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230 | riscv_console.putchar = fe310_console_putchar; |
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231 | riscv_console.getchar = fe310_uart_read; |
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232 | } |
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233 | |
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234 | rtems_termios_device_context_initialize(&ctx->base, "FE310UART"); |
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235 | } |
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236 | #endif |
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237 | |
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238 | node = fdt_next_node(fdt, node, NULL); |
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239 | } |
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240 | |
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241 | BSP_output_char = riscv_output_char; |
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242 | } |
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243 | |
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244 | static void riscv_output_char_init(char c) |
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245 | { |
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246 | riscv_console_probe(); |
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247 | riscv_output_char(c); |
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248 | } |
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249 | |
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250 | BSP_output_char_function_type BSP_output_char = riscv_output_char_init; |
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251 | |
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252 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
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253 | |
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254 | rtems_status_code console_initialize( |
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255 | rtems_device_major_number major, |
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256 | rtems_device_minor_number minor, |
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257 | void *arg |
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258 | ) |
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259 | { |
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260 | #if RISCV_ENABLE_HTIF_SUPPORT != 0 |
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261 | rtems_termios_device_context *base; |
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262 | char htif_path[] = "/dev/ttyShtif"; |
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263 | #endif |
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264 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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265 | char path[] = "/dev/ttyS?"; |
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266 | size_t i; |
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267 | #endif |
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268 | |
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269 | #if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 |
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270 | fe310_uart_context *ctx; |
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271 | char fe310_path[] = "/dev/ttyS0"; |
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272 | #endif |
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273 | |
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274 | rtems_termios_initialize(); |
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275 | |
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276 | #if RISCV_ENABLE_HTIF_SUPPORT != 0 |
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277 | base = &htif_console_instance.base; |
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278 | rtems_termios_device_install(htif_path, &htif_console_handler, NULL, base); |
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279 | |
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280 | if (base == riscv_console.context) { |
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281 | link(htif_path, CONSOLE_DEVICE_NAME); |
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282 | } |
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283 | #endif |
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284 | |
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285 | #if RISCV_CONSOLE_MAX_NS16550_DEVICES > 0 |
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286 | for (i = 0; i < RISCV_CONSOLE_MAX_NS16550_DEVICES; ++i) { |
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287 | ns16550_context *ctx; |
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288 | |
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289 | ctx = &ns16550_instances[i]; |
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290 | path[sizeof(path) - 2] = (char) ('0' + i); |
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291 | |
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292 | rtems_termios_device_install( |
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293 | path, |
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294 | &ns16550_handler_interrupt, |
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295 | NULL, |
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296 | &ctx->base |
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297 | ); |
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298 | |
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299 | if (&ctx->base == riscv_console.context) { |
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300 | link(path, CONSOLE_DEVICE_NAME); |
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301 | } |
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302 | } |
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303 | #endif |
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304 | |
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305 | #if RISCV_ENABLE_FRDME310ARTY_SUPPORT != 0 |
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306 | ctx = &fe310_uart_instance; |
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307 | rtems_termios_device_install( |
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308 | fe310_path, |
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309 | &fe310_uart_handler, |
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310 | NULL, |
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311 | &ctx->base |
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312 | ); |
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313 | |
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314 | if (&ctx->base == riscv_console.context) { |
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315 | link(fe310_path, CONSOLE_DEVICE_NAME); |
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316 | } |
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317 | #endif |
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318 | |
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319 | return RTEMS_SUCCESSFUL; |
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320 | } |
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321 | |
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322 | RTEMS_SYSINIT_ITEM( |
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323 | riscv_console_probe, |
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324 | RTEMS_SYSINIT_BSP_START, |
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325 | RTEMS_SYSINIT_ORDER_LAST_BUT_5 |
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326 | ); |
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