source: rtems/bsps/riscv/riscv/clock/clockdrv.c @ bd560386

Last change on this file since bd560386 was bd560386, checked in by Sebastian Huber <sebastian.huber@…>, on Jul 23, 2018 at 11:50:02 AM

bsp/riscv: Add simple SMP support to clock driver

This is a hack. The clock interrupt should be handled by each hart.

Update #3433.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup bsp_clock
5 *
6 * @brief riscv clock support.
7 */
8
9/*
10 * Copyright (c) 2018 embedded brains GmbH
11 * COPYRIGHT (c) 2015 Hesham Alatary <hesham@alumni.york.ac.uk>
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 *    notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 *    notice, this list of conditions and the following disclaimer in the
20 *    documentation and/or other materials provided with the distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#include <rtems/timecounter.h>
36#include <rtems/score/cpuimpl.h>
37#include <rtems/score/riscv-utility.h>
38
39#include <bsp/fatal.h>
40#include <bsp/fdt.h>
41#include <bsp/irq.h>
42#include <bsp/riscv.h>
43
44#include <libfdt.h>
45
46/* This is defined in dev/clock/clockimpl.h */
47void Clock_isr(void *arg);
48
49typedef struct {
50  struct timecounter base;
51  volatile RISCV_CLINT_regs *clint;
52} riscv_timecounter;
53
54static riscv_timecounter riscv_clock_tc;
55
56static uint32_t riscv_clock_interval;
57
58static void riscv_clock_at_tick(riscv_timecounter *tc)
59{
60  volatile RISCV_CLINT_regs *clint;
61  uint64_t cmp;
62
63  clint = tc->clint;
64
65  cmp = clint->mtimecmp[0].val_64;
66  cmp += riscv_clock_interval;
67
68#if __riscv_xlen == 32
69  clint->mtimecmp[0].val_32[0] = 0xffffffff;
70  clint->mtimecmp[0].val_32[1] = (uint32_t) (cmp >> 32);
71  clint->mtimecmp[0].val_32[0] = (uint32_t) cmp;
72#elif __riscv_xlen == 64
73  clint->mtimecmp[0].val_64 = cmp;
74#endif
75}
76
77static void riscv_clock_handler_install(void)
78{
79  rtems_status_code sc;
80
81  sc = rtems_interrupt_handler_install(
82    RISCV_INTERRUPT_VECTOR_TIMER,
83    "Clock",
84    RTEMS_INTERRUPT_UNIQUE,
85    (rtems_interrupt_handler) Clock_isr,
86    NULL
87  );
88  if (sc != RTEMS_SUCCESSFUL) {
89    bsp_fatal(RISCV_FATAL_CLOCK_IRQ_INSTALL);
90  }
91}
92
93static uint32_t riscv_clock_get_timecount(struct timecounter *base)
94{
95  riscv_timecounter *tc;
96  volatile RISCV_CLINT_regs *clint;
97
98  tc = (riscv_timecounter *) base;
99  clint = tc->clint;
100  return clint->mtime.val_32[0];
101}
102
103static uint32_t riscv_clock_get_timebase_frequency(const void *fdt)
104{
105  int node;
106  const uint32_t *val;
107  int len;
108
109  node = fdt_path_offset(fdt, "/cpus");
110  val = fdt_getprop(fdt, node, "timebase-frequency", &len);
111  if (val == NULL || len < 4) {
112    bsp_fatal(RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE);
113  }
114
115  return fdt32_to_cpu(*val);
116}
117
118static void riscv_clock_initialize(void)
119{
120  const char *fdt;
121  riscv_timecounter *tc;
122  uint32_t tb_freq;
123  uint64_t us_per_tick;
124
125  fdt = bsp_fdt_get();
126
127  tc = &riscv_clock_tc;
128  tc->clint = riscv_clint;
129
130  tb_freq = riscv_clock_get_timebase_frequency(fdt);
131  us_per_tick = rtems_configuration_get_microseconds_per_tick();
132  riscv_clock_interval = (uint32_t) ((tb_freq * us_per_tick) / 1000000);
133
134  riscv_clock_at_tick(tc);
135
136  /* Enable mtimer interrupts */
137  set_csr(mie, MIP_MTIP);
138
139  /* Initialize timecounter */
140  tc->base.tc_get_timecount = riscv_clock_get_timecount;
141  tc->base.tc_counter_mask = 0xffffffff;
142  tc->base.tc_frequency = tb_freq;
143  tc->base.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
144  rtems_timecounter_install(&tc->base);
145}
146
147uint32_t _CPU_Counter_frequency( void )
148{
149  return riscv_clock_get_timebase_frequency(bsp_fdt_get());
150}
151
152#define Clock_driver_support_at_tick() riscv_clock_at_tick(&riscv_clock_tc)
153
154#define Clock_driver_support_initialize_hardware() riscv_clock_initialize()
155
156#define Clock_driver_support_install_isr(isr) \
157  riscv_clock_handler_install()
158
159#define CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR
160
161#include "../../../shared/dev/clock/clockimpl.h"
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