source: rtems/bsps/riscv/riscv/clock/clockdrv.c @ 6f5d88a

5
Last change on this file since 6f5d88a was 6f5d88a, checked in by Sebastian Huber <sebastian.huber@…>, on 06/22/18 at 05:06:57

bsp/riscv_generic: Rename to "riscv"

Update #3433.

  • Property mode set to 100644
File size: 3.8 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup bsp_clock
5 *
6 * @brief riscv clock support.
7 */
8
9/*
10 * riscv_generic Clock driver
11 *
12 * COPYRIGHT (c) 2015 Hesham Alatary <hesham@alumni.york.ac.uk>
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 *    notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 *    notice, this list of conditions and the following disclaimer in the
21 *    documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 */
35
36#include <rtems.h>
37#include <bsp.h>
38#include <bsp/irq.h>
39#include <rtems/score/riscv-utility.h>
40#include <rtems/score/cpu.h>
41#include <rtems/timecounter.h>
42
43/* The number of clock cycles before generating a tick timer interrupt. */
44#define TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT     1000
45#define RISCV_CLOCK_CYCLE_TIME_NANOSECONDS    1
46
47static struct timecounter riscv_generic_tc;
48
49/* CPU counter */
50static CPU_Counter_ticks cpu_counter_ticks;
51
52/* This prototype is added here to Avoid warnings */
53void Clock_isr(void *arg);
54
55static void riscv_generic_clock_at_tick(void)
56{
57  REG(MTIME_MM) = 0;
58  REG(MTIMECMP_MM) = TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
59
60  cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT * 10000;
61}
62
63static void riscv_generic_clock_handler_install(proc_ptr new_isr)
64{
65  rtems_status_code sc = RTEMS_SUCCESSFUL;
66  _CPU_ISR_install_vector(RISCV_MACHINE_TIMER_INTERRUPT,
67                          new_isr,
68                          NULL);
69
70  if (sc != RTEMS_SUCCESSFUL) {
71    rtems_fatal_error_occurred(0xdeadbeef);
72  }
73}
74
75static uint32_t riscv_generic_get_timecount(struct timecounter *tc)
76{
77  uint32_t ticks_since_last_timer_interrupt = REG(MTIME_MM);
78
79  return cpu_counter_ticks + ticks_since_last_timer_interrupt;
80}
81
82CPU_Counter_ticks _CPU_Counter_read(void)
83{
84  return riscv_generic_get_timecount(NULL);
85}
86
87static void riscv_generic_clock_initialize(void)
88{
89  uint32_t mtimecmp = TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
90  uint64_t frequency = (1000000000 / RISCV_CLOCK_CYCLE_TIME_NANOSECONDS);
91
92  REG(MTIME_MM) = 0;
93  REG(MTIMECMP_MM) = TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
94
95  /* Enable mtimer interrupts */
96  set_csr(mie, MIP_MTIP);
97  set_csr(mip, MIP_MTIP);
98
99  /* Initialize timecounter */
100  riscv_generic_tc.tc_get_timecount = riscv_generic_get_timecount;
101  riscv_generic_tc.tc_counter_mask = 0xffffffff;
102  riscv_generic_tc.tc_frequency = frequency;
103  riscv_generic_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
104  rtems_timecounter_install(&riscv_generic_tc);
105}
106
107CPU_Counter_ticks _CPU_Counter_difference(
108  CPU_Counter_ticks second,
109  CPU_Counter_ticks first
110)
111{
112  return second - first;
113}
114
115#define Clock_driver_support_at_tick() riscv_generic_clock_at_tick()
116
117#define Clock_driver_support_initialize_hardware() riscv_generic_clock_initialize()
118
119#define Clock_driver_support_install_isr(isr) \
120  riscv_generic_clock_handler_install(isr)
121
122#include "../../../shared/dev/clock/clockimpl.h"
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