source: rtems/bsps/powerpc/virtex4/README

Last change on this file was eb36d11, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 25, 2018 at 1:06:08 PM

bsps: Move documentation, etc. files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 2.4 KB
Line 
1# Adapted from virtex BSP
2
3BSP NAME:           virtex4
4BOARD:              N/A
5BUS:                N/A
6CPU FAMILY:         ppc
7CPU:                PowerPC 405D5
8COPROCESSORS:       N/A
9MODE:               32 bit mode
10
11DEBUG MONITOR:
12
13PERIPHERALS
14===========
15TIMERS:             405 internal
16SERIAL PORTS:       none
17REAL-TIME CLOCK:    none
18DMA:                Xilinx virtex internal
19VIDEO:              none
20SCSI:               none
21NETWORKING:         none
22
23DRIVER INFORMATION
24==================
25CLOCK DRIVER:       PPC Decrementer
26IOSUPP DRIVER:      N/A
27SHMSUPP:            N/A
28TIMER DRIVER:       N/A
29TTY DRIVER:         N/A
30
31STDIO
32=====
33PORT:               N/A
34ELECTRICAL:         N/A
35BAUD:               N/A
36BITS PER CHARACTER: N/A
37PARITY:             N/A
38STOP BITS:          N/A
39
40Notes
41=====
42
43Board description
44-----------------
45clock rate:     350 MHz
46ROM:            N/A
47RAM:            128MByte DRAM
48
49Virtex only supports single processor operations.
50
51Porting
52-------
53This board support package is written for a naked Virtex 4/PPC FPGA
54system. The rough features of such a board are described above.
55The BSP itself makes no assumptions on what is loaded in the FPGA,
56other than that the CPU has access to some memory, either on-board
57or external, from which code can be run.
58
59This BSP has been constructed so that an application of both firmware
60and software can be layered on top of it by supplying implementations
61for the various 'weak' symbols.  These symbols are prefaced with the
62term 'app_'.  Applications can thus be built outside of the RTEMS
63directory tree by linking with the appropriate libraries.
64
65The linkcmds file describes the memory layout.  Included in this
66definition is a section of memory named MsgArea.  Output sent to
67stdout is recorded in this area and can be dumped using the JTAG
68interface, for example.
69
70For adapting this BSP to other boards, the following files should be
71modified:
72
73- c/src/lib/libbsp/powerpc/virtex4/startup/linkcmds
74        for the memory layout required
75
76- c/src/lib/libbsp/powerpc/virtex4/startup/bspstart.c
77        Here you can select the clock source for the timers and the
78        serial interface (system clock or external clock pin), the
79        clock rates, etc.
80
81- c/src/lib/libbsp/powerpc/virtex4/include/bsp.h
82        some BSP-related constants
83
84- c/src/lib/libbsp/powerpc/virtex4/*
85        well, they should be generic, so there _should_ be no reason
86        to mess around there (but who knows...)
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