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start.S @ 94ea8a8

Last change on this file since 94ea8a8 was 94ea8a8, checked in by Sebastian Huber <sebastian.huber@…>, on 09/13/18 at 09:34:23
bsp/tqm8xx: Clear sbss section
Property mode set to `100644`
File size: 6.7 KB

Line
1	/===============================================================\
2	\| Project: RTEMS generic TQM8xx BSP \|
3	+-----------------------------------------------------------------+
4	\| Copyright (c) 2008 \|
5	\| Embedded Brains GmbH \|
6	\| Obere Lagerstr. 30 \|
7	\| D-82178 Puchheim \|
8	\| Germany \|
9	\| rtems@embedded-brains.de \|
10	+-----------------------------------------------------------------+
11	\| The license and distribution terms for this file may be \|
12	\| found in the file LICENSE in this distribution or at \|
13	\| \|
14	\| http://www.rtems.org/license/LICENSE. \|
15	\| \|
16	+-----------------------------------------------------------------+
17	\| this file contains the startup assembly code \|
18	\| it is based on the gen83xx BSP \|
19	\===============================================================/
20
21	#include <libcpu/powerpc-utility.h>
22	#include <rtems/powerpc/cache.h>
23	#include <bsp.h>
24	#include <mpc8xx.h>
25
26	.extern boot_card
27
28	PUBLIC_VAR (_start)
29
30	.section ".bsp_start_text", "ax"
31	_start:
32
33	/*
34	* basic CPU setup:
35	* init MSR
36	*/
37	mfmsr r30
38	SETBITS r30, r29, MSR_ME\|MSR_RI
39	CLRBITS r30, r29, MSR_IP\|MSR_EE
40	mtmsr r30 /* Set RI/ME, Clr EE in MSR */
41	/*
42	* init IMMR
43	*/
44	LA r30,m8xx
45	mtspr immr,r30
46	/*
47	* determine current execution address offset
48	*/
49	bl start_1
50	start_1:
51	mflr r20
52	LA r30,start_1
53	sub. r20,r20,r30
54	/*
55	* execution address offset == 0?
56	* then do not relocate code and data
57	*/
58	beq start_code_in_ram
59	/*
60	* ROM or relocatable startup: copy startup code to SDRAM
61	*/
62	/* get start address of text section in RAM */
63	LA r29, bsp_section_text_begin
64	/* get start address of text section in ROM (add reloc offset) */
65	add r30, r20, r29
66	/* get size of startup code */
67	LA r28, end_reloc_startup
68	LA r31, bsp_section_text_begin
69	sub 28,r28,r31
70	/* copy startup code from ROM to RAM location */
71	bl copy_image
72
73	/*
74	* jump to code copy in SDRAM
75	*/
76	/* get compile time address of label */
77	LA r29, copy_rest_of_text
78	mtlr r29
79	blr /* now further execution RAM */
80	copy_rest_of_text:
81	/*
82	* ROM or relocatable startup: copy rest of code to SDRAM
83	*/
84	/* get start address of rest of code in RAM */
85	LA r29, end_reloc_startup
86	/* get start address of text section in ROM (add reloc offset) */
87	add r30, r20, r29
88	/* get size of rest of code */
89	LA r28, bsp_section_text_begin
90	LA r31, bsp_section_text_size
91	add r28,r28,r31
92	sub r28,r28,r29
93	bl copy_image /* copy text section from ROM to RAM location */
94
95	/*
96	* ROM or relocatable startup: copy data to SDRAM
97	*/
98	/* get start address of data section in RAM */
99	LA r29, bsp_section_data_begin
100	/* get start address of data section in ROM (add reloc offset) */
101	add r30, r20, r29
102	/* get size of RAM image */
103	LA r28, bsp_section_data_size
104	/* copy initialized data section from ROM to RAM location */
105	bl copy_image
106
107	start_code_in_ram:
108
109	/*
110	* ROM/RAM startup: clear sbss/bss in SDRAM
111	*/
112	LA r3, bsp_section_sbss_begin
113	LWI r4, bsp_section_sbss_size
114	bl mpc8xx_zero_4
115	LA r3, bsp_section_bss_begin
116	LWI r4, bsp_section_bss_size
117	bl mpc8xx_zero_4
118	/*
119	* call boot_card
120	*/
121
122	/* Set stack pointer (common for RAM/ROM startup) */
123	LA r1, _Configuration_Interrupt_stack_area_end
124	addi r1, r1, -0x10
125
126	/* Create NULL */
127	li r0, 0
128
129	/* Return address */
130	stw r0, 4(r1)
131
132	/* Back chain */
133	stw r0, 0(r1)
134
135	/* Read-only small data */
136	LA r2, _SDA2_BASE_
137
138	/* Read-write small data */
139	LA r13, _SDA_BASE_
140
141	/*
142	* init some CPU stuff
143	*/
144	bl SYM (_InitTQM8xx)
145
146	/* clear arguments and do further init. in C (common for RAM/ROM startup) */
147
148	/* Clear cmdline */
149	xor r3, r3, r3
150
151	bl SYM (boot_card) /* Call the first C routine */
152
153	twiddle:
154	/* We don't expect to return from boot_card but if we do */
155	/* wait here for watchdog to kick us into hard reset */
156	b twiddle
157
158	copy_with_watchdog:
159	addi r5,r5,16
160	rlwinm. r5,r5,28,4,31
161	mtctr r5
162
163	copy_loop:
164	lwz r6,0(r3)
165	lwz r7,4(r3)
166	lwz r8,8(r3)
167	lwz r9,12(r3)
168	stw r6,0(r4)
169	stw r7,4(r4)
170	stw r8,8(r4)
171	stw r9,12(r4)
172	addi r3,r3,16
173	addi r4,r4,16
174	sth r28,14(r30)
175	sth r29,14(r30)
176	bdnz+ copy_loop
177	blr
178
179	copy_image:
180	/*
181	* watchdog:
182	* r26 = immr
183	* r25 = watchdog magic 1
184	* r24 = watchdog magic 2
185	*/
186	mfimmr r26
187	rlwinm. r26,r26,0,0,15
188	li r25,0x556c
189	li r24,0xffffaa39
190
191	mr r27, r28 /* determine number of 4word chunks */
192	srwi r28, r28, 4
193	mtctr r28
194
195	slwi r28, r28, 4
196	sub r27, r27, r28 /* determine residual bytes */
197	copy_image_4word:
198	lwz r20, 0(r30) /* fetch data */
199	lwz r21, 4(r30)
200	lwz r22, 8(r30)
201	lwz r23,12(r30)
202	stw r20, 0(r29) /* store data */
203	stw r21, 4(r29)
204	stw r22, 8(r29)
205	stw r23,12(r29)
206
207	addi r30, r30, 0x10 /* increment source pointer */
208	addi r29, r29, 0x10 /* increment destination pointer */
209	/*
210	* trigger watchdog
211	*/
212	sth r25,14(r26)
213	sth r24,14(r26)
214
215	bdnz copy_image_4word /* decrement ctr and branch if not 0 */
216
217	cmpwi r27, 0x00 /* copy image finished ? */
218	beq copy_image_end;
219	mtctr r27 /* reload counter for residual bytes */
220	copy_image_byte:
221	lswi r28, r30, 0x01
222
223	stswi r28, r29, 0x01 /* do byte copy ROM -> RAM */
224
225
226	addi r30, r30, 0x01 /* increment source pointer */
227	addi r29, r29, 0x01 /* increment destination pointer */
228
229	bdnz copy_image_byte /* decrement ctr and branch if not 0 */
230
231	copy_image_end:
232	blr
233
234
235	/**
236	* @fn int mpc8xx_zero_4( void *dest, size_t n)
237	*
238	* @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
239	*
240	* The address @a dest has to be aligned on 4 byte boundaries. The size @a n
241	* must be evenly divisible by 4.
242	*/
243	GLOBAL_FUNCTION mpc8xx_zero_4
244	/* Create zero */
245	xor r0, r0, r0
246
247	/* Set offset */
248	xor r5, r5, r5
249
250	/* Loop counter for the first bytes up to 16 bytes */
251	rlwinm. r9, r4, 30, 30, 31
252	beq mpc8xx_zero_4_more
253	mtctr r9
254
255	mpc8xx_zero_4_head:
256
257	stwx r0, r3, r5
258	addi r5, r5, 4
259	bdnz mpc8xx_zero_4_head
260
261	mpc8xx_zero_4_more:
262
263	/* More than 16 bytes? */
264	srwi. r9, r4, 4
265	beqlr
266	mtctr r9
267
268	/* Set offsets */
269	addi r6, r5, 4
270	addi r7, r5, 8
271	addi r8, r5, 12
272
273	mpc8xx_zero_4_tail:
274
275	stwx r0, r3, r5
276	addi r5, r5, 16
277	stwx r0, r3, r6
278	addi r6, r6, 16
279	stwx r0, r3, r7
280	addi r7, r7, 16
281	stwx r0, r3, r8
282	addi r8, r8, 16
283	bdnz mpc8xx_zero_4_tail
284
285	/* Return */
286	blr
287
288	end_reloc_startup:

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