source: rtems/bsps/powerpc/tqm8xx/start/start.S @ 7916139

5
Last change on this file since 7916139 was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*===============================================================*\
2| Project: RTEMS generic TQM8xx BSP                               |
3+-----------------------------------------------------------------+
4|                    Copyright (c) 2008                           |
5|                    Embedded Brains GmbH                         |
6|                    Obere Lagerstr. 30                           |
7|                    D-82178 Puchheim                             |
8|                    Germany                                      |
9|                    rtems@embedded-brains.de                     |
10+-----------------------------------------------------------------+
11| The license and distribution terms for this file may be         |
12| found in the file LICENSE in this distribution or at            |
13|                                                                 |
14| http://www.rtems.org/license/LICENSE.                           |
15|                                                                 |
16+-----------------------------------------------------------------+
17| this file contains the startup assembly code                    |
18| it is based on the gen83xx BSP                                  |
19\*===============================================================*/
20
21#include <libcpu/powerpc-utility.h>
22#include <rtems/powerpc/cache.h>
23#include <bsp.h>
24#include <mpc8xx.h>
25
26.extern boot_card
27
28PUBLIC_VAR (_start)
29
30.section ".bsp_start_text", "ax"
31_start:
32
33        /*
34         * basic CPU setup:
35         * init MSR
36         */
37        mfmsr   r30
38        SETBITS r30, r29, MSR_ME|MSR_RI
39        CLRBITS r30, r29, MSR_IP|MSR_EE
40        mtmsr   r30                             /* Set RI/ME, Clr EE in MSR */
41        /*
42         * init IMMR
43         */
44        LA  r30,m8xx
45        mtspr immr,r30
46        /*
47         * determine current execution address offset
48         */
49        bl start_1
50start_1:
51        mflr r20
52        LA   r30,start_1
53        sub. r20,r20,r30
54        /*
55         * execution address offset == 0?
56         * then do not relocate code and data
57         */
58        beq  start_code_in_ram
59        /*
60         * ROM or relocatable startup: copy startup code to SDRAM
61         */
62        /* get start address of text section in RAM */
63        LA      r29, bsp_section_text_begin
64        /* get start address of text section in ROM (add reloc offset) */
65        add     r30, r20, r29
66        /* get size of startup code */
67        LA      r28, end_reloc_startup
68        LA      r31, bsp_section_text_begin
69        sub     28,r28,r31
70        /* copy startup code from ROM to RAM location */
71        bl      copy_image
72
73        /*
74         * jump to code copy in  SDRAM
75         */
76        /* get compile time address of label */
77        LA      r29, copy_rest_of_text
78        mtlr    r29
79        blr                     /* now further execution RAM */
80copy_rest_of_text:
81        /*
82         * ROM or relocatable startup: copy rest of code to SDRAM
83         */
84        /* get start address of rest of code in RAM */
85        LA      r29, end_reloc_startup
86        /* get start address of text section in ROM (add reloc offset) */
87        add     r30, r20, r29
88        /* get size of rest of code */
89        LA      r28, bsp_section_text_begin
90        LA      r31, bsp_section_text_size
91        add     r28,r28,r31
92        sub     r28,r28,r29
93        bl      copy_image      /* copy text section from ROM to RAM location */
94
95        /*
96         * ROM or relocatable startup: copy data to SDRAM
97         */
98        /* get start address of data section in RAM */
99        LA      r29, bsp_section_data_begin
100        /* get start address of data section in ROM (add reloc offset) */
101        add     r30, r20, r29
102        /* get size of RAM image */
103        LA      r28, bsp_section_data_size
104        /* copy initialized data section from ROM to RAM location */
105        bl      copy_image
106
107start_code_in_ram:
108
109        /*
110         * ROM/RAM startup: clear bss in SDRAM
111         */
112        LA      r3, bsp_section_bss_begin  /* get start address of bss section */
113        LWI     r4, bsp_section_bss_size   /* get size of bss section */
114        bl      mpc8xx_zero_4          /* Clear the bss section */
115        /*
116         * call boot_card
117         */
118
119        /* Set stack pointer (common for RAM/ROM startup) */
120        LA      r1, _Configuration_Interrupt_stack_area_end
121        addi    r1, r1, -0x10
122
123        /* Create NULL */
124        li r0, 0
125
126        /* Return address */
127        stw r0, 4(r1)
128
129        /* Back chain */
130        stw r0, 0(r1)
131
132        /* Read-only small data */
133        LA r2, _SDA2_BASE_
134
135        /* Read-write small data */
136        LA r13, _SDA_BASE_
137
138        /*
139         * init some CPU stuff
140         */
141        bl SYM (_InitTQM8xx)
142
143/* clear arguments and do further init. in C (common for RAM/ROM startup) */
144
145        /* Clear cmdline */
146        xor r3, r3, r3
147
148        bl      SYM (boot_card)  /* Call the first C routine */
149
150twiddle:
151        /* We don't expect to return from boot_card but if we do */
152        /* wait here for watchdog to kick us into hard reset     */
153        b       twiddle
154
155copy_with_watchdog:
156     addi    r5,r5,16
157     rlwinm. r5,r5,28,4,31
158     mtctr   r5
159
160copy_loop:
161     lwz     r6,0(r3)
162     lwz     r7,4(r3)
163     lwz     r8,8(r3)
164     lwz     r9,12(r3)
165     stw     r6,0(r4)
166     stw     r7,4(r4)
167     stw     r8,8(r4)
168     stw     r9,12(r4)
169     addi    r3,r3,16
170     addi    r4,r4,16
171     sth     r28,14(r30)
172     sth     r29,14(r30)
173     bdnz+   copy_loop
174     blr
175
176copy_image:
177        /*
178         * watchdog:
179         * r26 = immr
180         * r25 = watchdog magic 1
181         * r24 = watchdog magic 2
182         */
183        mfimmr  r26
184        rlwinm. r26,r26,0,0,15
185        li      r25,0x556c
186        li      r24,0xffffaa39
187
188        mr      r27, r28                /* determine number of 4word chunks */
189        srwi    r28, r28, 4
190        mtctr   r28
191
192        slwi    r28, r28, 4
193        sub     r27, r27, r28           /* determine residual bytes */
194copy_image_4word:
195        lwz     r20, 0(r30)             /* fetch data */
196        lwz     r21, 4(r30)
197        lwz     r22, 8(r30)
198        lwz     r23,12(r30)
199        stw     r20, 0(r29)             /* store data */
200        stw     r21, 4(r29)
201        stw     r22, 8(r29)
202        stw     r23,12(r29)
203
204        addi    r30, r30, 0x10          /* increment source pointer */
205        addi    r29, r29, 0x10          /* increment destination pointer */
206        /*
207         * trigger watchdog
208         */
209        sth     r25,14(r26)
210        sth     r24,14(r26)
211
212        bdnz    copy_image_4word        /* decrement ctr and branch if not 0 */
213
214        cmpwi   r27, 0x00               /* copy image finished ? */
215        beq     copy_image_end;
216        mtctr   r27                     /* reload counter for residual bytes */
217copy_image_byte:
218        lswi    r28, r30, 0x01
219
220        stswi   r28, r29, 0x01          /* do byte copy ROM -> RAM */
221
222
223        addi    r30, r30, 0x01          /* increment source pointer */
224        addi    r29, r29, 0x01          /* increment destination pointer */
225
226        bdnz    copy_image_byte         /* decrement ctr and branch if not 0 */
227
228copy_image_end:
229        blr
230
231
232/**
233 * @fn int mpc8xx_zero_4( void *dest, size_t n)
234 *
235 * @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
236 *
237 * The address @a dest has to be aligned on 4 byte boundaries.  The size @a n
238 * must be evenly divisible by 4.
239 */
240GLOBAL_FUNCTION mpc8xx_zero_4
241        /* Create zero */
242        xor     r0, r0, r0
243
244        /* Set offset */
245        xor     r5, r5, r5
246
247        /* Loop counter for the first bytes up to 16 bytes */
248        rlwinm. r9, r4, 30, 30, 31
249        beq     mpc8xx_zero_4_more
250        mtctr   r9
251
252mpc8xx_zero_4_head:
253
254        stwx    r0, r3, r5
255        addi    r5, r5, 4
256        bdnz    mpc8xx_zero_4_head
257
258mpc8xx_zero_4_more:
259
260        /* More than 16 bytes? */
261        srwi.   r9, r4, 4
262        beqlr
263        mtctr   r9
264
265        /* Set offsets */
266        addi    r6, r5, 4
267        addi    r7, r5, 8
268        addi    r8, r5, 12
269
270mpc8xx_zero_4_tail:
271
272        stwx    r0, r3, r5
273        addi    r5, r5, 16
274        stwx    r0, r3, r6
275        addi    r6, r6, 16
276        stwx    r0, r3, r7
277        addi    r7, r7, 16
278        stwx    r0, r3, r8
279        addi    r8, r8, 16
280        bdnz    mpc8xx_zero_4_tail
281
282        /* Return */
283        blr
284
285end_reloc_startup:
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