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start.S

Last change on this file was bcef89f2, checked in by Sebastian Huber <sebastian.huber@…>, on 05/19/23 at 06:18:25

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The embedded brains GmbH & Co. KG is the legal successor of embedded
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1	/* SPDX-License-Identifier: BSD-2-Clause */
2
3	/*
4	* RTEMS generic TQM8xx BSP
5	*
6	* This file contains the startup assembly code.
7	* It is based on the gen83xx BSP.
8	*/
9
10	/*
11	* Copyright (c) 2008 embedded brains GmbH & Co. KG
12	*
13	* Redistribution and use in source and binary forms, with or without
14	* modification, are permitted provided that the following conditions
15	* are met:
16	* 1. Redistributions of source code must retain the above copyright
17	* notice, this list of conditions and the following disclaimer.
18	* 2. Redistributions in binary form must reproduce the above copyright
19	* notice, this list of conditions and the following disclaimer in the
20	* documentation and/or other materials provided with the distribution.
21	*
22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32	* POSSIBILITY OF SUCH DAMAGE.
33	*/
34
35	#include <libcpu/powerpc-utility.h>
36	#include <rtems/powerpc/cache.h>
37	#include <bsp.h>
38	#include <mpc8xx.h>
39
40	.extern boot_card
41
42	PUBLIC_VAR (_start)
43
44	.section ".bsp_start_text", "ax"
45	_start:
46
47	/*
48	* basic CPU setup:
49	* init MSR
50	*/
51	mfmsr r30
52	SETBITS r30, r29, MSR_ME\|MSR_RI
53	CLRBITS r30, r29, MSR_IP\|MSR_EE
54	mtmsr r30 /* Set RI/ME, Clr EE in MSR */
55	/*
56	* init IMMR
57	*/
58	LA r30,m8xx
59	mtspr immr,r30
60	/*
61	* determine current execution address offset
62	*/
63	bl start_1
64	start_1:
65	mflr r20
66	LA r30,start_1
67	sub. r20,r20,r30
68	/*
69	* execution address offset == 0?
70	* then do not relocate code and data
71	*/
72	beq start_code_in_ram
73	/*
74	* ROM or relocatable startup: copy startup code to SDRAM
75	*/
76	/* get start address of text section in RAM */
77	LA r29, bsp_section_text_begin
78	/* get start address of text section in ROM (add reloc offset) */
79	add r30, r20, r29
80	/* get size of startup code */
81	LA r28, end_reloc_startup
82	LA r31, bsp_section_text_begin
83	sub 28,r28,r31
84	/* copy startup code from ROM to RAM location */
85	bl copy_image
86
87	/*
88	* jump to code copy in SDRAM
89	*/
90	/* get compile time address of label */
91	LA r29, copy_rest_of_text
92	mtlr r29
93	blr /* now further execution RAM */
94	copy_rest_of_text:
95	/*
96	* ROM or relocatable startup: copy rest of code to SDRAM
97	*/
98	/* get start address of rest of code in RAM */
99	LA r29, end_reloc_startup
100	/* get start address of text section in ROM (add reloc offset) */
101	add r30, r20, r29
102	/* get size of rest of code */
103	LA r28, bsp_section_text_begin
104	LA r31, bsp_section_text_size
105	add r28,r28,r31
106	sub r28,r28,r29
107	bl copy_image /* copy text section from ROM to RAM location */
108
109	/*
110	* ROM or relocatable startup: copy data to SDRAM
111	*/
112	/* get start address of data section in RAM */
113	LA r29, bsp_section_data_begin
114	/* get start address of data section in ROM (add reloc offset) */
115	add r30, r20, r29
116	/* get size of RAM image */
117	LA r28, bsp_section_data_size
118	/* copy initialized data section from ROM to RAM location */
119	bl copy_image
120
121	start_code_in_ram:
122
123	/*
124	* ROM/RAM startup: clear sbss/bss in SDRAM
125	*/
126	LA r3, bsp_section_sbss_begin
127	LWI r4, bsp_section_sbss_size
128	bl mpc8xx_zero_4
129	LA r3, bsp_section_bss_begin
130	LWI r4, bsp_section_bss_size
131	bl mpc8xx_zero_4
132	/*
133	* call boot_card
134	*/
135
136	/* Set stack pointer (common for RAM/ROM startup) */
137	LA r1, _ISR_Stack_area_end
138	addi r1, r1, -0x10
139
140	/* Create NULL */
141	li r0, 0
142
143	/* Return address */
144	stw r0, 4(r1)
145
146	/* Back chain */
147	stw r0, 0(r1)
148
149	/* Read-only small data */
150	LA r2, _SDA2_BASE_
151
152	/* Read-write small data */
153	LA r13, _SDA_BASE_
154
155	/*
156	* init some CPU stuff
157	*/
158	bl SYM (_InitTQM8xx)
159
160	/* clear arguments and do further init. in C (common for RAM/ROM startup) */
161
162	/* Clear cmdline */
163	xor r3, r3, r3
164
165	bl SYM (boot_card) /* Call the first C routine */
166
167	twiddle:
168	/* We don't expect to return from boot_card but if we do */
169	/* wait here for watchdog to kick us into hard reset */
170	b twiddle
171
172	copy_with_watchdog:
173	addi r5,r5,16
174	rlwinm. r5,r5,28,4,31
175	mtctr r5
176
177	copy_loop:
178	lwz r6,0(r3)
179	lwz r7,4(r3)
180	lwz r8,8(r3)
181	lwz r9,12(r3)
182	stw r6,0(r4)
183	stw r7,4(r4)
184	stw r8,8(r4)
185	stw r9,12(r4)
186	addi r3,r3,16
187	addi r4,r4,16
188	sth r28,14(r30)
189	sth r29,14(r30)
190	bdnz+ copy_loop
191	blr
192
193	copy_image:
194	/*
195	* watchdog:
196	* r26 = immr
197	* r25 = watchdog magic 1
198	* r24 = watchdog magic 2
199	*/
200	mfimmr r26
201	rlwinm. r26,r26,0,0,15
202	li r25,0x556c
203	li r24,0xffffaa39
204
205	mr r27, r28 /* determine number of 4word chunks */
206	srwi r28, r28, 4
207	mtctr r28
208
209	slwi r28, r28, 4
210	sub r27, r27, r28 /* determine residual bytes */
211	copy_image_4word:
212	lwz r20, 0(r30) /* fetch data */
213	lwz r21, 4(r30)
214	lwz r22, 8(r30)
215	lwz r23,12(r30)
216	stw r20, 0(r29) /* store data */
217	stw r21, 4(r29)
218	stw r22, 8(r29)
219	stw r23,12(r29)
220
221	addi r30, r30, 0x10 /* increment source pointer */
222	addi r29, r29, 0x10 /* increment destination pointer */
223	/*
224	* trigger watchdog
225	*/
226	sth r25,14(r26)
227	sth r24,14(r26)
228
229	bdnz copy_image_4word /* decrement ctr and branch if not 0 */
230
231	cmpwi r27, 0x00 /* copy image finished ? */
232	beq copy_image_end;
233	mtctr r27 /* reload counter for residual bytes */
234	copy_image_byte:
235	lswi r28, r30, 0x01
236
237	stswi r28, r29, 0x01 /* do byte copy ROM -> RAM */
238
239
240	addi r30, r30, 0x01 /* increment source pointer */
241	addi r29, r29, 0x01 /* increment destination pointer */
242
243	bdnz copy_image_byte /* decrement ctr and branch if not 0 */
244
245	copy_image_end:
246	blr
247
248
249	/**
250	* @fn int mpc8xx_zero_4( void *dest, size_t n)
251	*
252	* @brief Zero all @a n bytes starting at @a dest with 4 byte writes.
253	*
254	* The address @a dest has to be aligned on 4 byte boundaries. The size @a n
255	* must be evenly divisible by 4.
256	*/
257	GLOBAL_FUNCTION mpc8xx_zero_4
258	/* Create zero */
259	xor r0, r0, r0
260
261	/* Set offset */
262	xor r5, r5, r5
263
264	/* Loop counter for the first bytes up to 16 bytes */
265	rlwinm. r9, r4, 30, 30, 31
266	beq mpc8xx_zero_4_more
267	mtctr r9
268
269	mpc8xx_zero_4_head:
270
271	stwx r0, r3, r5
272	addi r5, r5, 4
273	bdnz mpc8xx_zero_4_head
274
275	mpc8xx_zero_4_more:
276
277	/* More than 16 bytes? */
278	srwi. r9, r4, 4
279	beqlr
280	mtctr r9
281
282	/* Set offsets */
283	addi r6, r5, 4
284	addi r7, r5, 8
285	addi r8, r5, 12
286
287	mpc8xx_zero_4_tail:
288
289	stwx r0, r3, r5
290	addi r5, r5, 16
291	stwx r0, r3, r6
292	addi r6, r6, 16
293	stwx r0, r3, r7
294	addi r7, r7, 16
295	stwx r0, r3, r8
296	addi r8, r8, 16
297	bdnz mpc8xx_zero_4_tail
298
299	/* Return */
300	blr
301
302	end_reloc_startup:

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