1 | /*===============================================================*\ |
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2 | | Project: RTEMS TQM8xx BSP | |
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3 | +-----------------------------------------------------------------+ |
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4 | | This file has been adapted to MPC8xx by | |
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5 | | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | |
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6 | | Copyright (c) 2008 | |
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7 | | Embedded Brains GmbH | |
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8 | | Obere Lagerstr. 30 | |
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9 | | D-82178 Puchheim | |
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10 | | Germany | |
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11 | | rtems@embedded-brains.de | |
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12 | | | |
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13 | | See the other copyright notice below for the original parts. | |
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14 | +-----------------------------------------------------------------+ |
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15 | | The license and distribution terms for this file may be | |
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16 | | found in the file LICENSE in this distribution or at | |
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17 | | | |
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18 | | http://www.rtems.org/license/LICENSE. | |
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19 | | | |
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20 | +-----------------------------------------------------------------+ |
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21 | | this file contains the console driver | |
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22 | \*===============================================================*/ |
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23 | /* derived from: generic MPC83xx BSP */ |
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24 | #ifndef TQM8xx_IRQ_IRQ_H |
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25 | #define TQM8xx_IRQ_IRQ_H |
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26 | |
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27 | #include <stdbool.h> |
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28 | |
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29 | #include <rtems.h> |
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30 | #include <rtems/irq.h> |
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31 | #include <rtems/irq-extension.h> |
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32 | |
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33 | /* |
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34 | * the following definitions specify the indices used |
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35 | * to interface the interrupt handler API |
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36 | */ |
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37 | |
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38 | /* |
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39 | * Peripheral IRQ handlers related definitions |
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40 | */ |
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41 | #define BSP_SIU_PER_IRQ_NUMBER 16 |
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42 | #define BSP_SIU_IRQ_LOWEST_OFFSET 0 |
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43 | #define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET\ |
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44 | +BSP_SIU_PER_IRQ_NUMBER-1) |
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45 | |
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46 | #define BSP_IS_SIU_IRQ(irqnum) \ |
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47 | (((irqnum) >= BSP_SIU_IRQ_LOWEST_OFFSET) && \ |
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48 | ((irqnum) <= BSP_SIU_IRQ_MAX_OFFSET)) |
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49 | |
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50 | #define BSP_CPM_PER_IRQ_NUMBER 32 |
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51 | #define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_MAX_OFFSET+1) |
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52 | #define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET\ |
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53 | +BSP_CPM_PER_IRQ_NUMBER-1) |
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54 | |
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55 | #define BSP_IS_CPM_IRQ(irqnum) \ |
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56 | (((irqnum) >= BSP_CPM_IRQ_LOWEST_OFFSET) && \ |
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57 | ((irqnum) <= BSP_CPM_IRQ_MAX_OFFSET)) |
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58 | /* |
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59 | * Processor IRQ handlers related definitions |
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60 | */ |
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61 | #define BSP_PROCESSOR_IRQ_NUMBER 1 |
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62 | #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET+1) |
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63 | #define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\ |
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64 | +BSP_PROCESSOR_IRQ_NUMBER-1) |
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65 | |
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66 | #define BSP_IS_PROCESSOR_IRQ(irqnum) \ |
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67 | (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \ |
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68 | ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET)) |
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69 | /* |
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70 | * Summary |
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71 | */ |
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72 | #define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1) |
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73 | #define BSP_LOWEST_OFFSET BSP_SIU_IRQ_LOWEST_OFFSET |
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74 | #define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET |
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75 | |
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76 | #define BSP_IS_VALID_IRQ(irqnum) \ |
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77 | (BSP_IS_PROCESSOR_IRQ(irqnum) \ |
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78 | || BSP_IS_SIU_IRQ(irqnum) \ |
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79 | || BSP_IS_CPM_IRQ(irqnum)) |
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80 | |
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81 | #ifndef ASM |
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82 | #ifdef __cplusplus |
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83 | extern "C" { |
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84 | #endif |
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85 | |
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86 | /* |
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87 | * index table for the module specific handlers, a few entries are only placeholders |
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88 | */ |
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89 | typedef enum { |
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90 | BSP_SIU_EXT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 0, |
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91 | BSP_SIU_INT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 1, |
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92 | BSP_SIU_EXT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 2, |
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93 | BSP_SIU_INT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 3, |
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94 | BSP_SIU_EXT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 4, |
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95 | BSP_SIU_INT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 5, |
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96 | BSP_SIU_EXT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 6, |
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97 | BSP_SIU_INT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 7, |
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98 | BSP_SIU_EXT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 8, |
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99 | BSP_SIU_INT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 9, |
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100 | BSP_SIU_EXT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 10, |
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101 | BSP_SIU_INT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 11, |
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102 | BSP_SIU_EXT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 12, |
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103 | BSP_SIU_INT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 13, |
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104 | BSP_SIU_EXT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 14, |
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105 | BSP_SIU_INT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 15, |
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106 | BSP_SIU_IRQ_LAST = BSP_SIU_IRQ_MAX_OFFSET, |
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107 | /* |
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108 | * Some CPM IRQ symbolic name definition |
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109 | */ |
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110 | BSP_CPM_IRQ_ERROR = (BSP_CPM_IRQ_LOWEST_OFFSET), |
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111 | BSP_CPM_IRQ_PARALLEL_IO_PC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 1), |
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112 | BSP_CPM_IRQ_PARALLEL_IO_PC5 = (BSP_CPM_IRQ_LOWEST_OFFSET + 2), |
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113 | BSP_CPM_IRQ_SMC2_OR_PIP = (BSP_CPM_IRQ_LOWEST_OFFSET + 3), |
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114 | BSP_CPM_IRQ_SMC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 4), |
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115 | BSP_CPM_IRQ_SPI = (BSP_CPM_IRQ_LOWEST_OFFSET + 5), |
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116 | BSP_CPM_IRQ_PARALLEL_IO_PC6 = (BSP_CPM_IRQ_LOWEST_OFFSET + 6), |
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117 | BSP_CPM_IRQ_TIMER_4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 7), |
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118 | BSP_CPM_IRQ_PARALLEL_IO_PC7 = (BSP_CPM_IRQ_LOWEST_OFFSET + 9), |
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119 | BSP_CPM_IRQ_PARALLEL_IO_PC8 = (BSP_CPM_IRQ_LOWEST_OFFSET + 10), |
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120 | BSP_CPM_IRQ_PARALLEL_IO_PC9 = (BSP_CPM_IRQ_LOWEST_OFFSET + 11), |
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121 | BSP_CPM_IRQ_TIMER_3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 12), |
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122 | BSP_CPM_IRQ_PARALLEL_IO_PC10= (BSP_CPM_IRQ_LOWEST_OFFSET + 14), |
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123 | BSP_CPM_IRQ_PARALLEL_IO_PC11= (BSP_CPM_IRQ_LOWEST_OFFSET + 15), |
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124 | BSP_CPM_I2C = (BSP_CPM_IRQ_LOWEST_OFFSET + 16), |
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125 | BSP_CPM_RISC_TIMER_TABLE = (BSP_CPM_IRQ_LOWEST_OFFSET + 17), |
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126 | BSP_CPM_IRQ_TIMER_2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 18), |
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127 | BSP_CPM_IDMA2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 20), |
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128 | BSP_CPM_IDMA1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 21), |
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129 | BSP_CPM_SDMA_CHANNEL_BUS_ERR= (BSP_CPM_IRQ_LOWEST_OFFSET + 22), |
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130 | BSP_CPM_IRQ_PARALLEL_IO_PC12= (BSP_CPM_IRQ_LOWEST_OFFSET + 23), |
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131 | BSP_CPM_IRQ_PARALLEL_IO_PC13= (BSP_CPM_IRQ_LOWEST_OFFSET + 24), |
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132 | BSP_CPM_IRQ_TIMER_1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 25), |
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133 | BSP_CPM_IRQ_PARALLEL_IO_PC14= (BSP_CPM_IRQ_LOWEST_OFFSET + 26), |
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134 | BSP_CPM_IRQ_SCC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 27), |
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135 | BSP_CPM_IRQ_SCC3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 28), |
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136 | BSP_CPM_IRQ_SCC2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 29), |
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137 | BSP_CPM_IRQ_SCC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 30), |
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138 | BSP_CPM_IRQ_PARALLEL_IO_PC15= (BSP_CPM_IRQ_LOWEST_OFFSET + 31), |
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139 | BSP_CPM_IRQ_LAST = BSP_CPM_IRQ_MAX_OFFSET, |
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140 | } rtems_irq_symbolic_name; |
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141 | |
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142 | /* |
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143 | * Symbolic name for CPM interrupt on SIU Internal level 2 |
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144 | */ |
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145 | #define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2 |
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146 | #define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6 |
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147 | #define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3 |
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148 | |
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149 | #define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET |
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150 | #define BSP_INTERRUPT_VECTOR_COUNT (BSP_MAX_OFFSET + 1) |
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151 | |
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152 | extern int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine); |
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153 | |
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154 | #ifdef __cplusplus |
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155 | } |
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156 | #endif |
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157 | #endif /* ASM */ |
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158 | |
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159 | #endif /* TQM8XX_IRQ_IRQ_H */ |
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