1 | /* |
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2 | * RTEMS TQM8xx BSP |
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3 | * This include file contains all board IO definitions. |
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4 | */ |
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5 | |
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6 | /* |
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7 | * This file has been adapted to MPC8xx by: |
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8 | * Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
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9 | * Copyright (c) 2008 |
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10 | * Embedded Brains GmbH |
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11 | * Obere Lagerstr. 30 |
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12 | * D-82178 Puchheim |
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13 | * Germany |
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14 | * rtems@embedded-brains.de |
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15 | * |
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16 | * COPYRIGHT (c) 1989-2008. |
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17 | * On-Line Applications Research Corporation (OAR). |
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18 | * |
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19 | * The license and distribution terms for this file may be |
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20 | * found in the file LICENSE in this distribution or at |
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21 | * http://www.rtems.org/license/LICENSE. |
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22 | */ |
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23 | |
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24 | #ifndef LIBBSP_POWERPC_TQM8XX_BSP_H |
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25 | #define LIBBSP_POWERPC_TQM8XX_BSP_H |
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26 | |
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27 | /* |
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28 | * indicate, that BSP is booted via TQMMon |
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29 | */ |
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30 | #define BSP_HAS_TQMMON |
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31 | |
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32 | #include <libcpu/powerpc-utility.h> |
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33 | |
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34 | LINKER_SYMBOL(TopRamReserved); |
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35 | |
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36 | LINKER_SYMBOL( bsp_ram_start); |
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37 | LINKER_SYMBOL( bsp_ram_end); |
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38 | LINKER_SYMBOL( bsp_ram_size); |
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39 | |
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40 | LINKER_SYMBOL( bsp_rom_start); |
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41 | LINKER_SYMBOL( bsp_rom_end); |
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42 | LINKER_SYMBOL( bsp_rom_size); |
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43 | |
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44 | LINKER_SYMBOL( bsp_section_text_start); |
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45 | LINKER_SYMBOL( bsp_section_text_end); |
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46 | LINKER_SYMBOL( bsp_section_text_size); |
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47 | |
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48 | LINKER_SYMBOL( bsp_section_data_start); |
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49 | LINKER_SYMBOL( bsp_section_data_end); |
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50 | LINKER_SYMBOL( bsp_section_data_size); |
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51 | |
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52 | LINKER_SYMBOL( bsp_section_bss_start); |
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53 | LINKER_SYMBOL( bsp_section_bss_end); |
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54 | LINKER_SYMBOL( bsp_section_bss_size); |
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55 | |
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56 | LINKER_SYMBOL( bsp_interrupt_stack_start); |
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57 | LINKER_SYMBOL( bsp_interrupt_stack_end); |
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58 | LINKER_SYMBOL( bsp_interrupt_stack_size); |
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59 | |
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60 | LINKER_SYMBOL( bsp_work_area_start); |
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61 | |
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62 | #ifndef ASM |
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63 | |
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64 | #include <bspopts.h> |
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65 | |
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66 | #include <rtems.h> |
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67 | #include <rtems/irq.h> |
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68 | #include <mpc8xx.h> |
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69 | #include <mpc8xx/cpm.h> |
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70 | #include <mpc8xx/mmu.h> |
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71 | #include <mpc8xx/console.h> |
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72 | #include <bsp/vectors.h> |
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73 | #include <bsp/tqm.h> |
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74 | #include <libcpu/powerpc-utility.h> |
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75 | #include <bsp/default-initial-extension.h> |
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76 | |
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77 | #ifdef __cplusplus |
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78 | extern "C" { |
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79 | #endif |
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80 | |
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81 | /* |
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82 | * Network driver configuration |
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83 | */ |
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84 | struct rtems_bsdnet_ifconfig; |
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85 | |
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86 | #if BSP_USE_NETWORK_FEC |
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87 | extern int rtems_fec_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, |
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88 | int attaching); |
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89 | #define RTEMS_BSP_FEC_NETWORK_DRIVER_NAME "fec1" |
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90 | #define RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH rtems_fec_enet_driver_attach |
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91 | #endif |
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92 | |
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93 | #if BSP_USE_NETWORK_SCC |
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94 | extern int rtems_scc_enet_driver_attach (struct rtems_bsdnet_ifconfig *config, |
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95 | int attaching); |
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96 | #define RTEMS_BSP_SCC_NETWORK_DRIVER_NAME "scc1" |
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97 | #define RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH rtems_scc_enet_driver_attach |
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98 | #endif |
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99 | |
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100 | #if BSP_USE_NETWORK_FEC |
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101 | #define RTEMS_BSP_NETWORK_DRIVER_NAME RTEMS_BSP_FEC_NETWORK_DRIVER_NAME |
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102 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH |
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103 | #elif BSP_USE_NETWORK_SCC |
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104 | #define RTEMS_BSP_NETWORK_DRIVER_NAME RTEMS_BSP_SCC_NETWORK_DRIVER_NAME |
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105 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH |
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106 | #endif |
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107 | /* |
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108 | * We need to decide how much memory will be non-cacheable. This |
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109 | * will mainly be memory that will be used in DMA (network and serial |
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110 | * buffers). |
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111 | */ |
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112 | #define NOCACHE_MEM_SIZE 512*1024 |
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113 | |
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114 | /* |
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115 | * indicate, that BSP has IDE driver |
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116 | */ |
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117 | #undef RTEMS_BSP_HAS_IDE_DRIVER |
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118 | |
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119 | /* |
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120 | * SPI driver configuration |
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121 | */ |
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122 | |
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123 | /* select values for SPI addressing */ |
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124 | #define PGHPLUS_SPI_ADDR_EEPROM 0 |
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125 | #define PGHPLUS_SPI_ADDR_DISP4 1 |
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126 | /* NOTE: DISP4 occupies two consecutive addresses for data and control port */ |
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127 | #define PGHPLUS_SPI_ADDR_DISP4_DATA (PGHPLUS_SPI_ADDR_DISP4) |
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128 | #define PGHPLUS_SPI_ADDR_DISP4_CTRL (PGHPLUS_SPI_ADDR_DISP4_DATA+1) |
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129 | |
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130 | /* bit masks for Port B lines */ |
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131 | #define PGHPLUS_PB_SPI_EEP_CE_MSK (1<< 0) |
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132 | #define PGHPLUS_PB_SPI_DISP4_RS_MSK (1<<15) |
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133 | #define PGHPLUS_PB_SPI_DISP4_CE_MSK (1<<14) |
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134 | |
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135 | /* |
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136 | * our (internal) bus frequency |
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137 | */ |
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138 | extern uint32_t BSP_bus_frequency; |
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139 | |
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140 | /* |
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141 | * Interfaces to required Clock Driver support methods |
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142 | */ |
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143 | int BSP_disconnect_clock_handler(void); |
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144 | int BSP_connect_clock_handler (rtems_irq_hdl); |
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145 | |
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146 | extern uint32_t bsp_clock_speed; |
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147 | |
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148 | char serial_getc(void); |
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149 | |
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150 | int serial_tstc(void); |
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151 | |
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152 | void serial_init(void); |
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153 | |
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154 | int mbx8xx_console_get_configuration(void); |
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155 | |
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156 | void _InitTQM8xx (void); |
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157 | |
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158 | rtems_status_code bsp_register_spi(void); |
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159 | |
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160 | void *bsp_idle_thread( uintptr_t ignored ); |
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161 | |
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162 | void cpu_init(void); |
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163 | |
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164 | #ifdef __cplusplus |
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165 | } |
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166 | #endif |
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167 | |
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168 | #endif |
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169 | #endif |
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