source: rtems/bsps/powerpc/tqm8xx/include/bsp.h

Last change on this file was bcef89f2, checked in by Sebastian Huber <sebastian.huber@…>, on 05/19/23 at 06:18:25

Update company name

The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.

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[c991eeec]1/**
2 * @file
3 *
4 * @ingroup RTEMSBSPsPowerPCTQM8XX
5 *
6 * @brief Global BSP definitions.
7 */
8
[ee0ea5bf]9/*
10 *  RTEMS TQM8xx BSP
[63de714c]11 *  This include file contains all board IO definitions.
[ee0ea5bf]12 */
13
14/*
[c1dcda5d]15 *  COPYRIGHT (c) 1989-2008.
[63de714c]16 *  On-Line Applications Research Corporation (OAR).
17 *
[bcef89f2]18 *  Copyright (c) 2008 Thomas Doerfler, embedded brains GmbH & Co. KG
[eeea4fee]19 *  All rights reserved.
20 *
[63de714c]21 *  The license and distribution terms for this file may be
22 *  found in the file LICENSE in this distribution or at
[c499856]23 *  http://www.rtems.org/license/LICENSE.
[63de714c]24 */
25
[9cff822a]26#ifndef LIBBSP_POWERPC_TQM8XX_BSP_H
27#define LIBBSP_POWERPC_TQM8XX_BSP_H
[63de714c]28
[c991eeec]29/**
30 * @defgroup RTEMSBSPsPowerPCTQM8XX TQM8XX
31 *
32 * @ingroup RTEMSBSPsPowerPC
33 *
34 * @brief TQM8XX Board Support Package.
35 *
36 * @{
37 */
38
[63de714c]39/*
40 * indicate, that BSP is booted via TQMMon
41 */
42#define BSP_HAS_TQMMON
43
[cdb6eae]44#include <libcpu/powerpc-utility.h>
45
[63de714c]46LINKER_SYMBOL(TopRamReserved);
47
48LINKER_SYMBOL( bsp_ram_start);
49LINKER_SYMBOL( bsp_ram_end);
50LINKER_SYMBOL( bsp_ram_size);
51
52LINKER_SYMBOL( bsp_rom_start);
53LINKER_SYMBOL( bsp_rom_end);
54LINKER_SYMBOL( bsp_rom_size);
55
56LINKER_SYMBOL( bsp_section_text_start);
57LINKER_SYMBOL( bsp_section_text_end);
58LINKER_SYMBOL( bsp_section_text_size);
59
60LINKER_SYMBOL( bsp_section_data_start);
61LINKER_SYMBOL( bsp_section_data_end);
62LINKER_SYMBOL( bsp_section_data_size);
63
64LINKER_SYMBOL( bsp_section_bss_start);
65LINKER_SYMBOL( bsp_section_bss_end);
66LINKER_SYMBOL( bsp_section_bss_size);
67
68LINKER_SYMBOL( bsp_work_area_start);
69
70#ifndef ASM
71
72#include <bspopts.h>
73
74#include <rtems.h>
[3cd3a260]75#include <rtems/irq.h>
[63de714c]76#include <mpc8xx.h>
77#include <mpc8xx/cpm.h>
78#include <mpc8xx/mmu.h>
79#include <mpc8xx/console.h>
80#include <bsp/vectors.h>
81#include <bsp/tqm.h>
[ac7af4a]82#include <libcpu/powerpc-utility.h>
[a052181]83#include <bsp/default-initial-extension.h>
84
85#ifdef __cplusplus
86extern "C" {
87#endif
[63de714c]88
89/*
90 * Network driver configuration
91 */
92struct rtems_bsdnet_ifconfig;
93
94#if BSP_USE_NETWORK_FEC
[ac7af4a]95extern int rtems_fec_enet_driver_attach (struct rtems_bsdnet_ifconfig *config,
[63de714c]96                                         int attaching);
97#define RTEMS_BSP_FEC_NETWORK_DRIVER_NAME       "fec1"
98#define RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH     rtems_fec_enet_driver_attach
99#endif
100
101#if BSP_USE_NETWORK_SCC
[ac7af4a]102extern int rtems_scc_enet_driver_attach (struct rtems_bsdnet_ifconfig *config,
[63de714c]103                                         int attaching);
104#define RTEMS_BSP_SCC_NETWORK_DRIVER_NAME       "scc1"
105#define RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH     rtems_scc_enet_driver_attach
106#endif
107
108#if BSP_USE_NETWORK_FEC
[ac7af4a]109#define RTEMS_BSP_NETWORK_DRIVER_NAME   RTEMS_BSP_FEC_NETWORK_DRIVER_NAME
110#define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_FEC_NETWORK_DRIVER_ATTACH
[63de714c]111#elif BSP_USE_NETWORK_SCC
[ac7af4a]112#define RTEMS_BSP_NETWORK_DRIVER_NAME   RTEMS_BSP_SCC_NETWORK_DRIVER_NAME
113#define RTEMS_BSP_NETWORK_DRIVER_ATTACH RTEMS_BSP_SCC_NETWORK_DRIVER_ATTACH
[63de714c]114#endif
115/*
116 * We need to decide how much memory will be non-cacheable. This
117 * will mainly be memory that will be used in DMA (network and serial
118 * buffers).
119 */
120#define NOCACHE_MEM_SIZE 512*1024
121
122/*
123 * indicate, that BSP has IDE driver
124 */
125#undef RTEMS_BSP_HAS_IDE_DRIVER
126
[de592aa6]127/*
128 * SPI driver configuration
129 */
130
131  /* select values for SPI addressing */
132#define PGHPLUS_SPI_ADDR_EEPROM 0
133#define PGHPLUS_SPI_ADDR_DISP4  1
134  /* NOTE: DISP4 occupies two consecutive addresses for data and control port */
135#define PGHPLUS_SPI_ADDR_DISP4_DATA  (PGHPLUS_SPI_ADDR_DISP4)
136#define PGHPLUS_SPI_ADDR_DISP4_CTRL  (PGHPLUS_SPI_ADDR_DISP4_DATA+1)
137
138  /* bit masks for Port B lines */
139#define PGHPLUS_PB_SPI_EEP_CE_MSK     (1<< 0)
140#define PGHPLUS_PB_SPI_DISP4_RS_MSK   (1<<15)
141#define PGHPLUS_PB_SPI_DISP4_CE_MSK   (1<<14)
[ee0ea5bf]142
[63de714c]143/*
[60e5832]144 * our (internal) bus frequency
[63de714c]145 */
[60e5832]146extern uint32_t BSP_bus_frequency;
[63de714c]147
[ee0ea5bf]148/*
149 *  Interfaces to required Clock Driver support methods
150 */
151int BSP_disconnect_clock_handler(void);
152int BSP_connect_clock_handler (rtems_irq_hdl);
153
[3cd3a260]154extern uint32_t bsp_clock_speed;
155
156char serial_getc(void);
157
158int serial_tstc(void);
159
160void serial_init(void);
161
162int mbx8xx_console_get_configuration(void);
163
164void _InitTQM8xx (void);
165
166rtems_status_code bsp_register_spi(void);
167
168void *bsp_idle_thread( uintptr_t ignored );
169
170void cpu_init(void);
171
[63de714c]172#ifdef __cplusplus
173}
174#endif
[ee0ea5bf]175
[63de714c]176#endif
[c991eeec]177
178/** @} */
179
[63de714c]180#endif
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