[63de714c] | 1 | /*===============================================================*\ |
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| 2 | | Project: RTEMS TQM8xx BSP | |
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| 3 | +-----------------------------------------------------------------+ |
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| 4 | | This file has been adapted to MPC8xx by | |
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| 5 | | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | |
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| 6 | | Copyright (c) 2008 | |
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| 7 | | Embedded Brains GmbH | |
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| 8 | | Obere Lagerstr. 30 | |
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| 9 | | D-82178 Puchheim | |
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| 10 | | Germany | |
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| 11 | | rtems@embedded-brains.de | |
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| 12 | | | |
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| 13 | | See the other copyright notice below for the original parts. | |
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| 14 | +-----------------------------------------------------------------+ |
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| 15 | | The license and distribution terms for this file may be | |
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| 16 | | found in the file LICENSE in this distribution or at | |
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| 17 | | | |
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[c499856] | 18 | | http://www.rtems.org/license/LICENSE. | |
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[63de714c] | 19 | | | |
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| 20 | +-----------------------------------------------------------------+ |
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| 21 | | this file contains the console driver | |
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| 22 | \*===============================================================*/ |
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| 23 | /* derived from: */ |
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| 24 | /* |
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| 25 | * SMC1/2 SCC1..4 raw console serial I/O. |
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| 26 | * adapted to work with up to 4 SCC and 2 SMC |
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| 27 | * |
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| 28 | * This driver is an example of `TASK DRIVEN' `POLLING' or `INTERRUPT' I/O. |
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| 29 | * |
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| 30 | * To run with interrupt-driven I/O, ensure m8xx_smc1_interrupt |
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| 31 | * is set before calling the initialization routine. |
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| 32 | * |
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| 33 | * Author: |
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| 34 | * W. Eric Norum |
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| 35 | * Saskatchewan Accelerator Laboratory |
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| 36 | * University of Saskatchewan |
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| 37 | * Saskatoon, Saskatchewan, CANADA |
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| 38 | * eric@skatter.usask.ca |
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| 39 | * |
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| 40 | * COPYRIGHT (c) 1989-1998. |
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| 41 | * On-Line Applications Research Corporation (OAR). |
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| 42 | * Copyright assigned to U.S. Government, 1994. |
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| 43 | * |
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| 44 | * The license and distribution terms for this file may be |
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| 45 | * found in the file LICENSE in this distribution or at |
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| 46 | * http://www.OARcorp.com/rtems/license.html. |
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| 47 | */ |
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| 48 | |
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| 49 | #include <stdio.h> |
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| 50 | #include <stdlib.h> |
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| 51 | #include <termios.h> |
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| 52 | #include <unistd.h> |
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[2a8afe1] | 53 | |
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| 54 | #include <rtems.h> |
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| 55 | #include <rtems/console.h> |
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| 56 | #include <rtems/libio.h> |
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[63de714c] | 57 | #include <rtems/termiostypes.h> |
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| 58 | #include <rtems/bspIo.h> |
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[d7637d8d] | 59 | #include <rtems/error.h> |
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[2a8afe1] | 60 | #include <rtems/irq.h> |
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| 61 | |
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| 62 | #include <bsp.h> |
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| 63 | #include <mpc8xx.h> |
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| 64 | #include <bsp/irq.h> |
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[63de714c] | 65 | |
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| 66 | /* |
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| 67 | * Interrupt-driven input buffer |
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| 68 | */ |
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[e08dbc5] | 69 | #define RXBUFSIZE 16 |
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[63de714c] | 70 | |
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| 71 | #define M8xx_SICR_BRG1 (0) |
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| 72 | #define M8xx_SICR_BRG2 (1) |
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| 73 | #define M8xx_SICR_BRG3 (2) |
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| 74 | #define M8xx_SICR_BRG4 (3) |
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| 75 | |
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| 76 | #define M8xx_SICR_SCCRX_MSK(scc) (( 7) << (((scc))*8+3)) |
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| 77 | #define M8xx_SICR_SCCRX(scc,clk) ((clk) << (((scc))*8+3)) |
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| 78 | |
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| 79 | #define M8xx_SICR_SCCTX_MSK(scc) (( 7) << (((scc))*8+0)) |
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| 80 | #define M8xx_SICR_SCCTX(scc,clk) ((clk) << (((scc))*8+0)) |
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| 81 | |
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| 82 | #define M8xx_SIMODE_SMCCS(smc,clk) ((clk) << ((smc)*16+12)) |
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| 83 | #define M8xx_SIMODE_SMCCS_MSK(smc) M8xx_SIMODE_SMCCS(smc,7) |
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| 84 | |
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| 85 | #define CONS_CHN_CNT 6 |
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| 86 | #define CONS_CHN_SCC1 0 |
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| 87 | #define CONS_CHN_SCC2 1 |
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| 88 | #define CONS_CHN_SCC3 2 |
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| 89 | #define CONS_CHN_SCC4 3 |
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| 90 | #define CONS_CHN_SMC1 4 |
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| 91 | #define CONS_CHN_SMC2 5 |
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[85e87f1] | 92 | #define CONS_CHN_NONE -1 |
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[63de714c] | 93 | |
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| 94 | /* |
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| 95 | * possible identifiers for bspopts.h: CONS_SxCy_MODE |
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| 96 | */ |
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| 97 | #define CONS_MODE_UNUSED -1 |
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| 98 | #define CONS_MODE_POLLED TERMIOS_POLLED |
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| 99 | #define CONS_MODE_IRQ TERMIOS_IRQ_DRIVEN |
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| 100 | |
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| 101 | #define CHN_IS_SCC(chan) ((chan) < CONS_CHN_SMC1) |
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| 102 | |
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| 103 | #define BRG_CNT 4 |
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| 104 | |
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| 105 | #define MAX_IDL_DEFAULT 10 |
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| 106 | #define DEVICEPREFIX "tty" |
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| 107 | |
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| 108 | /* |
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| 109 | * Interrupt-driven callback |
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| 110 | */ |
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| 111 | static int m8xx_scc_mode[CONS_CHN_CNT]; |
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| 112 | static void *sccttyp[CONS_CHN_CNT]; |
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| 113 | typedef struct m8xx_console_chan_desc_s { |
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| 114 | bool is_scc; /* true for SCC */ |
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| 115 | struct { |
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| 116 | volatile m8xxSCCparms_t *sccp; |
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| 117 | volatile m8xxSMCparms_t *smcp; |
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| 118 | } parms; |
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| 119 | struct { |
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| 120 | volatile m8xxSCCRegisters_t *sccr; |
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| 121 | volatile m8xxSMCRegisters_t *smcr; |
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| 122 | } regs; |
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| 123 | int ivec_src; |
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[60e5832] | 124 | int cr_chan_code; |
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| 125 | int brg_used; |
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[63de714c] | 126 | } m8xx_console_chan_desc_t; |
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| 127 | |
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| 128 | m8xx_console_chan_desc_t m8xx_console_chan_desc[CONS_CHN_CNT] = { |
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| 129 | /* SCC1 */ |
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| 130 | {TRUE, |
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| 131 | {(m8xxSCCparms_t *)&(m8xx.scc1p),NULL}, |
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| 132 | {&(m8xx.scc1),NULL}, |
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[60e5832] | 133 | BSP_CPM_IRQ_SCC1, |
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[63de714c] | 134 | M8xx_CR_CHAN_SCC1, |
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| 135 | -1}, |
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| 136 | /* SCC2 */ |
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| 137 | {TRUE, |
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| 138 | {&(m8xx.scc2p),NULL}, |
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| 139 | {&(m8xx.scc2),NULL}, |
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[60e5832] | 140 | BSP_CPM_IRQ_SCC2, |
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[63de714c] | 141 | M8xx_CR_CHAN_SCC2, |
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| 142 | -1}, |
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| 143 | /* SCC3 */ |
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| 144 | {TRUE, |
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| 145 | {&(m8xx.scc3p),NULL}, |
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| 146 | {&(m8xx.scc3),NULL}, |
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[60e5832] | 147 | BSP_CPM_IRQ_SCC3, |
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[63de714c] | 148 | M8xx_CR_CHAN_SCC3, |
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| 149 | -1}, |
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| 150 | /* SCC4 */ |
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| 151 | {TRUE, |
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| 152 | {&(m8xx.scc4p),NULL}, |
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| 153 | {&(m8xx.scc4),NULL}, |
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[60e5832] | 154 | BSP_CPM_IRQ_SCC4, |
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[63de714c] | 155 | M8xx_CR_CHAN_SCC4, |
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| 156 | -1}, |
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| 157 | /* SMC1 */ |
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| 158 | {FALSE, |
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| 159 | {NULL,&(m8xx.smc1p)}, |
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| 160 | {NULL,&(m8xx.smc1)}, |
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[60e5832] | 161 | BSP_CPM_IRQ_SMC1, |
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[63de714c] | 162 | M8xx_CR_CHAN_SMC1, |
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| 163 | -1}, |
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| 164 | /* SMC2 */ |
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| 165 | {FALSE, |
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| 166 | {NULL,&(m8xx.smc2p)}, |
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| 167 | {NULL,&(m8xx.smc2)}, |
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[60e5832] | 168 | BSP_CPM_IRQ_SMC2_OR_PIP, |
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[63de714c] | 169 | M8xx_CR_CHAN_SMC2, |
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| 170 | -1}}; |
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| 171 | |
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| 172 | #define CHN_PARAM_GET(chan,param) \ |
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| 173 | (m8xx_console_chan_desc[chan].is_scc \ |
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| 174 | ? m8xx_console_chan_desc[chan].parms.sccp->param \ |
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| 175 | : m8xx_console_chan_desc[chan].parms.smcp->param) |
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| 176 | |
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| 177 | #define CHN_PARAM_SET(chan,param,value) \ |
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| 178 | do {if (m8xx_console_chan_desc[chan].is_scc) \ |
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| 179 | m8xx_console_chan_desc[chan].parms.sccp->param = value; \ |
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| 180 | else \ |
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| 181 | m8xx_console_chan_desc[chan].parms.smcp->param = value; \ |
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| 182 | } while (0) |
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| 183 | |
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| 184 | #define CHN_EVENT_GET(chan) \ |
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| 185 | (m8xx_console_chan_desc[chan].is_scc \ |
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| 186 | ? m8xx_console_chan_desc[chan].regs.sccr->scce \ |
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| 187 | : m8xx_console_chan_desc[chan].regs.smcr->smce) |
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| 188 | |
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| 189 | #define CHN_EVENT_CLR(chan,mask) \ |
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| 190 | do { \ |
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| 191 | if (m8xx_console_chan_desc[chan].is_scc) \ |
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| 192 | m8xx_console_chan_desc[chan].regs.sccr->scce = (mask); \ |
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| 193 | else \ |
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| 194 | m8xx_console_chan_desc[chan].regs.smcr->smce = (mask); \ |
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| 195 | }while (0) |
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| 196 | |
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| 197 | #define CHN_MASK_GET(chan) \ |
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| 198 | (m8xx_console_chan_desc[chan].is_scc \ |
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| 199 | ? m8xx_console_chan_desc[chan].regs.sccr->sccm \ |
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| 200 | : m8xx_console_chan_desc[chan].regs.smcr->smcm) |
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| 201 | |
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| 202 | #define CHN_MASK_SET(chan,mask) \ |
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| 203 | do { \ |
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| 204 | if (m8xx_console_chan_desc[chan].is_scc) \ |
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| 205 | m8xx_console_chan_desc[chan].regs.sccr->sccm = (mask); \ |
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| 206 | else \ |
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| 207 | m8xx_console_chan_desc[chan].regs.smcr->smcm = (mask); \ |
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| 208 | }while (0) |
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| 209 | |
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| 210 | |
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| 211 | /* |
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| 212 | * I/O buffers and pointers to buffer descriptors |
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| 213 | */ |
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| 214 | #define SCC_RXBD_CNT 4 |
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| 215 | #define SCC_TXBD_CNT 4 |
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| 216 | typedef volatile char sccRxBuf_t[SCC_RXBD_CNT][RXBUFSIZE]; |
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| 217 | static sccRxBuf_t *rxBuf[CONS_CHN_CNT]; |
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| 218 | |
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| 219 | static volatile m8xxBufferDescriptor_t *sccFrstRxBd[CONS_CHN_CNT]; |
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| 220 | static volatile m8xxBufferDescriptor_t *sccCurrRxBd[CONS_CHN_CNT]; |
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| 221 | static volatile m8xxBufferDescriptor_t *sccFrstTxBd[CONS_CHN_CNT]; |
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| 222 | static volatile m8xxBufferDescriptor_t *sccPrepTxBd[CONS_CHN_CNT]; |
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| 223 | static volatile m8xxBufferDescriptor_t *sccDequTxBd[CONS_CHN_CNT]; |
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| 224 | |
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| 225 | /* |
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| 226 | * Compute baud-rate-generator configuration register value |
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| 227 | */ |
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| 228 | static uint32_t |
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| 229 | sccBRGval (int baud) |
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| 230 | { |
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| 231 | int divisor; |
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| 232 | int div16 = 0; |
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| 233 | |
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[60e5832] | 234 | divisor = ((BSP_bus_frequency / 16) + (baud / 2)) / baud; |
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[63de714c] | 235 | if (divisor > 4096) { |
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| 236 | div16 = 1; |
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| 237 | divisor = (divisor + 8) / 16; |
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| 238 | } |
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| 239 | return M8xx_BRG_EN | M8xx_BRG_EXTC_BRGCLK | ((divisor - 1) << 1) | div16; |
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| 240 | } |
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| 241 | |
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| 242 | typedef struct { |
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| 243 | uint32_t reg_content; |
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| 244 | int link_cnt; |
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[ac7af4a] | 245 | }brg_state_t; |
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[63de714c] | 246 | brg_state_t scc_brg_state[BRG_CNT]; |
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| 247 | |
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| 248 | /* |
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[ac7af4a] | 249 | * initialize brg_state |
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[63de714c] | 250 | */ |
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| 251 | static void sccBRGinit(void) |
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| 252 | { |
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| 253 | int brg_idx; |
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| 254 | |
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| 255 | for (brg_idx = 0;brg_idx < BRG_CNT;brg_idx++) { |
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| 256 | scc_brg_state[brg_idx].reg_content = 0; |
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| 257 | scc_brg_state[brg_idx].link_cnt = 0; |
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| 258 | } |
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| 259 | #ifndef MDE360 |
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| 260 | /* |
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| 261 | * on ZEM40, init CLK4/5 inputs |
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| 262 | */ |
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| 263 | m8xx.papar |= ((1 << 11) | (1 << 12)); |
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| 264 | m8xx.padir &= ~((1 << 11) | (1 << 12)); |
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| 265 | #endif |
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| 266 | } |
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| 267 | |
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[60e5832] | 268 | #if CONS_USE_EXT_CLK |
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[63de714c] | 269 | /* |
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| 270 | * input clock frq for CPM clock inputs |
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| 271 | */ |
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| 272 | static uint32_t clkin_frq[2][4] = { |
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| 273 | #ifdef MDE360 |
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| 274 | {0,0,0,0}, |
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| 275 | {0,0,0,0} |
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| 276 | #else |
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| 277 | {0,0,0,1843000}, |
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| 278 | {1843000,0,0,0} |
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| 279 | #endif |
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| 280 | }; |
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[60e5832] | 281 | #endif |
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[63de714c] | 282 | |
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| 283 | /* |
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| 284 | * allocate, set and connect baud rate generators |
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| 285 | * FIXME: or clock input |
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| 286 | * FIXME: set pin to be clock input |
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| 287 | */ |
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| 288 | |
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| 289 | static int sccBRGalloc(int chan,int baud) |
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| 290 | { |
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| 291 | rtems_interrupt_level level; |
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| 292 | m8xx_console_chan_desc_t *chan_desc = &(m8xx_console_chan_desc[chan]); |
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| 293 | uint32_t reg_val; |
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| 294 | int old_brg; |
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| 295 | int new_brg = -1; |
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| 296 | int brg_idx; |
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[60e5832] | 297 | #if CONS_USE_EXT_CLK |
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[63de714c] | 298 | int clk_group; |
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| 299 | int clk_sel; |
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| 300 | #endif |
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| 301 | |
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| 302 | old_brg = chan_desc->brg_used; |
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| 303 | /* compute brg register contents needed */ |
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| 304 | reg_val = sccBRGval(baud); |
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| 305 | |
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[60e5832] | 306 | #if CONS_EXT_CLK |
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[63de714c] | 307 | /* search for clock input with this frq */ |
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| 308 | clk_group = ((chan == CONS_CHN_SCC3) || |
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| 309 | (chan == CONS_CHN_SCC4) || |
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| 310 | (chan == CONS_CHN_SMC2)) ? 1 : 0; |
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| 311 | |
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| 312 | for (clk_sel = 0, new_brg = -1; |
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| 313 | (clk_sel < 4) && (new_brg < 0); |
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| 314 | clk_sel++) { |
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| 315 | if (baud == (clkin_frq[clk_group][clk_sel] / 16)) { |
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| 316 | new_brg = clk_sel + 4; |
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| 317 | } |
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| 318 | } |
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| 319 | #endif |
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| 320 | |
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[ac7af4a] | 321 | rtems_interrupt_disable(level); |
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[63de714c] | 322 | |
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| 323 | if (new_brg < 0) { |
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| 324 | /* search for brg with this settings */ |
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| 325 | for (brg_idx = 0; |
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| 326 | (new_brg < 0) && (brg_idx < BRG_CNT); |
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| 327 | brg_idx++) { |
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| 328 | if (scc_brg_state[brg_idx].reg_content == reg_val) { |
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| 329 | new_brg = brg_idx; |
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| 330 | } |
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| 331 | } |
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[ac7af4a] | 332 | /* |
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| 333 | * if not found: check, whether brg currently in use |
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| 334 | * is linked only from our channel |
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[63de714c] | 335 | */ |
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| 336 | if ((new_brg < 0) && |
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| 337 | (old_brg >= 0) && |
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| 338 | (scc_brg_state[old_brg].link_cnt == 1)) { |
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| 339 | new_brg = old_brg; |
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| 340 | } |
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| 341 | /* if not found: search for unused brg, set it */ |
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| 342 | for (brg_idx = 0; |
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| 343 | (new_brg < 0) && (brg_idx < BRG_CNT); |
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| 344 | brg_idx++) { |
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| 345 | if (scc_brg_state[brg_idx].link_cnt == 0) { |
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| 346 | new_brg = brg_idx; |
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| 347 | } |
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| 348 | } |
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| 349 | } |
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| 350 | |
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| 351 | /* decrease old link count */ |
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[ac7af4a] | 352 | if ((old_brg >= 0) && |
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[63de714c] | 353 | (old_brg < 4)) { |
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| 354 | scc_brg_state[old_brg].link_cnt--; |
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| 355 | } |
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| 356 | /* increase new brg link count, set brg */ |
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[ac7af4a] | 357 | if ((new_brg >= 0) && |
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[63de714c] | 358 | (new_brg < 4)) { |
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| 359 | scc_brg_state[new_brg].link_cnt++; |
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| 360 | scc_brg_state[new_brg].reg_content = reg_val; |
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| 361 | (&m8xx.brgc1)[new_brg] = reg_val; |
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[ac7af4a] | 362 | } |
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[63de714c] | 363 | rtems_interrupt_enable(level); |
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| 364 | |
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| 365 | /* connect to scc/smc */ |
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| 366 | if (new_brg >= 0) { |
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| 367 | m8xx_console_chan_desc[chan].brg_used = new_brg; |
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| 368 | /* |
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| 369 | * Put SCC in NMSI mode, connect SCC to BRG or CLKx |
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| 370 | */ |
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| 371 | if (m8xx_console_chan_desc[chan].is_scc) { |
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| 372 | m8xx.sicr = ((m8xx.sicr & ~(M8xx_SICR_SCCRX_MSK(chan) | |
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| 373 | M8xx_SICR_SCCTX_MSK(chan))) | |
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| 374 | M8xx_SICR_SCCRX(chan,new_brg)| |
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| 375 | M8xx_SICR_SCCTX(chan,new_brg)); |
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| 376 | } |
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| 377 | else { |
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| 378 | /* connect SMC to BRGx or CLKx... */ |
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| 379 | m8xx.simode = ((m8xx.simode & ~(M8xx_SIMODE_SMCCS_MSK(chan - CONS_CHN_SMC1)))| |
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| 380 | M8xx_SIMODE_SMCCS(chan - CONS_CHN_SMC1,new_brg)); |
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| 381 | } |
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| 382 | } |
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| 383 | return (new_brg < 0); |
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| 384 | } |
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| 385 | |
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| 386 | |
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| 387 | /* |
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| 388 | * Hardware-dependent portion of tcsetattr(). |
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| 389 | */ |
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| 390 | static int |
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| 391 | sccSetAttributes (int minor, const struct termios *t) |
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| 392 | { |
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| 393 | int baud; |
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| 394 | |
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[1c6926c1] | 395 | switch (t->c_ospeed) { |
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[63de714c] | 396 | default: baud = -1; break; |
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| 397 | case B50: baud = 50; break; |
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| 398 | case B75: baud = 75; break; |
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| 399 | case B110: baud = 110; break; |
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| 400 | case B134: baud = 134; break; |
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| 401 | case B150: baud = 150; break; |
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| 402 | case B200: baud = 200; break; |
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| 403 | case B300: baud = 300; break; |
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| 404 | case B600: baud = 600; break; |
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| 405 | case B1200: baud = 1200; break; |
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| 406 | case B1800: baud = 1800; break; |
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| 407 | case B2400: baud = 2400; break; |
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| 408 | case B4800: baud = 4800; break; |
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| 409 | case B9600: baud = 9600; break; |
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| 410 | case B19200: baud = 19200; break; |
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| 411 | case B38400: baud = 38400; break; |
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| 412 | case B57600: baud = 57600; break; |
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| 413 | case B115200: baud = 115200; break; |
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| 414 | case B230400: baud = 230400; break; |
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| 415 | case B460800: baud = 460800; break; |
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| 416 | } |
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| 417 | return sccBRGalloc(minor,baud); |
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| 418 | return 0; |
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| 419 | } |
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| 420 | |
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| 421 | /* |
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[ac7af4a] | 422 | * Interrupt handler |
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[63de714c] | 423 | */ |
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| 424 | static rtems_isr |
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[60e5832] | 425 | sccInterruptHandler (void *arg) |
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[63de714c] | 426 | { |
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[60e5832] | 427 | int chan = (int)arg; |
---|
[63de714c] | 428 | |
---|
| 429 | /* |
---|
| 430 | * Buffer received? |
---|
| 431 | */ |
---|
| 432 | if (CHN_EVENT_GET(chan) & 0x1) { |
---|
| 433 | /* |
---|
[ac7af4a] | 434 | * clear SCC event flag |
---|
[63de714c] | 435 | */ |
---|
| 436 | CHN_EVENT_CLR(chan,0x01); |
---|
| 437 | /* |
---|
| 438 | * process event |
---|
| 439 | */ |
---|
| 440 | while ((sccCurrRxBd[chan]->status & M8xx_BD_EMPTY) == 0) { |
---|
| 441 | if (sccttyp[chan] != NULL) { |
---|
| 442 | rtems_cache_invalidate_multiple_data_lines((void *)sccCurrRxBd[chan]->buffer, |
---|
| 443 | sccCurrRxBd[chan]->length); |
---|
| 444 | rtems_termios_enqueue_raw_characters (sccttyp[chan], |
---|
| 445 | (char *)sccCurrRxBd[chan]->buffer, |
---|
| 446 | sccCurrRxBd[chan]->length); |
---|
| 447 | } |
---|
| 448 | /* |
---|
| 449 | * clear status |
---|
| 450 | */ |
---|
[ac7af4a] | 451 | sccCurrRxBd[chan]->status = |
---|
| 452 | (sccCurrRxBd[chan]->status |
---|
[63de714c] | 453 | & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT)) |
---|
| 454 | | M8xx_BD_EMPTY; |
---|
| 455 | /* |
---|
| 456 | * advance to next BD |
---|
| 457 | */ |
---|
| 458 | if ((sccCurrRxBd[chan]->status & M8xx_BD_WRAP) != 0) { |
---|
| 459 | sccCurrRxBd[chan] = sccFrstRxBd[chan]; |
---|
| 460 | } |
---|
| 461 | else { |
---|
| 462 | sccCurrRxBd[chan]++; |
---|
| 463 | } |
---|
| 464 | } |
---|
| 465 | } |
---|
| 466 | /* |
---|
| 467 | * Buffer transmitted? |
---|
| 468 | */ |
---|
| 469 | if (CHN_EVENT_GET(chan) & 0x2) { |
---|
| 470 | /* |
---|
| 471 | * then clear interrupt event bit |
---|
| 472 | */ |
---|
| 473 | CHN_EVENT_CLR(chan,0x2); |
---|
| 474 | /* |
---|
| 475 | * and signal successful transmit to termios |
---|
| 476 | */ |
---|
| 477 | /* |
---|
| 478 | * FIXME: multiple dequeue calls for multiple buffers |
---|
| 479 | */ |
---|
| 480 | while((sccDequTxBd[chan] != sccPrepTxBd[chan]) && |
---|
| 481 | ((sccDequTxBd[chan]->status & M8xx_BD_READY) == 0)) { |
---|
| 482 | if (sccttyp[chan] != NULL) { |
---|
[ac7af4a] | 483 | rtems_termios_dequeue_characters (sccttyp[chan], |
---|
[63de714c] | 484 | sccDequTxBd[chan]->length); |
---|
| 485 | } |
---|
| 486 | /* |
---|
| 487 | * advance to next BD |
---|
| 488 | */ |
---|
| 489 | if ((sccDequTxBd[chan]->status & M8xx_BD_WRAP) != 0) { |
---|
| 490 | sccDequTxBd[chan] = sccFrstTxBd[chan]; |
---|
| 491 | } |
---|
| 492 | else { |
---|
| 493 | sccDequTxBd[chan]++; |
---|
| 494 | } |
---|
| 495 | } |
---|
| 496 | } |
---|
[60e5832] | 497 | } |
---|
[63de714c] | 498 | |
---|
[60e5832] | 499 | static void |
---|
| 500 | mpc8xx_console_irq_on(const rtems_irq_connect_data *irq) |
---|
| 501 | { |
---|
[de592aa6] | 502 | CHN_MASK_SET(irq->name - BSP_CPM_IRQ_LOWEST_OFFSET, |
---|
| 503 | 3); /* Enable TX and RX interrupts */ |
---|
[60e5832] | 504 | } |
---|
| 505 | |
---|
| 506 | static void |
---|
| 507 | mpc8xx_console_irq_off(const rtems_irq_connect_data *irq) |
---|
| 508 | { |
---|
[de592aa6] | 509 | CHN_MASK_SET(irq->name - BSP_CPM_IRQ_LOWEST_OFFSET, |
---|
| 510 | 0); /* Disable TX and RX interrupts */ |
---|
[60e5832] | 511 | } |
---|
| 512 | |
---|
| 513 | static int |
---|
| 514 | mpc8xx_console_irq_isOn(const rtems_irq_connect_data *irq) |
---|
| 515 | { |
---|
[de592aa6] | 516 | return (0 != CHN_MASK_GET(irq->name - BSP_CPM_IRQ_LOWEST_OFFSET)); /* Check TX and RX interrupts */ |
---|
[63de714c] | 517 | } |
---|
| 518 | |
---|
| 519 | static void |
---|
| 520 | sccInitialize (int chan) |
---|
| 521 | { |
---|
| 522 | int i; |
---|
| 523 | /* |
---|
| 524 | * allocate buffers |
---|
| 525 | * FIXME: use a cache-line size boundary alloc here |
---|
| 526 | */ |
---|
| 527 | rxBuf[chan] = malloc(sizeof(*rxBuf[chan]) + 2*PPC_CACHE_ALIGNMENT); |
---|
| 528 | if (rxBuf[chan] == NULL) { |
---|
[1c193a2] | 529 | rtems_panic("Cannot allocate console rx buffer\n"); |
---|
[63de714c] | 530 | } |
---|
| 531 | else { |
---|
| 532 | /* |
---|
| 533 | * round up rxBuf[chan] to start at a cache line size |
---|
| 534 | */ |
---|
| 535 | rxBuf[chan] = (sccRxBuf_t *) |
---|
[ac7af4a] | 536 | (((uint32_t)rxBuf[chan]) + |
---|
[63de714c] | 537 | (PPC_CACHE_ALIGNMENT |
---|
| 538 | - ((uint32_t)rxBuf[chan]) % PPC_CACHE_ALIGNMENT)); |
---|
| 539 | } |
---|
| 540 | /* |
---|
[ac7af4a] | 541 | * Allocate buffer descriptors |
---|
[63de714c] | 542 | */ |
---|
[ac7af4a] | 543 | sccCurrRxBd[chan] = |
---|
[63de714c] | 544 | sccFrstRxBd[chan] = m8xx_bd_allocate(SCC_RXBD_CNT); |
---|
[ac7af4a] | 545 | sccPrepTxBd[chan] = |
---|
| 546 | sccDequTxBd[chan] = |
---|
[63de714c] | 547 | sccFrstTxBd[chan] = m8xx_bd_allocate(SCC_TXBD_CNT); |
---|
| 548 | switch(chan) { |
---|
| 549 | case CONS_CHN_SCC1: |
---|
| 550 | /* |
---|
| 551 | * Configure port A pins to enable TXD1 and RXD1 pins |
---|
| 552 | * FIXME: add setup for modem control lines.... |
---|
| 553 | */ |
---|
| 554 | m8xx.papar |= 0x03; |
---|
| 555 | m8xx.padir &= ~0x03; |
---|
| 556 | |
---|
| 557 | /* |
---|
| 558 | * Configure port C pins to enable RTS1 pins (static active low) |
---|
| 559 | */ |
---|
| 560 | m8xx.pcpar &= ~0x01; |
---|
| 561 | m8xx.pcso &= ~0x01; |
---|
| 562 | m8xx.pcdir |= 0x01; |
---|
| 563 | m8xx.pcdat &= ~0x01; |
---|
| 564 | break; |
---|
| 565 | case CONS_CHN_SCC2: |
---|
| 566 | /* |
---|
| 567 | * Configure port A pins to enable TXD2 and RXD2 pins |
---|
| 568 | * FIXME: add setup for modem control lines.... |
---|
| 569 | */ |
---|
| 570 | m8xx.papar |= 0x0C; |
---|
| 571 | m8xx.padir &= ~0x0C; |
---|
| 572 | |
---|
| 573 | /* |
---|
| 574 | * Configure port C pins to enable RTS2 pins (static active low) |
---|
| 575 | */ |
---|
| 576 | m8xx.pcpar &= ~0x02; |
---|
| 577 | m8xx.pcso &= ~0x02; |
---|
| 578 | m8xx.pcdir |= 0x02; |
---|
| 579 | m8xx.pcdat &= ~0x02; |
---|
| 580 | break; |
---|
| 581 | case CONS_CHN_SCC3: |
---|
| 582 | /* |
---|
| 583 | * Configure port A pins to enable TXD3 and RXD3 pins |
---|
| 584 | * FIXME: add setup for modem control lines.... |
---|
| 585 | */ |
---|
| 586 | m8xx.papar |= 0x30; |
---|
| 587 | m8xx.padir &= ~0x30; |
---|
| 588 | |
---|
| 589 | /* |
---|
| 590 | * Configure port C pins to enable RTS3 (static active low) |
---|
| 591 | */ |
---|
| 592 | m8xx.pcpar &= ~0x04; |
---|
| 593 | m8xx.pcso &= ~0x04; |
---|
| 594 | m8xx.pcdir |= 0x04; |
---|
| 595 | m8xx.pcdat &= ~0x04; |
---|
| 596 | break; |
---|
| 597 | case CONS_CHN_SCC4: |
---|
| 598 | /* |
---|
| 599 | * Configure port A pins to enable TXD4 and RXD4 pins |
---|
| 600 | * FIXME: add setup for modem control lines.... |
---|
| 601 | */ |
---|
| 602 | m8xx.papar |= 0xC0; |
---|
| 603 | m8xx.padir &= ~0xC0; |
---|
| 604 | |
---|
| 605 | /* |
---|
| 606 | * Configure port C pins to enable RTS4 pins (static active low) |
---|
| 607 | */ |
---|
| 608 | m8xx.pcpar &= ~0x08; |
---|
| 609 | m8xx.pcso &= ~0x08; |
---|
| 610 | m8xx.pcdir |= 0x08; |
---|
| 611 | m8xx.pcdat &= ~0x08; |
---|
| 612 | break; |
---|
| 613 | case CONS_CHN_SMC1: |
---|
| 614 | /* |
---|
| 615 | * Configure port B pins to enable SMTXD1 and SMRXD1 pins |
---|
| 616 | */ |
---|
[ac7af4a] | 617 | m8xx.pbpar |= 0xC0; |
---|
[63de714c] | 618 | m8xx.pbdir &= ~0xC0; |
---|
| 619 | break; |
---|
| 620 | case CONS_CHN_SMC2: |
---|
| 621 | /* |
---|
| 622 | * Configure port B pins to enable SMTXD2 and SMRXD2 pins |
---|
| 623 | */ |
---|
| 624 | m8xx.pbpar |= 0xC00; |
---|
| 625 | m8xx.pbdir &= ~0xC00; |
---|
| 626 | break; |
---|
| 627 | } |
---|
| 628 | /* |
---|
[ac7af4a] | 629 | * allocate and connect BRG |
---|
[63de714c] | 630 | */ |
---|
| 631 | sccBRGalloc(chan,9600); |
---|
[ac7af4a] | 632 | |
---|
| 633 | |
---|
[63de714c] | 634 | /* |
---|
| 635 | * Set up SCCx parameter RAM common to all protocols |
---|
| 636 | */ |
---|
| 637 | CHN_PARAM_SET(chan,rbase,(char *)sccFrstRxBd[chan] - (char *)&m8xx); |
---|
| 638 | CHN_PARAM_SET(chan,tbase,(char *)sccFrstTxBd[chan] - (char *)&m8xx); |
---|
| 639 | CHN_PARAM_SET(chan,rfcr ,M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0)); |
---|
| 640 | CHN_PARAM_SET(chan,tfcr ,M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0)); |
---|
| 641 | if (m8xx_scc_mode[chan] != TERMIOS_POLLED) |
---|
| 642 | CHN_PARAM_SET(chan,mrblr,RXBUFSIZE); |
---|
| 643 | else |
---|
| 644 | CHN_PARAM_SET(chan,mrblr,1); |
---|
[ac7af4a] | 645 | |
---|
[63de714c] | 646 | /* |
---|
| 647 | * Set up SCCx parameter RAM UART-specific parameters |
---|
| 648 | */ |
---|
| 649 | CHN_PARAM_SET(chan,un.uart.max_idl ,MAX_IDL_DEFAULT); |
---|
| 650 | CHN_PARAM_SET(chan,un.uart.brkln ,0); |
---|
| 651 | CHN_PARAM_SET(chan,un.uart.brkec ,0); |
---|
| 652 | CHN_PARAM_SET(chan,un.uart.brkcr ,0); |
---|
| 653 | if (m8xx_console_chan_desc[chan].is_scc) { |
---|
| 654 | m8xx_console_chan_desc[chan].parms.sccp->un.uart.character[0]=0x8000; /* no char filter */ |
---|
| 655 | m8xx_console_chan_desc[chan].parms.sccp->un.uart.rccm=0x80FF; /* control character mask */ |
---|
| 656 | } |
---|
[ac7af4a] | 657 | |
---|
[63de714c] | 658 | /* |
---|
| 659 | * Set up the Receive Buffer Descriptors |
---|
| 660 | */ |
---|
| 661 | for (i = 0;i < SCC_RXBD_CNT;i++) { |
---|
| 662 | sccFrstRxBd[chan][i].status = M8xx_BD_EMPTY | M8xx_BD_INTERRUPT; |
---|
| 663 | if (i == SCC_RXBD_CNT-1) { |
---|
| 664 | sccFrstRxBd[chan][i].status |= M8xx_BD_WRAP; |
---|
| 665 | } |
---|
| 666 | sccFrstRxBd[chan][i].length = 0; |
---|
[e08dbc5] | 667 | sccFrstRxBd[chan][i].buffer = (*rxBuf[chan])[i]; |
---|
[63de714c] | 668 | } |
---|
| 669 | /* |
---|
| 670 | * Setup the Transmit Buffer Descriptor |
---|
| 671 | */ |
---|
| 672 | for (i = 0;i < SCC_TXBD_CNT;i++) { |
---|
| 673 | sccFrstTxBd[chan][i].status = M8xx_BD_INTERRUPT; |
---|
| 674 | if (i == SCC_TXBD_CNT-1) { |
---|
| 675 | sccFrstTxBd[chan][i].status |= M8xx_BD_WRAP; |
---|
| 676 | } |
---|
| 677 | sccFrstTxBd[chan][i].length = 0; |
---|
| 678 | sccFrstTxBd[chan][i].buffer = NULL; |
---|
| 679 | } |
---|
[ac7af4a] | 680 | |
---|
[63de714c] | 681 | /* |
---|
| 682 | * Set up SCC general and protocol-specific mode registers |
---|
| 683 | */ |
---|
| 684 | CHN_EVENT_CLR(chan,~0); /* Clear any pending events */ |
---|
| 685 | CHN_MASK_SET(chan,0); /* Mask all interrupt/event sources */ |
---|
[ac7af4a] | 686 | |
---|
[63de714c] | 687 | if (m8xx_console_chan_desc[chan].is_scc) { |
---|
| 688 | m8xx_console_chan_desc[chan].regs.sccr->psmr = 0xb000; /* 8N1, CTS flow control */ |
---|
| 689 | m8xx_console_chan_desc[chan].regs.sccr->gsmr_h = 0x00000000; |
---|
| 690 | m8xx_console_chan_desc[chan].regs.sccr->gsmr_l = 0x00028004; /* UART mode */ |
---|
| 691 | } |
---|
| 692 | else { |
---|
| 693 | m8xx_console_chan_desc[chan].regs.smcr->smcmr = 0x4820; |
---|
| 694 | } |
---|
| 695 | /* |
---|
| 696 | * Send "Init parameters" command |
---|
| 697 | */ |
---|
[ac7af4a] | 698 | m8xx_cp_execute_cmd(M8xx_CR_OP_INIT_RX_TX |
---|
[63de714c] | 699 | | m8xx_console_chan_desc[chan].cr_chan_code); |
---|
[ac7af4a] | 700 | |
---|
[63de714c] | 701 | /* |
---|
| 702 | * Enable receiver and transmitter |
---|
| 703 | */ |
---|
| 704 | if (m8xx_console_chan_desc[chan].is_scc) { |
---|
| 705 | m8xx_console_chan_desc[chan].regs.sccr->gsmr_l |= 0x00000030; |
---|
| 706 | } |
---|
| 707 | else { |
---|
| 708 | m8xx_console_chan_desc[chan].regs.smcr->smcmr |= 0x0003; |
---|
| 709 | } |
---|
| 710 | |
---|
| 711 | if (m8xx_scc_mode[chan] != TERMIOS_POLLED) { |
---|
[ac7af4a] | 712 | |
---|
[60e5832] | 713 | rtems_irq_connect_data irq_conn_data = { |
---|
| 714 | m8xx_console_chan_desc[chan].ivec_src, |
---|
| 715 | sccInterruptHandler, /* rtems_irq_hdl */ |
---|
| 716 | (rtems_irq_hdl_param)chan, /* (rtems_irq_hdl_param) */ |
---|
| 717 | mpc8xx_console_irq_on, /* (rtems_irq_enable) */ |
---|
| 718 | mpc8xx_console_irq_off, /* (rtems_irq_disable) */ |
---|
| 719 | mpc8xx_console_irq_isOn /* (rtems_irq_is_enabled) */ |
---|
| 720 | }; |
---|
| 721 | if (!BSP_install_rtems_irq_handler (&irq_conn_data)) { |
---|
| 722 | rtems_panic("console: cannot install IRQ handler"); |
---|
| 723 | } |
---|
[63de714c] | 724 | } |
---|
| 725 | } |
---|
| 726 | |
---|
| 727 | /* |
---|
| 728 | * polled scc read function |
---|
| 729 | */ |
---|
| 730 | static int |
---|
| 731 | sccPollRead (int minor) |
---|
| 732 | { |
---|
[e08dbc5] | 733 | int c = -1; |
---|
[63de714c] | 734 | int chan = minor; |
---|
| 735 | |
---|
[e08dbc5] | 736 | while(1) { |
---|
| 737 | if ((sccCurrRxBd[chan]->status & M8xx_BD_EMPTY) != 0) { |
---|
| 738 | return -1; |
---|
| 739 | } |
---|
[ac7af4a] | 740 | |
---|
| 741 | if (0 == (sccCurrRxBd[chan]->status & (M8xx_BD_OVERRUN |
---|
| 742 | | M8xx_BD_PARITY_ERROR |
---|
[e08dbc5] | 743 | | M8xx_BD_FRAMING_ERROR |
---|
| 744 | | M8xx_BD_BREAK |
---|
| 745 | | M8xx_BD_IDLE))) { |
---|
| 746 | /* character received and no error detected */ |
---|
| 747 | rtems_cache_invalidate_multiple_data_lines((void *)sccCurrRxBd[chan]->buffer, |
---|
| 748 | sccCurrRxBd[chan]->length); |
---|
| 749 | c = (unsigned)*((char *)sccCurrRxBd[chan]->buffer); |
---|
| 750 | /* |
---|
| 751 | * clear status |
---|
| 752 | */ |
---|
| 753 | } |
---|
[ac7af4a] | 754 | sccCurrRxBd[chan]->status = |
---|
| 755 | (sccCurrRxBd[chan]->status |
---|
[e08dbc5] | 756 | & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT)) |
---|
| 757 | | M8xx_BD_EMPTY; |
---|
| 758 | /* |
---|
| 759 | * advance to next BD |
---|
| 760 | */ |
---|
| 761 | if ((sccCurrRxBd[chan]->status & M8xx_BD_WRAP) != 0) { |
---|
| 762 | sccCurrRxBd[chan] = sccFrstRxBd[chan]; |
---|
| 763 | } |
---|
| 764 | else { |
---|
| 765 | sccCurrRxBd[chan]++; |
---|
| 766 | } |
---|
| 767 | if (c >= 0) { |
---|
| 768 | return c; |
---|
| 769 | } |
---|
[63de714c] | 770 | } |
---|
| 771 | } |
---|
| 772 | |
---|
| 773 | |
---|
| 774 | /* |
---|
| 775 | * Device-dependent write routine |
---|
| 776 | * Interrupt-driven devices: |
---|
| 777 | * Begin transmission of as many characters as possible (minimum is 1). |
---|
| 778 | * Polling devices: |
---|
| 779 | * Transmit all characters. |
---|
| 780 | */ |
---|
[39a9f8e] | 781 | static ssize_t |
---|
| 782 | sccInterruptWrite (int minor, const char *buf, size_t len) |
---|
[63de714c] | 783 | { |
---|
[e18db9f] | 784 | if (len > 0) { |
---|
| 785 | int chan = minor; |
---|
[63de714c] | 786 | |
---|
[e18db9f] | 787 | if ((sccPrepTxBd[chan]->status & M8xx_BD_READY) == 0) { |
---|
| 788 | sccPrepTxBd[chan]->buffer = (char *)buf; |
---|
| 789 | sccPrepTxBd[chan]->length = len; |
---|
| 790 | rtems_cache_flush_multiple_data_lines((const void *)buf,len); |
---|
| 791 | /* |
---|
| 792 | * clear status, set ready bit |
---|
| 793 | */ |
---|
| 794 | sccPrepTxBd[chan]->status = |
---|
| 795 | (sccPrepTxBd[chan]->status |
---|
| 796 | & M8xx_BD_WRAP) |
---|
| 797 | | M8xx_BD_READY | M8xx_BD_INTERRUPT; |
---|
| 798 | if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) { |
---|
| 799 | sccPrepTxBd[chan] = sccFrstTxBd[chan]; |
---|
| 800 | } |
---|
| 801 | else { |
---|
| 802 | sccPrepTxBd[chan]++; |
---|
| 803 | } |
---|
[63de714c] | 804 | } |
---|
| 805 | } |
---|
[e18db9f] | 806 | |
---|
[63de714c] | 807 | return 0; |
---|
| 808 | } |
---|
| 809 | |
---|
[39a9f8e] | 810 | static ssize_t |
---|
| 811 | sccPollWrite (int minor, const char *buf, size_t len) |
---|
[63de714c] | 812 | { |
---|
[85e87f1] | 813 | static char txBuf[CONS_CHN_CNT][SCC_TXBD_CNT]; |
---|
[63de714c] | 814 | int chan = minor; |
---|
| 815 | int bd_used; |
---|
[39a9f8e] | 816 | size_t retval = len; |
---|
[ac7af4a] | 817 | |
---|
[63de714c] | 818 | while (len--) { |
---|
| 819 | while (sccPrepTxBd[chan]->status & M8xx_BD_READY) |
---|
| 820 | continue; |
---|
| 821 | bd_used = sccPrepTxBd[chan]-sccFrstTxBd[chan]; |
---|
| 822 | txBuf[chan][bd_used] = *buf++; |
---|
| 823 | rtems_cache_flush_multiple_data_lines((const void *)&txBuf[chan][bd_used], |
---|
[ac7af4a] | 824 | sizeof(txBuf[chan][bd_used])); |
---|
[63de714c] | 825 | sccPrepTxBd[chan]->buffer = &(txBuf[chan][bd_used]); |
---|
| 826 | sccPrepTxBd[chan]->length = 1; |
---|
[ac7af4a] | 827 | sccPrepTxBd[chan]->status = |
---|
| 828 | (sccPrepTxBd[chan]->status |
---|
[63de714c] | 829 | & M8xx_BD_WRAP) |
---|
| 830 | | M8xx_BD_READY; |
---|
| 831 | if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) { |
---|
| 832 | sccPrepTxBd[chan] = sccFrstTxBd[chan]; |
---|
| 833 | } |
---|
| 834 | else { |
---|
| 835 | sccPrepTxBd[chan]++; |
---|
| 836 | } |
---|
| 837 | } |
---|
[39a9f8e] | 838 | return retval; |
---|
[63de714c] | 839 | } |
---|
| 840 | |
---|
[85e87f1] | 841 | /* |
---|
| 842 | * printk basic support |
---|
| 843 | */ |
---|
| 844 | int BSP_output_chan = CONS_CHN_NONE; /* channel used for printk operation */ |
---|
| 845 | |
---|
| 846 | static void console_debug_putc_onlcr(const char c) |
---|
| 847 | { |
---|
| 848 | rtems_interrupt_level irq_level; |
---|
| 849 | |
---|
| 850 | if (BSP_output_chan != CONS_CHN_NONE) { |
---|
| 851 | rtems_interrupt_disable(irq_level); |
---|
[ac7af4a] | 852 | |
---|
[85e87f1] | 853 | sccPollWrite (BSP_output_chan,&c,1); |
---|
| 854 | rtems_interrupt_enable(irq_level); |
---|
| 855 | } |
---|
| 856 | } |
---|
| 857 | |
---|
[989938f1] | 858 | BSP_output_char_function_type BSP_output_char = console_debug_putc_onlcr; |
---|
| 859 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
---|
[85e87f1] | 860 | |
---|
| 861 | |
---|
[63de714c] | 862 | /* |
---|
| 863 | *************** |
---|
| 864 | * BOILERPLATE * |
---|
| 865 | *************** |
---|
| 866 | */ |
---|
| 867 | |
---|
| 868 | struct { |
---|
| 869 | rtems_device_minor_number minor; |
---|
| 870 | int driver_mode; |
---|
| 871 | } channel_list[] = { |
---|
| 872 | {CONS_CHN_SMC1,CONS_SMC1_MODE}, |
---|
| 873 | {CONS_CHN_SMC2,CONS_SMC2_MODE}, |
---|
| 874 | {CONS_CHN_SCC1,CONS_SCC1_MODE}, |
---|
| 875 | {CONS_CHN_SCC2,CONS_SCC2_MODE}, |
---|
| 876 | {CONS_CHN_SCC3,CONS_SCC3_MODE}, |
---|
| 877 | {CONS_CHN_SCC4,CONS_SCC4_MODE} |
---|
| 878 | }; |
---|
| 879 | |
---|
| 880 | |
---|
| 881 | /* |
---|
| 882 | * Initialize and register the device |
---|
| 883 | */ |
---|
| 884 | rtems_device_driver console_initialize(rtems_device_major_number major, |
---|
| 885 | rtems_device_minor_number minor,/* ignored */ |
---|
| 886 | void *arg |
---|
| 887 | ) |
---|
| 888 | { |
---|
| 889 | rtems_status_code status = RTEMS_SUCCESSFUL; |
---|
| 890 | int chan,entry,ttynum; |
---|
| 891 | char tty_name[] = "/dev/tty00"; |
---|
| 892 | |
---|
| 893 | /* |
---|
| 894 | * Set up TERMIOS |
---|
| 895 | */ |
---|
| 896 | rtems_termios_initialize (); |
---|
| 897 | /* |
---|
| 898 | * init BRG allocataion |
---|
| 899 | */ |
---|
| 900 | sccBRGinit(); |
---|
| 901 | ttynum = 0; |
---|
| 902 | for (entry = 0; |
---|
| 903 | (entry < sizeof(channel_list)/sizeof(channel_list[0])) |
---|
| 904 | && (status == RTEMS_SUCCESSFUL); |
---|
| 905 | entry++) { |
---|
| 906 | if (channel_list[entry].driver_mode != CONS_MODE_UNUSED) { |
---|
| 907 | /* |
---|
| 908 | * Do device-specific initialization |
---|
| 909 | */ |
---|
| 910 | chan = channel_list[entry].minor; |
---|
| 911 | m8xx_scc_mode[chan] = channel_list[entry].driver_mode; |
---|
| 912 | sccInitialize (chan); |
---|
| 913 | |
---|
| 914 | /* |
---|
| 915 | * build device name |
---|
| 916 | */ |
---|
| 917 | tty_name[sizeof(tty_name)-2] = '0'+ttynum; |
---|
| 918 | ttynum++; |
---|
| 919 | /* |
---|
| 920 | * Register the device |
---|
| 921 | */ |
---|
| 922 | status = rtems_io_register_name (tty_name, |
---|
[ac7af4a] | 923 | major, |
---|
[63de714c] | 924 | channel_list[entry].minor); |
---|
| 925 | if (status != RTEMS_SUCCESSFUL) { |
---|
| 926 | rtems_fatal_error_occurred (status); |
---|
| 927 | } |
---|
[ac7af4a] | 928 | } |
---|
[63de714c] | 929 | } |
---|
| 930 | /* |
---|
| 931 | * register /dev/console |
---|
| 932 | */ |
---|
| 933 | status = rtems_io_register_name ("/dev/console", |
---|
[ac7af4a] | 934 | major, |
---|
[63de714c] | 935 | CONSOLE_CHN); |
---|
| 936 | if (status != RTEMS_SUCCESSFUL) { |
---|
| 937 | rtems_fatal_error_occurred (status); |
---|
| 938 | } |
---|
| 939 | /* |
---|
[85e87f1] | 940 | * enable printk support |
---|
[63de714c] | 941 | */ |
---|
[85e87f1] | 942 | BSP_output_chan = PRINTK_CHN; |
---|
| 943 | |
---|
[63de714c] | 944 | return RTEMS_SUCCESSFUL; |
---|
| 945 | } |
---|
| 946 | |
---|
| 947 | /* |
---|
| 948 | * Open the device |
---|
| 949 | */ |
---|
| 950 | rtems_device_driver console_open( |
---|
| 951 | rtems_device_major_number major, |
---|
| 952 | rtems_device_minor_number minor, |
---|
| 953 | void * arg |
---|
| 954 | ) |
---|
| 955 | { |
---|
| 956 | rtems_status_code status; |
---|
| 957 | int chan = minor; |
---|
| 958 | rtems_libio_open_close_args_t *args = (rtems_libio_open_close_args_t *)arg; |
---|
| 959 | static const rtems_termios_callbacks interruptCallbacks = { |
---|
| 960 | NULL, /* firstOpen */ |
---|
| 961 | NULL, /* lastClose */ |
---|
| 962 | NULL, /* pollRead */ |
---|
| 963 | sccInterruptWrite, /* write */ |
---|
| 964 | sccSetAttributes, /* setAttributes */ |
---|
| 965 | NULL, /* stopRemoteTx */ |
---|
| 966 | NULL, /* startRemoteTx */ |
---|
| 967 | TERMIOS_IRQ_DRIVEN /* outputUsesInterrupts */ |
---|
| 968 | }; |
---|
| 969 | static const rtems_termios_callbacks pollCallbacks = { |
---|
| 970 | NULL, /* firstOpen */ |
---|
| 971 | NULL, /* lastClose */ |
---|
| 972 | sccPollRead, /* pollRead */ |
---|
| 973 | sccPollWrite, /* write */ |
---|
| 974 | sccSetAttributes, /* setAttributes */ |
---|
| 975 | NULL, /* stopRemoteTx */ |
---|
| 976 | NULL, /* startRemoteTx */ |
---|
| 977 | 0 /* outputUsesInterrupts */ |
---|
| 978 | }; |
---|
| 979 | |
---|
[ac7af4a] | 980 | if (m8xx_scc_mode[chan] == TERMIOS_IRQ_DRIVEN) { |
---|
[63de714c] | 981 | status = rtems_termios_open (major, minor, arg, &interruptCallbacks); |
---|
| 982 | sccttyp[chan] = args->iop->data1; |
---|
| 983 | } |
---|
| 984 | else { |
---|
| 985 | status = rtems_termios_open (major, minor, arg, &pollCallbacks); |
---|
| 986 | sccttyp[chan] = args->iop->data1; |
---|
| 987 | } |
---|
| 988 | return status; |
---|
| 989 | } |
---|
[ac7af4a] | 990 | |
---|
[63de714c] | 991 | /* |
---|
| 992 | * Close the device |
---|
| 993 | */ |
---|
| 994 | rtems_device_driver console_close( |
---|
| 995 | rtems_device_major_number major, |
---|
| 996 | rtems_device_minor_number minor, |
---|
| 997 | void * arg |
---|
| 998 | ) |
---|
| 999 | { |
---|
| 1000 | rtems_status_code rc; |
---|
| 1001 | |
---|
| 1002 | rc = rtems_termios_close (arg); |
---|
| 1003 | sccttyp[minor] = NULL; |
---|
| 1004 | |
---|
| 1005 | return rc; |
---|
| 1006 | |
---|
| 1007 | } |
---|
| 1008 | |
---|
| 1009 | /* |
---|
| 1010 | * Read from the device |
---|
| 1011 | */ |
---|
| 1012 | rtems_device_driver console_read( |
---|
| 1013 | rtems_device_major_number major, |
---|
| 1014 | rtems_device_minor_number minor, |
---|
| 1015 | void * arg |
---|
| 1016 | ) |
---|
| 1017 | { |
---|
| 1018 | return rtems_termios_read (arg); |
---|
| 1019 | } |
---|
| 1020 | |
---|
| 1021 | /* |
---|
| 1022 | * Write to the device |
---|
| 1023 | */ |
---|
| 1024 | rtems_device_driver console_write( |
---|
| 1025 | rtems_device_major_number major, |
---|
| 1026 | rtems_device_minor_number minor, |
---|
| 1027 | void * arg |
---|
| 1028 | ) |
---|
| 1029 | { |
---|
| 1030 | return rtems_termios_write (arg); |
---|
| 1031 | } |
---|
| 1032 | |
---|
| 1033 | #if 0 |
---|
| 1034 | static int scc_io_set_trm_char(rtems_device_minor_number minor, |
---|
| 1035 | rtems_libio_ioctl_args_t *ioa) |
---|
| 1036 | { |
---|
| 1037 | rtems_status_code rc = RTEMS_SUCCESSFUL; |
---|
| 1038 | con360_io_trm_char_t *trm_char_info = ioa->buffer; |
---|
| 1039 | |
---|
| 1040 | /* |
---|
| 1041 | * check, that parameter is non-NULL |
---|
| 1042 | */ |
---|
| 1043 | if ((rc == RTEMS_SUCCESSFUL) && |
---|
| 1044 | (trm_char_info == NULL)) { |
---|
| 1045 | rc = RTEMS_INVALID_ADDRESS; |
---|
| 1046 | } |
---|
| 1047 | /* |
---|
| 1048 | * transfer max_idl |
---|
| 1049 | */ |
---|
| 1050 | if (rc == RTEMS_SUCCESSFUL) { |
---|
| 1051 | if (trm_char_info->max_idl >= 0x10000) { |
---|
| 1052 | rc = RTEMS_INVALID_NUMBER; |
---|
| 1053 | } |
---|
| 1054 | else if (trm_char_info->max_idl > 0) { |
---|
| 1055 | CHN_PARAM_SET(minor,un.uart.max_idl ,trm_char_info->max_idl); |
---|
| 1056 | } |
---|
| 1057 | else if (trm_char_info->max_idl == 0) { |
---|
| 1058 | CHN_PARAM_SET(minor,un.uart.max_idl ,MAX_IDL_DEFAULT); |
---|
| 1059 | } |
---|
| 1060 | } |
---|
| 1061 | /* |
---|
[ac7af4a] | 1062 | * transfer characters |
---|
[63de714c] | 1063 | */ |
---|
| 1064 | if (rc == RTEMS_SUCCESSFUL) { |
---|
| 1065 | if (trm_char_info->char_cnt > CON8XX_TRM_CHAR_CNT) { |
---|
| 1066 | rc = RTEMS_TOO_MANY; |
---|
| 1067 | } |
---|
| 1068 | else if (trm_char_info->char_cnt >= 0) { |
---|
| 1069 | /* |
---|
| 1070 | * check, whether device is a SCC |
---|
| 1071 | */ |
---|
[ac7af4a] | 1072 | if ((rc == RTEMS_SUCCESSFUL) && |
---|
[63de714c] | 1073 | !m8xx_console_chan_desc[minor].is_scc) { |
---|
| 1074 | rc = RTEMS_UNSATISFIED; |
---|
| 1075 | } |
---|
| 1076 | else { |
---|
| 1077 | int idx = 0; |
---|
| 1078 | for(idx = 0;idx < trm_char_info->char_cnt;idx++) { |
---|
| 1079 | m8xx_console_chan_desc[minor].parms.sccp->un.uart.character[idx] = |
---|
| 1080 | trm_char_info->character[idx] & 0x00ff; |
---|
| 1081 | } |
---|
| 1082 | if (trm_char_info->char_cnt < CON8XX_TRM_CHAR_CNT) { |
---|
| 1083 | m8xx_console_chan_desc[minor].parms.sccp |
---|
| 1084 | ->un.uart.character[trm_char_info->char_cnt] = 0x8000; |
---|
| 1085 | } |
---|
| 1086 | } |
---|
| 1087 | } |
---|
| 1088 | } |
---|
| 1089 | |
---|
| 1090 | return rc; |
---|
| 1091 | } |
---|
| 1092 | #endif |
---|
| 1093 | |
---|
| 1094 | /* |
---|
| 1095 | * Handle ioctl request. |
---|
| 1096 | */ |
---|
| 1097 | rtems_device_driver console_control( |
---|
| 1098 | rtems_device_major_number major, |
---|
| 1099 | rtems_device_minor_number minor, |
---|
| 1100 | void * arg |
---|
| 1101 | ) |
---|
[ac7af4a] | 1102 | { |
---|
[63de714c] | 1103 | rtems_libio_ioctl_args_t *ioa=arg; |
---|
| 1104 | |
---|
| 1105 | switch (ioa->command) { |
---|
| 1106 | #if 0 |
---|
| 1107 | case CON8XX_IO_SET_TRM_CHAR: |
---|
| 1108 | return scc_io_set_trm_char(minor, ioa); |
---|
[ac7af4a] | 1109 | #endif |
---|
[63de714c] | 1110 | default: |
---|
| 1111 | return rtems_termios_ioctl (arg); |
---|
| 1112 | break; |
---|
| 1113 | } |
---|
| 1114 | } |
---|
| 1115 | |
---|