source: rtems/bsps/powerpc/t32mppc/start/bspstart.c @ e560ee85

Last change on this file since e560ee85 was e560ee85, checked in by Joel Sherrill <joel@…>, on 03/01/22 at 21:38:55

bsps/powerpc/: Scripted embedded brains header file clean up

Updates #4625.

  • Property mode set to 100644
File size: 2.2 KB
Line 
1/*
2 * Copyright (c) 2012, 2017 embedded brains GmbH.  All rights reserved.
3 *
4 * The license and distribution terms for this file may be
5 * found in the file LICENSE in this distribution or at
6 * http://www.rtems.org/license/LICENSE.
7 */
8
9#include <rtems/config.h>
10#include <rtems/counter.h>
11
12#include <bsp.h>
13#include <bsp/vectors.h>
14#include <bsp/bootcard.h>
15#include <bsp/irq-generic.h>
16#include <bsp/linker-symbols.h>
17
18LINKER_SYMBOL(bsp_exc_vector_base);
19
20/*
21 * Configuration parameter for clock driver.  The Trace32 PowerPC simulator has
22 * an odd decrementer frequency.  The time base frequency is one tick per
23 * instruction.  The decrementer frequency is one tick per ten instructions.
24 * The clock driver assumes that the time base and decrementer frequencies are
25 * equal.  For now we simulate processor that issues 10000000 instructions per
26 * second.
27 */
28uint32_t bsp_time_base_frequency = 10000000;
29
30#define MTIVPR(base) \
31  __asm__ volatile ("mtivpr %0" : : "r" (base))
32
33#define VECTOR_TABLE_ENTRY_SIZE 16
34
35#define MTIVOR(vec, offset) \
36  do { \
37    __asm__ volatile ("mtspr " RTEMS_XSTRING(vec) ", %0" : : "r" (offset)); \
38    offset += VECTOR_TABLE_ENTRY_SIZE; \
39  } while (0)
40
41static void t32mppc_initialize_exceptions(void)
42{
43  uintptr_t addr;
44
45  ppc_exc_initialize_interrupt_stack(
46    (uintptr_t) _ISR_Stack_area_begin
47  );
48
49  addr = (uintptr_t) bsp_exc_vector_base;
50  MTIVPR(addr);
51  MTIVOR(BOOKE_IVOR0,  addr);
52  MTIVOR(BOOKE_IVOR1,  addr);
53  MTIVOR(BOOKE_IVOR2,  addr);
54  MTIVOR(BOOKE_IVOR3,  addr);
55  MTIVOR(BOOKE_IVOR4,  addr);
56  MTIVOR(BOOKE_IVOR5,  addr);
57  MTIVOR(BOOKE_IVOR6,  addr);
58  MTIVOR(BOOKE_IVOR7,  addr);
59  MTIVOR(BOOKE_IVOR8,  addr);
60  MTIVOR(BOOKE_IVOR9,  addr);
61  MTIVOR(BOOKE_IVOR10, addr);
62  MTIVOR(BOOKE_IVOR11, addr);
63  MTIVOR(BOOKE_IVOR12, addr);
64  MTIVOR(BOOKE_IVOR13, addr);
65  MTIVOR(BOOKE_IVOR14, addr);
66  MTIVOR(BOOKE_IVOR15, addr);
67  MTIVOR(BOOKE_IVOR32, addr);
68  MTIVOR(BOOKE_IVOR33, addr);
69  MTIVOR(BOOKE_IVOR34, addr);
70  MTIVOR(BOOKE_IVOR35, addr);
71}
72
73uint32_t _CPU_Counter_frequency(void)
74{
75  return bsp_time_base_frequency;
76}
77
78void bsp_start(void)
79{
80  get_ppc_cpu_type();
81  get_ppc_cpu_revision();
82  t32mppc_initialize_exceptions();
83  bsp_interrupt_initialize();
84}
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