source: rtems/bsps/powerpc/t32mppc/start/bspstart.c @ a2dad96

5
Last change on this file since a2dad96 was 9964895, checked in by Sebastian Huber <sebastian.huber@…>, on 04/20/18 at 08:35:35

bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 2.4 KB
Line 
1/*
2 * Copyright (c) 2012, 2017 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <rtems/config.h>
16#include <rtems/counter.h>
17
18#include <bsp.h>
19#include <bsp/vectors.h>
20#include <bsp/bootcard.h>
21#include <bsp/irq-generic.h>
22#include <bsp/linker-symbols.h>
23
24LINKER_SYMBOL(bsp_exc_vector_base);
25
26/*
27 * Configuration parameter for clock driver.  The Trace32 PowerPC simulator has
28 * an odd decrementer frequency.  The time base frequency is one tick per
29 * instruction.  The decrementer frequency is one tick per ten instructions.
30 * The clock driver assumes that the time base and decrementer frequencies are
31 * equal.  For now we simulate processor that issues 10000000 instructions per
32 * second.
33 */
34uint32_t bsp_time_base_frequency = 10000000;
35
36#define MTIVPR(base) \
37  __asm__ volatile ("mtivpr %0" : : "r" (base))
38
39#define VECTOR_TABLE_ENTRY_SIZE 16
40
41#define MTIVOR(vec, offset) \
42  do { \
43    __asm__ volatile ("mtspr " RTEMS_XSTRING(vec) ", %0" : : "r" (offset)); \
44    offset += VECTOR_TABLE_ENTRY_SIZE; \
45  } while (0)
46
47static void t32mppc_initialize_exceptions(void *interrupt_stack_begin)
48{
49  uintptr_t addr;
50
51  ppc_exc_initialize_interrupt_stack(
52    (uintptr_t) interrupt_stack_begin,
53    rtems_configuration_get_interrupt_stack_size()
54  );
55
56  addr = (uintptr_t) bsp_exc_vector_base;
57  MTIVPR(addr);
58  MTIVOR(BOOKE_IVOR0,  addr);
59  MTIVOR(BOOKE_IVOR1,  addr);
60  MTIVOR(BOOKE_IVOR2,  addr);
61  MTIVOR(BOOKE_IVOR3,  addr);
62  MTIVOR(BOOKE_IVOR4,  addr);
63  MTIVOR(BOOKE_IVOR5,  addr);
64  MTIVOR(BOOKE_IVOR6,  addr);
65  MTIVOR(BOOKE_IVOR7,  addr);
66  MTIVOR(BOOKE_IVOR8,  addr);
67  MTIVOR(BOOKE_IVOR9,  addr);
68  MTIVOR(BOOKE_IVOR10, addr);
69  MTIVOR(BOOKE_IVOR11, addr);
70  MTIVOR(BOOKE_IVOR12, addr);
71  MTIVOR(BOOKE_IVOR13, addr);
72  MTIVOR(BOOKE_IVOR14, addr);
73  MTIVOR(BOOKE_IVOR15, addr);
74  MTIVOR(BOOKE_IVOR32, addr);
75  MTIVOR(BOOKE_IVOR33, addr);
76  MTIVOR(BOOKE_IVOR34, addr);
77  MTIVOR(BOOKE_IVOR35, addr);
78}
79
80void bsp_start(void)
81{
82  get_ppc_cpu_type();
83  get_ppc_cpu_revision();
84
85  rtems_counter_initialize_converter(bsp_time_base_frequency);
86
87  t32mppc_initialize_exceptions(bsp_section_work_begin);
88  bsp_interrupt_initialize();
89}
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