source: rtems/bsps/powerpc/ss555/start/vectors.S @ 90232bc

Last change on this file since 90232bc was 5249a4c, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 7, 2018 at 5:18:23 AM

powerpc: Fix ss555 build

The mpc555 define is provided via <bspopts.h>. It must not be used in
cpukit header files.

Update #3425.

  • Property mode set to 100644
File size: 5.3 KB
Line 
1/*
2 * vectors.S
3 *
4 *  This file contains the assembly code for the PowerPC exception veneers
5 *  for RTEMS.
6 *
7 *
8 *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
9 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
10 *
11 *  Derived from libbsp/powerpc/mbx8xx/vectors/vectors.S,
12 *
13 *  (c) 1999, Eric Valette valette@crf.canon.fr
14 */
15
16#include <rtems/asm.h>
17#include <rtems/score/cpu.h>
18#include <libcpu/vectors.h>
19#include <bsp.h>
20
21#define SYNC \
22        sync; \
23        isync
24
25
26/*
27 * Hardware exception vector table.
28 *
29 * The MPC555 can be configured to use a compressed vector table with 8
30 * bytes per entry, rather than the usual 0x100 bytes of other PowerPC
31 * devices.  The following macro uses this feature to save the better part
32 * of 8 kbytes of flash ROM.
33 *
34 * Each vector table entry has room for only a simple branch instruction
35 * which branches to a prologue specific to that exception.  This
36 * exception-specific prologue begins the context save, loads the exception
37 * number into a register, and jumps to a common exception prologue, below.
38 */
39
40        .macro  vectors num=0, total=NUM_EXCEPTIONS  /* create vector table */
41
42/* vector table entry */
43        .section .vectors, "ax"
44
45        ba      specific_prologue\@             /* run specific prologue */
46        .long   0                               /* each entry is 8 bytes */
47
48/* exception-specific prologue */
49        .text
50
51specific_prologue\@:
52        stwu    r1, -EXCEPTION_FRAME_END(r1)    /* open stack frame */
53        stw     r4, GPR4_OFFSET(r1)             /* preserve register */
54        li      r4, \num                        /* get exception number */
55        b       common_prologue                 /* run common prologue */
56
57/* invoke macro recursively to create remainder of table */
58        .if     \total - (\num + 1)
59        vectors "(\num + 1)", \total
60        .endif
61
62        .endm
63
64
65/* invoke macro to create entire vector table */
66        vectors
67
68
69/*
70 * Common exception prologue.
71 *
72 * Because the MPC555 vector table is in flash ROM, it's not possible to
73 * change the exception handlers by overwriting them at run-time, so this
74 * common exception prologue uses a table of exception handler pointers to
75 * provide equivalent flexibility.
76 *
77 * When the actual exception handler is run, R1 points to the base of a new
78 * exception stack frame, in which R3, R4 and LR have been saved.  R4 holds
79 * the exception number.
80 */
81        .text
82
83common_prologue:
84        stw     r3, GPR3_OFFSET(r1)             /* preserve registers */
85        mflr    r3
86        stw     r3, EXC_LR_OFFSET(r1)
87
88        slwi    r3, r4, 2                               /* make table offset */
89        addis   r3, r3, exception_handler_table@ha      /* point to entry */
90        addi    r3, r3, exception_handler_table@l
91        lwz     r3, 0(r3)                               /* get entry */
92        mtlr    r3                                      /* run it */
93        blr
94
95
96/*
97 * Default exception handler.
98 *
99 * The function initialize_exceptions() initializes all of the entries in
100 * the exception handler table with pointers to this routine, which saves
101 * the remainder of the interrupted code's state, then calls
102 * C_default_exception_handler() to dump registers.
103 *
104 * On entry, R1 points to a new exception stack frame in which R3, R4, and
105 * LR have been saved.  R4 holds the exception number.
106 */
107        .text
108
109PUBLIC_VAR(default_exception_handler)
110SYM (default_exception_handler):
111        /*
112         * Save the interrupted code's program counter and MSR.  Beyond this
113         * point, all exceptions are recoverable.  Use an RCPU-specific SPR
114         * to set the RI bit in the MSR to indicate the recoverable state.
115         */
116        mfsrr0  r3
117        stw     r3, SRR0_FRAME_OFFSET(r1)
118        mfsrr1  r3
119        stw     r3, SRR1_FRAME_OFFSET(r1)
120
121        mtspr   eid, r3                 /* set MSR[RI], clear MSR[EE] */
122        SYNC
123
124        /*
125         * Save the remainder of the general-purpose registers.
126         *
127         * Compute the value of R1 at exception entry before storing it in
128         * the frame.
129         *
130         * Note that R2 should never change (it's the EABI pointer to
131         * .sdata2), but we save it just in case.
132         *
133         * Recall that R3 and R4 were saved by the specific- and
134         * common-exception handlers before entry to this routine.
135         */
136        stw     r0, GPR0_OFFSET(r1)
137        addi    r0, r1, EXCEPTION_FRAME_END
138        stw     r0, GPR1_OFFSET(r1)
139        stw     r2, GPR2_OFFSET(r1)
140        stmw    r5, GPR5_OFFSET(r1)             /* save R5 to R31 */
141
142        /*
143         * Save the remainder of the UISA special-purpose registers.  Recall
144         * that LR was saved before entry.
145         */
146        mfcr    r0
147        stw     r0,  EXC_CR_OFFSET(r1)
148        mfctr   r0
149        stw     r0,  EXC_CTR_OFFSET(r1)
150        mfxer   r0
151        stw     r0,  EXC_XER_OFFSET(r1)
152
153        /*
154         * Call C-language portion of the default exception handler, passing
155         * in the address of the frame.
156         *
157         * To simplify things a bit, we assume that the target routine is
158         * within +/- 32 Mbyte from here, which is a reasonable assumption
159         * on the MPC555.
160         */
161        stw     r4, EXCEPTION_NUMBER_OFFSET(r1) /* save exception number */
162        addi    r3, r1, 0x8                     /* get frame address */
163        bl      C_default_exception_handler     /* call handler */
164
165        /*
166         * Restore UISA special-purpose registers.
167         */
168        lwz     r0,  EXC_XER_OFFSET(r1)
169        mtxer   r0
170        lwz     r0,  EXC_CTR_OFFSET(r1)
171        mtctr   r0
172        lwz     r0,  EXC_CR_OFFSET(r1)
173        mtcr    r0
174        lwz     r0,  EXC_LR_OFFSET(r1)
175        mtlr    r0
176
177        /*
178         * Restore most general-purpose registers.
179         */
180        lmw     r2, GPR2_OFFSET(r1)
181
182        /*
183         * Restore the interrupted code's program counter and MSR, but first
184         * use an RCPU-specific special-purpose register to clear the RI
185         * bit, indicating that exceptions are temporarily non-recoverable.
186         */
187        mtspr   nri, r0                 /* clear MSR[RI] */
188        SYNC
189
190        lwz     r0, SRR1_FRAME_OFFSET(r1)
191        mtsrr1  r0
192        lwz     r0, SRR0_FRAME_OFFSET(r1)
193        mtsrr0  r0
194
195        /*
196         * Restore the final GPR, close the stack frame, and return to the
197         * interrupted code.
198         */
199        lwz     r0, GPR0_OFFSET(r1)
200        addi    r1, r1, EXCEPTION_FRAME_END
201        SYNC
202        rfi
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