1 | /* |
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2 | * This file contains the entry veneer for RTEMS programs on the Intec |
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3 | * SS555 board. It jumps to the BSP which is responsible for performing |
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4 | * all remaining initialization. |
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5 | */ |
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6 | |
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7 | /* |
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8 | * This file is based on several others: |
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9 | * |
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10 | * (1) start360.s from the gen68360 BSP by |
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11 | * W. Eric Norum (eric@skatter.usask.ca) |
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12 | * with the following copyright and license: |
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13 | * |
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14 | * COPYRIGHT (c) 1989-1998. |
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15 | * On-Line Applications Research Corporation (OAR). |
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16 | * |
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17 | * The license and distribution terms for this file may in |
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18 | * the file LICENSE in this distribution or at |
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19 | * http://www.rtems.org/license/LICENSE. |
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20 | * |
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21 | * (2) start.s for the eth_comm port by |
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22 | * Jay Monkman (jmonkman@fracsa.com), |
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23 | * which itself is based on the |
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24 | * |
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25 | * (3) dlentry.s for the Papyrus BSP, written by: |
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26 | * Andrew Bray <andy@i-cubed.co.uk> |
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27 | * with the following copyright and license: |
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28 | * |
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29 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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30 | * |
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31 | * (4) start860.S for the MBX821/MBX860, written by: |
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32 | * Darlene A. Stewart <darlene.stewart@iit.nrc.ca> |
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33 | * Copyright (c) 1999, National Research Council of Canada |
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34 | * |
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35 | * To anyone who acknowledges that this file is provided "AS IS" |
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36 | * without any express or implied warranty: |
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37 | * permission to use, copy, modify, and distribute this file |
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38 | * for any purpose is hereby granted without fee, provided that |
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39 | * the above copyright notice and this notice appears in all |
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40 | * copies, and that the name of i-cubed limited not be used in |
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41 | * advertising or publicity pertaining to distribution of the |
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42 | * software without specific, written prior permission. |
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43 | * i-cubed limited makes no representations about the suitability |
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44 | * of this software for any purpose. |
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45 | * |
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46 | * (5) Modifications (for MBX8xx) of respective RTEMS files: |
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47 | * Copyright (c) 1999, National Research Council of Canada |
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48 | * |
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49 | * SS555 port sponsored by Defence Research and Development Canada - Suffield |
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50 | * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) |
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51 | */ |
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52 | |
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53 | #include <rtems/asm.h> |
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54 | #include <rtems/powerpc/registers.h> |
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55 | |
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56 | #include <bsp.h> |
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57 | |
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58 | /* |
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59 | * The initial stack is set to the top of the internal RAM. |
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60 | * |
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61 | * All the entry veneer has to do is to clear the .bss section and copy the |
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62 | * initializers into the .data section. |
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63 | */ |
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64 | |
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65 | /* |
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66 | * GDB likes to have debugging information for the entry veneer. |
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67 | * Play compiler and provide some DWARF information. |
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68 | * |
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69 | * CHANGE TO SUIT YOUR SETUP! |
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70 | */ |
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71 | |
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72 | .section .entry,"ax",@progbits |
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73 | .L_text_b: |
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74 | .L_LC1: |
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75 | .previous |
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76 | |
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77 | .section .debug_sfnames |
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78 | .L_sfnames_b: |
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79 | .byte "rtems/c/src/lib/libbsp/powerpc/ss555/startup/" |
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80 | .byte 0 |
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81 | .L_F0: |
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82 | .byte "start.S" |
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83 | .byte 0 |
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84 | .previous |
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85 | |
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86 | .section .line |
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87 | .L_line_b: |
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88 | .4byte .L_line_e-.L_line_b |
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89 | .4byte .L_text_b |
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90 | .L_LE1: |
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91 | .L_line_last: |
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92 | .4byte 0x0 |
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93 | .2byte 0xffff |
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94 | .4byte .L_text_e-.L_text_b |
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95 | .L_line_e: |
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96 | .previous |
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97 | |
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98 | .section .debug_srcinfo |
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99 | .L_srcinfo_b: |
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100 | .4byte .L_line_b |
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101 | .4byte .L_sfnames_b |
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102 | .4byte .L_text_b |
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103 | .4byte .L_text_e |
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104 | .4byte 0xffffffff |
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105 | .4byte .L_LE1-.L_line_b |
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106 | .4byte .L_F0-.L_sfnames_b |
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107 | .4byte .L_line_last-.L_line_b |
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108 | .4byte 0xffffffff |
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109 | .previous |
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110 | |
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111 | .section .debug_pubnames |
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112 | .4byte .L_debug_b |
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113 | .4byte .L_P0 |
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114 | .byte "start" |
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115 | .byte 0 |
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116 | .4byte 0x0 |
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117 | .byte 0 |
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118 | .previous |
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119 | |
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120 | .section .debug_aranges |
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121 | .4byte .L_debug_b |
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122 | .4byte .L_text_b |
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123 | .4byte .L_text_e-.L_text_b |
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124 | .4byte 0 |
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125 | .4byte 0 |
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126 | .4byte 0 |
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127 | .4byte 0 |
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128 | .4byte 0 |
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129 | .4byte 0 |
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130 | .4byte 0x0 |
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131 | .4byte 0x0 |
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132 | .previous |
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133 | |
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134 | .section .debug |
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135 | .L_debug_b: |
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136 | .L_D1: |
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137 | .4byte .L_D1_e-.L_D1 |
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138 | .2byte 0x11 /* TAG_compile_unit */ |
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139 | .2byte 0x12 /* AT_sibling */ |
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140 | .4byte .L_D2 |
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141 | .2byte 0x38 /* AT_name */ |
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142 | .byte "start.S" |
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143 | .byte 0 |
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144 | .2byte 0x258 /* AT_producer */ |
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145 | .byte "GAS 2.5.2" |
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146 | .byte 0 |
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147 | .2byte 0x111 /* AT_low_pc */ |
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148 | .4byte .L_text_b |
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149 | .2byte 0x121 /* AT_high_pc */ |
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150 | .4byte .L_text_e |
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151 | .2byte 0x106 /* AT_stmt_list */ |
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152 | .4byte .L_line_b |
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153 | .2byte 0x1b8 /* AT_comp_dir */ |
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154 | .byte "rtems/c/src/lib/libbsp/powerpc/ss555/startup/" |
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155 | .byte 0 |
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156 | .2byte 0x8006 /* AT_sf_names */ |
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157 | .4byte .L_sfnames_b |
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158 | .2byte 0x8016 /* AT_src_info */ |
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159 | .4byte .L_srcinfo_b |
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160 | .L_D1_e: |
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161 | .L_P0: |
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162 | .L_D3: |
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163 | .4byte .L_D3_e-.L_D3 |
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164 | .2byte 0x6 /* TAG_global_subroutine */ |
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165 | .2byte 0x12 /* AT_sibling */ |
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166 | .4byte .L_D4 |
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167 | .2byte 0x38 /* AT_name */ |
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168 | .byte "start" |
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169 | .byte 0 |
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170 | .2byte 0x278 /* AT_prototyped */ |
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171 | .byte 0 |
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172 | .2byte 0x111 /* AT_low_pc */ |
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173 | .4byte .L_text_b |
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174 | .2byte 0x121 /* AT_high_pc */ |
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175 | .4byte .L_text_e |
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176 | .2byte 0x8041 /* AT_body_begin */ |
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177 | .4byte .L_text_b |
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178 | .2byte 0x8051 /* AT_body_end */ |
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179 | .4byte .L_text_e |
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180 | .L_D3_e: |
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181 | |
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182 | .L_D4: |
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183 | .4byte .L_D4_e-.L_D4 |
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184 | .align 2 |
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185 | .L_D4_e: |
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186 | .L_D2: |
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187 | .previous |
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188 | |
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189 | /* |
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190 | * Tell C's eabi-ctor's that we have an atexit function, |
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191 | * and that it is to register __do_global_dtors. |
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192 | */ |
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193 | EXTERN_PROC(atexit) |
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194 | PUBLIC_VAR(__atexit) |
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195 | .section ".sdata","aw" |
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196 | .align 2 |
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197 | SYM(__atexit): |
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198 | EXT_PROC_REF(atexit)@fixup |
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199 | .previous |
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200 | |
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201 | .section ".fixup","aw" |
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202 | .align 2 |
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203 | EXT_SYM_REF(__atexit) |
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204 | .previous |
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205 | |
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206 | /* That should do it */ |
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207 | |
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208 | /* |
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209 | * Put the entry point in its own section. That way, we can guarantee |
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210 | * to put it first in the .text section in the linker script. |
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211 | */ |
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212 | .section .entry |
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213 | |
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214 | PUBLIC_VAR (start) |
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215 | SYM(start): |
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216 | bl .startup /* or bl .spin */ |
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217 | base_addr: |
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218 | |
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219 | /* |
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220 | * Parameters from linker |
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221 | */ |
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222 | stack_top: |
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223 | .long _ISR_Stack_area_end |
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224 | |
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225 | toc_pointer: |
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226 | .long __GOT_START__ |
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227 | |
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228 | bss_length: |
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229 | .long bss.size |
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230 | bss_addr: |
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231 | .long bss.start |
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232 | |
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233 | data_length: |
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234 | .long data.size |
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235 | data_addr: |
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236 | .long data.start |
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237 | contents_addr: |
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238 | .long data.contents.start |
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239 | |
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240 | PUBLIC_VAR (text_addr) |
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241 | text_addr: |
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242 | .long text.start |
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243 | |
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244 | PUBLIC_VAR (text_length) |
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245 | text_length: |
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246 | .long text.size |
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247 | |
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248 | /* |
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249 | * Spin, if necessary, to acquire control from debugger (CodeWarrior). |
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250 | */ |
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251 | spin: |
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252 | .long 0x0001 |
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253 | .spin: |
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254 | lis r3, spin@ha |
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255 | lwz r3, spin@l(r3) |
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256 | cmpwi r3, 0x1 |
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257 | beq .spin |
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258 | |
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259 | /* |
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260 | * Initialization code |
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261 | */ |
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262 | .startup: |
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263 | /* Capture address of linker parameters. */ |
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264 | mflr r3 |
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265 | |
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266 | /* Set initial stack pointer to end of internal RAM - 56. */ |
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267 | lwz r1, stack_top-base_addr(r3) |
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268 | addi r1, r1, -56 |
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269 | |
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270 | /* Initialize essential registers. */ |
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271 | bl initregs |
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272 | |
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273 | /* Set TOC pointer */ |
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274 | lwz r2, toc_pointer-base_addr(r3) |
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275 | |
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276 | /* Initialize the memory mapped MPC555 registers (done in C). */ |
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277 | EXTERN_PROC (_InitSS555) |
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278 | bl PROC (_InitSS555) |
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279 | |
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280 | /* Clear the .bss section. */ |
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281 | bl bssclr |
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282 | |
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283 | /* Copy initializers into the .data section */ |
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284 | bl datacopy |
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285 | |
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286 | /* Enable floating point, since gcc sometimes uses the floating |
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287 | * point registers for data moves, even if the C source code doesn't |
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288 | * include floating point operations. |
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289 | */ |
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290 | mfmsr r0 |
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291 | ori r0, r0, MSR_FP |
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292 | mtmsr r0 |
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293 | |
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294 | /* Start system. */ |
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295 | li r3, 0 /* command line */ |
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296 | EXTERN_PROC (boot_card) |
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297 | bl PROC (boot_card) /* call the first C routine */ |
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298 | |
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299 | /* We should never return from boot_card, but in case we do ... */ |
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300 | /* The next instructions are dependent on your runtime environment. */ |
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301 | |
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302 | stop_here: |
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303 | b stop_here |
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304 | |
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305 | /* |
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306 | * datacopy - copy initializers into .data section |
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307 | */ |
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308 | datacopy: |
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309 | lis r3, base_addr@ha /* point to linker data */ |
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310 | addi r3, r3, base_addr@l |
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311 | |
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312 | lwz r4, contents_addr-base_addr(r3) /* .data contents in ROM */ |
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313 | lwz r5, data_addr-base_addr(r3) /* .data section in RAM */ |
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314 | lwz r6, data_length-base_addr(r3) /* length of .data */ |
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315 | |
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316 | rlwinm. r6, r6, 30, 0x3FFFFFFF /* form length / 4 */ |
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317 | beqlr /* no .data - return */ |
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318 | |
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319 | mtctr r6 /* set ctr reg */ |
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320 | dc1: |
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321 | lwz r6, 0(r4) /* get word */ |
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322 | stw r6, 0(r5) /* store word */ |
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323 | addi r4, r4, 0x4 /* next source */ |
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324 | addi r5, r5, 0x4 /* next target */ |
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325 | bdnz dc1 /* dec counter and loop */ |
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326 | |
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327 | blr /* return */ |
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328 | |
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329 | /* |
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330 | * bssclr - zero out bss |
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331 | */ |
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332 | bssclr: |
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333 | lis r3, base_addr@ha /* point to linker data */ |
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334 | addi r3, r3, base_addr@l |
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335 | |
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336 | lwz r4, bss_addr-base_addr(r3) /* Start of bss */ |
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337 | lwz r5, bss_length-base_addr(r3) /* Length of bss */ |
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338 | |
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339 | rlwinm. r5, r5, 30, 0x3FFFFFFF /* form length/4 */ |
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340 | beqlr /* no bss - return */ |
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341 | |
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342 | mtctr r5 /* set ctr reg */ |
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343 | li r5, 0x0000 /* r5 = 0 */ |
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344 | clear_bss: |
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345 | stw r5, 0(r4) /* store r6 */ |
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346 | addi r4, r4, 0x4 /* update r4 */ |
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347 | bdnz clear_bss /* dec counter and loop */ |
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348 | |
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349 | blr /* return */ |
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350 | |
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351 | /* |
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352 | * initregs |
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353 | * Initialize the MSR and basic core PowerPC registers |
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354 | * |
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355 | * Register usage: |
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356 | * r0 - scratch |
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357 | */ |
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358 | initregs: |
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359 | /* |
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360 | * Set the processor for big-endian mode, exceptions vectored to |
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361 | * 0x000n_nnnn, no execution tracing, machine check exceptions |
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362 | * enabled, floating-point not available, supervisor priviledge |
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363 | * level, external interrupts disabled, power management disabled |
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364 | * (normal operation mode). |
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365 | */ |
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366 | li r0, 0x1000 /* MSR_ME */ |
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367 | mtmsr r0 /* Context-synchronizing */ |
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368 | isync |
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369 | |
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370 | /* |
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371 | * Clear the exception handling registers. |
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372 | */ |
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373 | li r0, 0x0000 |
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374 | mtdar r0 |
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375 | mtspr sprg0, r0 |
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376 | mtspr sprg1, r0 |
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377 | mtspr sprg2, r0 |
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378 | mtspr sprg3, r0 |
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379 | mtspr srr0, r0 |
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380 | mtspr srr1, r0 |
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381 | |
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382 | mr r6, r0 |
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383 | mr r7, r0 |
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384 | mr r8, r0 |
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385 | mr r9, r0 |
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386 | mr r10, r0 |
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387 | mr r11, r0 |
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388 | mr r12, r0 |
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389 | mr r13, r0 |
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390 | mr r14, r0 |
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391 | mr r15, r0 |
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392 | mr r16, r0 |
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393 | mr r17, r0 |
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394 | mr r18, r0 |
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395 | mr r19, r0 |
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396 | mr r20, r0 |
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397 | mr r21, r0 |
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398 | mr r22, r0 |
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399 | mr r23, r0 |
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400 | mr r24, r0 |
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401 | mr r25, r0 |
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402 | mr r26, r0 |
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403 | mr r27, r0 |
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404 | mr r28, r0 |
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405 | mr r29, r0 |
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406 | mr r30, r0 |
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407 | mr r31, r0 |
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408 | |
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409 | blr /* return */ |
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410 | |
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411 | .L_text_e: |
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