source: rtems/bsps/powerpc/ss555/start/irq_init.c @ 99de42c

Last change on this file since 99de42c was 99de42c, checked in by Marçal Comajoan Cara <mcomajoancara@…>, on Dec 4, 2018 at 10:05:10 PM

Capitalize Rtems to RTEMS

  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 * irq_init.c
3 *
4 *  This file contains the implementation of rtems initialization
5 *  related to interrupt handling.
6 */
7
8/*
9 *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
10 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
11 *
12 *  Derived from libbsp/powerpc/mbx8xx/irq/irq_init.c:
13 *
14 *  CopyRight (C) 2001 valette@crf.canon.fr
15 *
16 *  The license and distribution terms for this file may be
17 *  found in the file LICENSE in this distribution or at
18 *  http://www.rtems.org/license/LICENSE.
19 */
20
21#include <rtems.h>
22#include <mpc5xx.h>
23#include <libcpu/vectors.h>
24#include <libcpu/raw_exception.h>
25#include <bsp/irq.h>
26
27extern rtems_exception_handler_t dispatch_irq_handler;
28
29volatile unsigned int ppc_cached_irq_mask;
30
31/*
32 * default methods
33 */
34static void nop_hdl(rtems_irq_hdl_param ignored)
35{
36}
37
38static void nop_irq_enable(const struct __rtems_irq_connect_data__*ignored)
39{
40}
41
42static void nop_raw_enable(
43  const struct __rtems_raw_except_connect_data__*ignored
44)
45{
46}
47
48static int irq_is_connected(const struct __rtems_irq_connect_data__*ignored)
49{
50  return 0;
51}
52
53static int raw_is_connected(const struct __rtems_raw_except_connect_data__*ignored)
54{
55  return 0;
56}
57
58static rtems_irq_connect_data     rtemsIrq[CPU_IRQ_COUNT];
59static rtems_irq_global_settings  initial_config;
60static rtems_irq_connect_data     defaultIrq = {
61  0,                /* vector */
62  nop_hdl,          /* hdl */
63  NULL,             /* handle */
64  nop_irq_enable,   /* on */
65  nop_irq_enable,   /* off */
66  irq_is_connected  /* isOn */
67};
68
69static rtems_irq_prio irqPrioTable[CPU_IRQ_COUNT]={
70  /*
71   * actual priorities for interrupt :
72   *   0   means that only current interrupt is masked
73   *   255 means all other interrupts are masked
74   */
75  /*
76   * USIU interrupts.
77   */
78  7,7, 6,6, 5,5, 4,4, 3,3, 2,2, 1,1, 0,0,
79  /*
80   * UIMB Interrupts
81   *
82   * Note that the first 8 UIMB interrupts overlap the 8 external USIU
83   * interrupts.
84   */
85                          0, 0, 0, 0, 0, 0, 0, 0,
86  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
87  /*
88   * Processor exceptions handled as interrupts
89   */
90  0
91};
92
93static void CPU_USIU_irq_init(void)
94{
95  /*
96   * In theory we should initialize two registers at least : SIMASK and
97   * SIEL. SIMASK is reset at 0 value meaning no interrupts.  If someone
98   * find a reasonnable value for SIEL, and the need to change it, please
99   * feel free to add it here.
100   */
101  ppc_cached_irq_mask = 0;
102  usiu.simask = ppc_cached_irq_mask;
103  usiu.sipend = 0xffff0000;
104  usiu.siel = usiu.siel;
105}
106
107/*
108 * Initialize UIMB interrupt management
109 */
110static void CPU_UIMB_irq_init(void)
111{
112}
113
114void CPU_rtems_irq_mng_init(unsigned cpuId)
115{
116  rtems_raw_except_connect_data vectorDesc;
117  int i;
118
119  CPU_USIU_irq_init();
120  CPU_UIMB_irq_init();
121  /*
122   * Initialize RTEMS management interrupt table
123   */
124    /*
125     * re-init the rtemsIrq table
126     */
127    for (i = 0; i < CPU_IRQ_COUNT; i++) {
128      rtemsIrq[i]      = defaultIrq;
129      rtemsIrq[i].name = i;
130    }
131    /*
132     * Init initial Interrupt management config
133     */
134    initial_config.irqNb        = CPU_IRQ_COUNT;
135    initial_config.defaultEntry = defaultIrq;
136    initial_config.irqHdlTbl    = rtemsIrq;
137    initial_config.irqBase      = CPU_ASM_IRQ_VECTOR_BASE;
138    initial_config.irqPrioTbl   = irqPrioTable;
139
140    if (!CPU_rtems_irq_mngt_set(&initial_config)) {
141      /*
142       * put something here that will show the failure...
143       */
144      rtems_panic("Unable to initialize RTEMS interrupt Management\n");
145    }
146
147  /*
148   * We must connect the raw irq handler for the two
149   * expected interrupt sources : decrementer and external interrupts.
150   */
151    vectorDesc.exceptIndex = ASM_DEC_VECTOR;
152    vectorDesc.hdl.vector  = ASM_DEC_VECTOR;
153    vectorDesc.hdl.raw_hdl = dispatch_irq_handler;
154    vectorDesc.on          = nop_raw_enable;
155    vectorDesc.off         = nop_raw_enable;
156    vectorDesc.isOn        = raw_is_connected;
157    if (!mpc5xx_set_exception (&vectorDesc)) {
158      rtems_panic("Unable to initialize RTEMS decrementer raw exception\n");
159    }
160    vectorDesc.exceptIndex = ASM_EXT_VECTOR;
161    vectorDesc.hdl.vector  = ASM_EXT_VECTOR;
162    if (!mpc5xx_set_exception (&vectorDesc)) {
163      rtems_panic("Unable to initialize RTEMS external raw exception\n");
164    }
165}
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