[5eb04f4d] | 1 | /* |
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| 2 | * This routine does the bulk of the system initialization. |
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| 3 | */ |
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| 4 | |
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| 5 | /* |
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[07e9642c] | 6 | * COPYRIGHT (c) 1989-2007. |
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[a800d09c] | 7 | * On-Line Applications Research Corporation (OAR). |
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| 8 | * |
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| 9 | * The license and distribution terms for this file may be |
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| 10 | * found in the file LICENSE in this distribution or at |
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[c499856] | 11 | * http://www.rtems.org/license/LICENSE. |
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[a800d09c] | 12 | * |
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| 13 | * SS555 port sponsored by Defence Research and Development Canada - Suffield |
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| 14 | * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) |
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| 15 | * |
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| 16 | * Derived from c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c: |
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| 17 | * |
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| 18 | * Modifications for MBX860: |
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| 19 | * Copyright (c) 1999, National Research Council of Canada |
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| 20 | */ |
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| 21 | |
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| 22 | #include <rtems/bspIo.h> |
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[24bf11e] | 23 | #include <rtems/counter.h> |
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[5eb04f4d] | 24 | #include <bsp/bootcard.h> |
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[1899fe4] | 25 | #include <rtems/powerpc/powerpc.h> |
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[a800d09c] | 26 | |
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| 27 | #include <libcpu/cpuIdent.h> |
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| 28 | #include <libcpu/spr.h> |
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| 29 | |
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| 30 | #include <bsp/irq.h> |
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| 31 | #include <bsp.h> |
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| 32 | |
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| 33 | SPR_RW(SPRG1) |
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| 34 | |
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| 35 | extern unsigned long intrStackPtr; |
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| 36 | |
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[07e9642c] | 37 | /* |
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| 38 | * Driver configuration parameters |
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| 39 | */ |
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| 40 | uint32_t bsp_clicks_per_usec; |
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| 41 | uint32_t bsp_clock_speed; /* Serial clocks per second */ |
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| 42 | |
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[a800d09c] | 43 | /* |
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| 44 | * bsp_start() |
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| 45 | * |
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| 46 | * Board-specific initialization code. Called from the generic boot_card() |
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| 47 | * function defined in rtems/c/src/lib/libbsp/shared/main.c. That function |
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| 48 | * does some of the board independent initialization. It is called from the |
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| 49 | * SS555 entry point _start() defined in |
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[c6af4585] | 50 | * rtems/c/src/lib/libbsp/powerpc/ss555/start/start.S |
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[a800d09c] | 51 | * |
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| 52 | * _start() has set up a stack, has zeroed the .bss section, has set up the |
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| 53 | * .data section from contents stored in ROM, has turned off interrupts, |
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| 54 | * and placed the processor in the supervisor mode. boot_card() has left |
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| 55 | * the processor in that state when bsp_start() was called. |
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| 56 | * |
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| 57 | * Input parameters: NONE |
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| 58 | * |
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| 59 | * Output parameters: NONE |
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| 60 | * |
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| 61 | * Return values: NONE |
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| 62 | */ |
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| 63 | void bsp_start(void) |
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| 64 | { |
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| 65 | register unsigned char* intrStack; |
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[6128a4a] | 66 | |
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[a800d09c] | 67 | /* |
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| 68 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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| 69 | * function stores the result in global variables so that it can be used |
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| 70 | * later. |
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| 71 | */ |
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[27474fb] | 72 | get_ppc_cpu_type(); |
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| 73 | get_ppc_cpu_revision(); |
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[a800d09c] | 74 | |
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| 75 | /* |
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| 76 | * Initialize some SPRG registers related to irq handling |
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| 77 | */ |
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[1899fe4] | 78 | intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); |
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[a800d09c] | 79 | _write_SPRG1((unsigned int)intrStack); |
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| 80 | |
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| 81 | /* |
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| 82 | * Install our own set of exception vectors |
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| 83 | */ |
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| 84 | initialize_exceptions(); |
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| 85 | |
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| 86 | /* |
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[cafa2c5] | 87 | * initialize the device driver parameters |
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[a800d09c] | 88 | */ |
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[07e9642c] | 89 | bsp_clicks_per_usec = BSP_CRYSTAL_HZ / 4 / 1000000; |
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| 90 | bsp_clock_speed = BSP_CLOCK_HZ; /* for SCI baud rate generator */ |
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[24bf11e] | 91 | rtems_counter_initialize_converter(BSP_CRYSTAL_HZ / 4); |
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[a800d09c] | 92 | |
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| 93 | /* |
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| 94 | * Initalize RTEMS IRQ system |
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| 95 | */ |
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| 96 | BSP_rtems_irq_mng_init(0); |
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| 97 | } |
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