1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup RTEMSBSPsPowerPCSS555 |
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5 | * |
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6 | * @brief Global BSP definitions. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * This file includes definitions for the Intec SS555. |
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11 | */ |
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12 | |
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13 | /* |
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14 | * SS555 port sponsored by Defence Research and Development Canada - Suffield |
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15 | * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) |
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16 | * |
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17 | * Derived from c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h: |
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18 | * |
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19 | * COPYRIGHT (c) 1989-1998. |
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20 | * On-Line Applications Research Corporation (OAR). |
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21 | * |
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22 | * The license and distribution terms for this file may be |
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23 | * found in the file LICENSE in this distribution or at |
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24 | * http://www.rtems.org/license/LICENSE. |
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25 | */ |
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26 | |
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27 | #ifndef LIBBSP_POWERPC_SS555_BSP_H |
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28 | #define LIBBSP_POWERPC_SS555_BSP_H |
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29 | |
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30 | /** |
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31 | * @defgroup RTEMSBSPsPowerPCSS555 SS555 |
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32 | * |
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33 | * @ingroup RTEMSBSPsPowerPC |
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34 | * |
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35 | * @brief SS555 Board Support Package. |
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36 | * |
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37 | * @{ |
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38 | */ |
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39 | |
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40 | #include <bspopts.h> |
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41 | |
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42 | #ifdef ASM |
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43 | |
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44 | #define eie 0x050 /* External Interrupt Enable Register */ |
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45 | #define eid 0x051 /* External Interrupt Disable Register */ |
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46 | #define nri 0x052 /* Non-Recoverable Interrupt Register */ |
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47 | |
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48 | #else /* !ASM */ |
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49 | |
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50 | #include <bsp/default-initial-extension.h> |
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51 | |
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52 | #include <rtems.h> |
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53 | #include <mpc5xx.h> |
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54 | #include <mpc5xx/console.h> |
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55 | #include <libcpu/vectors.h> |
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56 | #include <bsp/irq.h> |
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57 | |
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58 | #ifdef __cplusplus |
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59 | extern "C" { |
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60 | #endif |
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61 | |
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62 | /* |
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63 | * Clock definitions |
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64 | */ |
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65 | |
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66 | #define BSP_CRYSTAL_HZ 4000000 /* crystal frequency, Hz */ |
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67 | #define BSP_CLOCK_HZ 40000000 /* CPU clock frequency, Hz */ |
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68 | |
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69 | /* |
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70 | * I/O definitions |
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71 | * |
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72 | * The SS555 board includes a CPLD to control on-board features and |
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73 | * off-board devices. |
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74 | */ |
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75 | typedef struct cpld_ { |
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76 | uint8_t cs3a[32]; /* Chip select 3A */ |
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77 | uint8_t pad0[0x200000 - 0x000020]; |
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78 | |
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79 | uint8_t cs3b[32]; /* Chip select 3B */ |
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80 | uint8_t pad2[0x400000 - 0x200020]; |
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81 | |
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82 | uint8_t cs3c[32]; /* Chip select 3C */ |
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83 | uint8_t pad4[0x600000 - 0x400020]; |
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84 | |
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85 | uint8_t cs3d[32]; /* Chip select 3D */ |
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86 | uint8_t pad6[0x800000 - 0x600020]; |
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87 | |
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88 | uint8_t serial_ints; /* Enable/disable serial interrupts */ |
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89 | uint8_t serial_resets; /* Enable/disable serial resets */ |
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90 | uint8_t serial_ack; /* Acknowledge serial transfers */ |
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91 | uint8_t pad8[0xA00000 - 0x800003]; |
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92 | |
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93 | uint8_t iflash_writess; /* Enable/disable internal-flash writes */ |
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94 | uint8_t nflash_writess; /* Enable/disable NAND-flash writes */ |
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95 | uint8_t padA[0xC00000 - 0xA00002]; |
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96 | } cpld_t; |
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97 | |
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98 | extern volatile cpld_t cpld; /* defined in linkcmds */ |
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99 | |
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100 | /* clock/p_clock.c */ |
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101 | extern int BSP_disconnect_clock_handler (void); |
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102 | |
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103 | extern int BSP_connect_clock_handler (rtems_irq_hdl hdl); |
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104 | |
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105 | /* |
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106 | * Prototypes for methods called from .S to support dependency tracking. |
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107 | */ |
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108 | void _InitSS555(void); |
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109 | |
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110 | #ifdef __cplusplus |
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111 | } |
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112 | #endif |
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113 | |
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114 | #endif /* !ASM */ |
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115 | |
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116 | /** @} */ |
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117 | |
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118 | #endif |
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