source: rtems/bsps/powerpc/shared/start/start.S @ 9e48958

5
Last change on this file since 9e48958 was 9e48958, checked in by Sebastian Huber <sebastian.huber@…>, on 03/15/19 at 06:32:28

bsps/powerpc: Initialize stack earlier

The eabi() call may use the stack.

Update #3459.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1/*
2 *  start.S :     RTEMS entry point
3 *
4 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.org/license/LICENSE.
9 *
10 */
11
12#include <rtems/asm.h>
13#include <libcpu/powerpc-utility.h>
14
15#include <libcpu/io.h>
16#include <libcpu/bat.h>
17#include <bspopts.h>
18
19#define SYNC \
20        sync; \
21        isync
22
23#define KERNELBASE      0x0
24
25#define MONITOR_ENTER                   \
26        mfmsr   r10             ;       \
27        ori     r10,r10,MSR_IP  ;       \
28        mtmsr   r10             ;       \
29        li      r10,0x63        ;       \
30        sc
31
32        .text
33        .globl  __rtems_entry_point
34        .type   __rtems_entry_point,@function
35__rtems_entry_point:
36#ifdef DEBUG_EARLY_START
37        MONITOR_ENTER
38#endif
39
40/*
41 * PREP
42 * This is jumped to on prep systems right after the kernel is relocated
43 * to its proper place in memory by the boot loader.  The expected layout
44 * of the regs is:
45 *   r3: ptr to residual data
46 *   r4: initrd_start or if no initrd then 0
47 *   r5: initrd_end - unused if r4 is 0
48 *   r6: Start of command line string
49 *   r7: End of command line string
50 *
51 *   The Prep boot loader insure that the MMU is currently off...
52 *
53 */
54
55        mr      r31,r3                  /* save parameters */
56        mr      r30,r4
57        mr      r29,r5
58        mr      r28,r6
59        mr      r27,r7
60
61#ifdef __ALTIVEC__
62        /* enable altivec; gcc may use it! */
63        mfmsr r0
64        oris  r0, r0, (1<<(31-16-6))
65        mtmsr r0
66        isync
67        /*
68         * set vscr and vrsave to known values
69         */
70        li    r0, 0
71        mtvrsave r0
72        vxor   0,0,0
73        mtvscr 0
74#endif
75
76        /*
77         * Make sure we have nothing in BATS and TLB
78         */
79        bl      CPU_clear_bats_early
80        bl      flush_tlbs
81/*
82 * Use the first pair of BAT registers to map the 1st 256MB
83 * of RAM to KERNELBASE.
84 */
85        lis     r11,KERNELBASE@h
86/* set up BAT registers for 604 */
87        ori     r11,r11,0x1ffe
88        li      r8,2                    /* R/W access */
89        isync
90        mtspr   DBAT0L,r8               /* N.B. 6xx (not 601) have valid */
91        mtspr   DBAT0U,r11              /* bit in upper BAT register */
92        mtspr   IBAT0L,r8
93        mtspr   IBAT0U,r11
94        isync
95/*   Map section where residual is located if outside
96 *   the first 256Mb of RAM.  This is to support cases
97 *   where the available system memory is larger than
98 *   256Mb of RAM.
99 */
100        mr      r9, r1 /* Get where residual was mapped */
101        lis r12,0xf0000000@h
102        and     r9,r9,r12
103        cmpi    0,1,r9, 0
104        beq     enter_C_code
105        isync
106        ori r11,r9,0x1ffe
107        mtspr   DBAT1L,r8               /* N.B. 6xx (not 601) have valid */
108        mtspr   DBAT1U,r11              /* bit in upper BAT register */
109        mtspr   IBAT1L,r8
110        mtspr   IBAT1U,r11
111        isync
112
113/*
114 * we now have the 1st 256M of ram mapped with the bats. We are still
115 * running on the bootloader stack and cannot switch to an RTEMS allocated
116 * init stack before copying the residual data that may have been set just after
117 * rtems_end address. This bug has been experienced on MVME2304. Thank to
118 * Till Straumann <strauman@SLAC.Stanford.EDU> for hunting it and suggesting
119 * the appropriate code.
120 */
121
122enter_C_code:
123        /*
124         * Initialize start stack.  The stacks are statically allocated and
125         * properly aligned.
126         */
127        LA      r1, _ISR_Stack_area_end
128        subi    r1, r1, PPC_DEFAULT_CACHE_LINE_SIZE
129        li      r0, 0
130        stw     r0, 0(r1)
131
132        bl      MMUon
133        bl      __eabi  /* setup EABI and SYSV environment */
134        bl      zero_bss
135        /*
136         * restore prep boot params
137         */
138        mr      r3,r31
139        mr      r4,r30
140        mr      r5,r29
141        mr      r6,r28
142        mr      r7,r27
143        bl      save_boot_params
144
145        /*
146         * We are now in a environment that is totally independent from
147         * bootloader setup.
148         */
149    /* pass result of 'save_boot_params' to 'boot_card' in R3 */
150        bl      boot_card
151        bl      _return_to_ppcbug
152
153        .globl  MMUon
154        .type   MMUon,@function
155MMUon:
156        mfmsr   r0
157        ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
158#if (PPC_HAS_FPU == 0)
159        xori    r0, r0, MSR_EE | MSR_IP | MSR_FP
160#else
161        xori    r0, r0, MSR_EE | MSR_IP | MSR_FE0 | MSR_FE1
162#endif
163        mflr    r11
164        mtsrr0  r11
165        mtsrr1  r0
166        SYNC
167        rfi
168
169        .globl  MMUoff
170        .type   MMUoff,@function
171MMUoff:
172        mfmsr   r0
173        ori     r0,r0,MSR_IR| MSR_DR | MSR_IP
174        mflr    r11
175        xori    r0,r0,MSR_IR|MSR_DR
176        mtsrr0  r11
177        mtsrr1  r0
178        SYNC
179        rfi
180
181        .globl  _return_to_ppcbug
182        .type   _return_to_ppcbug,@function
183
184_return_to_ppcbug:
185        mflr    r30
186        bl      MMUoff
187        MONITOR_ENTER
188        bl      MMUon
189        mtctr   r30
190        bctr
191
192flush_tlbs:
193        lis     r20, 0x1000
1941:      addic.  r20, r20, -0x1000
195        tlbie   r20
196        bgt     1b
197        sync
198        blr
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