source: rtems/bsps/powerpc/shared/clock/clock-ppc403.c @ bb99cd0d

5
Last change on this file since bb99cd0d was bb99cd0d, checked in by Sebastian Huber <sebastian.huber@…>, on Dec 5, 2019 at 6:22:33 PM

clock: Simplify driver initialization

Use a system initialization handler instead of a legacy IO driver.

Update #3834.

  • Property mode set to 100644
File size: 7.7 KB
Line 
1/**
2 *  @file
3 *
4 *  This routine initializes the interval timer on the
5 *  PowerPC 403 CPU.  The tick frequency is specified by the BSP.
6 */
7
8/*
9 *  Original PPC403 Code from:
10 *  Author: Andrew Bray <andy@i-cubed.co.uk>
11 *  COPYRIGHT (c) 1995 by i-cubed ltd.
12 *
13 *  Modifications for PPC405GP by Dennis Ehlin
14 *
15 *  To anyone who acknowledges that this file is provided "AS IS"
16 *  without any express or implied warranty:
17 *      permission to use, copy, modify, and distribute this file
18 *      for any purpose is hereby granted without fee, provided that
19 *      the above copyright notice and this notice appears in all
20 *      copies, and that the name of i-cubed limited not be used in
21 *      advertising or publicity pertaining to distribution of the
22 *      software without specific, written prior permission.
23 *      i-cubed limited makes no representations about the suitability
24 *      of this software for any purpose.
25 *
26 *  Modifications for deriving timer clock from cpu system clock by
27 *              Thomas Doerfler <td@imd.m.isar.de>
28 *  for these modifications:
29 *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
30 *
31 *  COPYRIGHT (c) 1989-2012.
32 *  On-Line Applications Research Corporation (OAR).
33 *
34 *  The license and distribution terms for this file may be
35 *  found in the file LICENSE in this distribution or at
36 *  http://www.rtems.org/license/LICENSE.
37 */
38
39#include <rtems.h>
40#include <rtems/clockdrv.h>
41#include <rtems/libio.h>
42#include <stdlib.h>                     /* for atexit() */
43#include <rtems/bspIo.h>
44#include <rtems/powerpc/powerpc.h>
45
46/*
47 * check, which exception handling code is present
48 */
49
50#include <bsp.h>
51
52#include <bsp/vectors.h>
53#include <bsp/irq.h>
54
55extern uint32_t   bsp_clicks_per_usec;
56
57volatile uint32_t Clock_driver_ticks;
58static uint32_t   pit_value, tick_time;
59static bool       auto_restart;
60
61static void Clock_exit( void );
62
63static inline uint32_t get_itimer(void)
64{
65  register uint32_t rc;
66
67#ifndef ppc405 /* this is a ppc403 */
68  __asm__ volatile ("mfspr %0, 0x3dd" : "=r" ((rc))); /* TBLO */
69#else /* ppc405 */
70  __asm__ volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
71#endif /* ppc405 */
72
73  return rc;
74}
75
76/*
77 *  ISR Handler
78 */
79static void Clock_isr(void* handle)
80{
81  uint32_t clicks_til_next_interrupt;
82#if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL)
83  uint32_t l_orig = _ISR_Get_level();
84#endif
85
86  if (!auto_restart) {
87    uint32_t itimer_value;
88    /*
89     * setup for next interrupt; making sure the new value is reasonably
90     * in the future.... in case we lost out on an interrupt somehow
91     */
92    itimer_value = get_itimer();
93    tick_time += pit_value;
94
95    /*
96     * how far away is next interrupt *really*
97     * It may be a long time; this subtraction works even if
98     * Clock_clicks_interrupt < Clock_clicks_low_order via
99     * the miracle of unsigned math.
100     */
101    clicks_til_next_interrupt = tick_time - itimer_value;
102
103    /*
104     * If it is too soon then bump it up.
105     * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
106     * But setting it low is useful for debug, so...
107     */
108    if (clicks_til_next_interrupt < 400) {
109      tick_time = itimer_value + 1000;
110      clicks_til_next_interrupt = 1000;
111      /* XXX: count these! this should be rare */
112    }
113
114    /*
115     * If it is too late, that means we missed the interrupt somehow.
116     * Rather than wait 35-50s for a wrap, we just fudge it here.
117     */
118    if (clicks_til_next_interrupt > pit_value) {
119      tick_time = itimer_value + 1000;
120      clicks_til_next_interrupt = 1000;
121      /* XXX: count these! this should never happen :-) */
122    }
123
124    __asm__ volatile ("mtspr 0x3db, %0" :: "r"
125                      (clicks_til_next_interrupt));                  /* PIT */
126  }
127
128  __asm__ volatile ("mtspr 0x3d8, %0" :: "r" (0x08000000));          /* TSR */
129
130  Clock_driver_ticks++;
131
132  /* Give BSP a chance to say if they want to re-enable interrupts */
133#if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL)
134  _ISR_Set_level(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL);
135#endif
136  rtems_clock_tick();
137
138#if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL)
139  _ISR_Set_level(l_orig)
140#endif
141}
142
143static int ClockIsOn(const rtems_irq_connect_data* unused)
144{
145  register uint32_t tcr;
146
147  __asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr)));               /* TCR */
148
149  return (tcr & 0x04000000) != 0;
150}
151
152static void ClockOff(const rtems_irq_connect_data* unused)
153{
154  register uint32_t tcr;
155
156  __asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr)));               /* TCR */
157  tcr &= ~ 0x04400000;
158  __asm__ volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
159}
160
161static void ClockOn(const rtems_irq_connect_data* unused)
162{
163  uint32_t          iocr;
164  register uint32_t tcr;
165#ifndef ppc405
166  uint32_t          pvr;
167#endif /* ppc403 */
168
169  Clock_driver_ticks = 0;
170
171#ifndef ppc405 /* this is a ppc403 */
172  __asm__ volatile ("mfdcr %0, 0xa0" : "=r" (iocr));              /* IOCR */
173  iocr &= ~4;                         /* timer clocked from system clock */
174  __asm__ volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
175
176  __asm__ volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
177  if (((pvr & 0xffff0000) >> 16) != 0x0020)
178    return;                             /* Not a ppc403 */
179
180  if ((pvr & 0xff00) == 0x0000)         /* 403GA */
181#if 0 /* FIXME: in which processor versions will "autoload" work properly? */
182    auto_restart = (pvr & 0x00f0) > 0x0000 ? true : false;
183#else
184    /* no known chip version supports auto restart of timer... */
185    auto_restart = false;
186#endif
187  else if ((pvr & 0xff00) == 0x0100)    /* 403GB */
188    auto_restart = true;
189
190#else /* ppc405 */
191  __asm__ volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));              /*405GP CPC0_CR1 */
192  iocr &=~0x800000;               /* timer clocked from system clock CETE*/
193  __asm__ volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
194
195  /*
196   * Enable auto restart
197   */
198  auto_restart = true;
199#endif /* ppc405 */
200
201  pit_value = rtems_configuration_get_microseconds_per_tick() *
202                bsp_clicks_per_usec;
203
204  /*
205   * Set PIT value
206   */
207  __asm__ volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
208
209  /*
210   * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
211   * Enable PIT interrupt,    bit TCR->PIE = 1  0x4000000
212   */
213  tick_time = get_itimer() + pit_value;
214
215  __asm__ volatile ("mfspr %0, 0x3da" : "=r" ((tcr)));               /* TCR */
216  tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
217#if 1
218  __asm__ volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
219#endif
220}
221
222static void Install_clock(void (*clock_isr)(void *))
223{
224  rtems_irq_connect_data clockIrqConnData;
225
226  Clock_driver_ticks = 0;
227
228  /*
229   * initialize the interval here
230   * First tick is set to right amount of time in the future
231   * Future ticks will be incremented over last value set
232   * in order to provide consistent clicks in the face of
233   * interrupt overhead
234   */
235  clockIrqConnData.on   = ClockOn;
236  clockIrqConnData.off  = ClockOff;
237  clockIrqConnData.isOn = ClockIsOn;
238  clockIrqConnData.name = BSP_PIT;
239  clockIrqConnData.hdl  = clock_isr;
240  if (!BSP_install_rtems_irq_handler (&clockIrqConnData)) {
241    printk("Unable to connect Clock Irq handler\n");
242    rtems_fatal_error_occurred(1);
243  }
244
245  atexit(Clock_exit);
246}
247
248/*
249 * Called via atexit()
250 * Remove the clock interrupt handler by setting handler to NULL
251 *
252 * This will not work on the 405GP because
253 * when bit's are set in TCR they can only be unset by a reset
254 */
255void Clock_exit(void)
256{
257  rtems_irq_connect_data clockIrqConnData;
258
259  clockIrqConnData.name = BSP_PIT;
260  if (!BSP_get_current_rtems_irq_handler(&clockIrqConnData)) {
261    printk("Unable to stop system clock\n");
262    rtems_fatal_error_occurred(1);
263  }
264
265  BSP_remove_rtems_irq_handler (&clockIrqConnData);
266}
267
268void _Clock_Initialize( void )
269{
270  Install_clock( Clock_isr );
271}
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