source: rtems/bsps/powerpc/qoriq/start/l1cache.S @ 8f8ccee

5
Last change on this file since 8f8ccee was 9964895, checked in by Sebastian Huber <sebastian.huber@…>, on 04/20/18 at 08:35:35

bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.
  • Property mode set to 100644
File size: 885 bytes
Line 
1/*
2 * Copyright (c) 2015, 2016 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <libcpu/powerpc-utility.h>
16
17        .global qoriq_l1cache_invalidate
18
19        .section ".bsp_start_text", "ax"
20
21qoriq_l1cache_invalidate:
22
23        /* Invalidate L1 data cache */
24        mfspr   r3, FSL_EIS_L1CSR0
25        ori     r3, r3, FSL_EIS_L1CSR0_CFI
26        mtspr   FSL_EIS_L1CSR0, r3
271:
28        mfspr   r3, FSL_EIS_L1CSR0
29        andi.   r3, r3, FSL_EIS_L1CSR0_CFI
30        bne     1b
31        isync
32
33        /* Invalidate L1 instruction cache */
34        mfspr   r3, FSL_EIS_L1CSR1
35        ori     r3, r3, FSL_EIS_L1CSR1_ICFI
36        mtspr   FSL_EIS_L1CSR1, r3
371:
38        mfspr   r3, FSL_EIS_L1CSR1
39        andi.   r3, r3, FSL_EIS_L1CSR1_ICFI
40        bne     1b
41        isync
42
43        blr
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