1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup QorIQ |
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5 | * |
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6 | * @brief BSP startup. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2010, 2017 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Dornierstr. 4 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * The license and distribution terms for this file may be |
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19 | * found in the file LICENSE in this distribution or at |
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20 | * http://www.rtems.org/license/LICENSE. |
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21 | */ |
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22 | |
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23 | #include <libfdt.h> |
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24 | |
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25 | #include <rtems.h> |
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26 | #include <rtems/config.h> |
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27 | #include <rtems/counter.h> |
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28 | #include <rtems/sysinit.h> |
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29 | |
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30 | #include <libcpu/powerpc-utility.h> |
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31 | |
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32 | #include <bsp.h> |
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33 | #include <bsp/bootcard.h> |
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34 | #include <bsp/console-termios.h> |
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35 | #include <bsp/fatal.h> |
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36 | #include <bsp/fdt.h> |
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37 | #include <bsp/intercom.h> |
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38 | #include <bsp/irq-generic.h> |
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39 | #include <bsp/linker-symbols.h> |
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40 | #include <bsp/mmu.h> |
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41 | #include <bsp/qoriq.h> |
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42 | #include <bsp/vectors.h> |
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43 | |
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44 | LINKER_SYMBOL(bsp_exc_vector_base); |
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45 | |
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46 | qoriq_start_spin_table * |
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47 | qoriq_start_spin_table_addr[QORIQ_CPU_COUNT / QORIQ_THREAD_COUNT]; |
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48 | |
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49 | /* Configuration parameters for console driver, ... */ |
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50 | unsigned int BSP_bus_frequency; |
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51 | |
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52 | /* Configuration parameter for clock driver, ... */ |
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53 | uint32_t bsp_time_base_frequency; |
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54 | |
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55 | uint32_t qoriq_clock_frequency; |
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56 | |
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57 | uint32_t _CPU_Counter_frequency(void) |
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58 | { |
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59 | #ifdef __PPC_CPU_E6500__ |
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60 | return qoriq_clock_frequency; |
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61 | #else |
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62 | return bsp_time_base_frequency; |
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63 | #endif |
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64 | } |
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65 | |
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66 | static void initialize_frequency_parameters(void) |
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67 | { |
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68 | const void *fdt = bsp_fdt_get(); |
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69 | int node; |
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70 | int len; |
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71 | fdt32_t *val_fdt; |
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72 | |
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73 | node = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "cpu", 4); |
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74 | |
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75 | val_fdt = (fdt32_t *) fdt_getprop(fdt, node, "bus-frequency", &len); |
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76 | if (val_fdt == NULL || len != 4) { |
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77 | bsp_fatal(QORIQ_FATAL_FDT_NO_BUS_FREQUENCY); |
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78 | } |
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79 | BSP_bus_frequency = fdt32_to_cpu(*val_fdt) / QORIQ_BUS_CLOCK_DIVIDER; |
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80 | |
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81 | val_fdt = (fdt32_t *) fdt_getprop(fdt, node, "timebase-frequency", &len); |
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82 | if (val_fdt == NULL || len != 4) { |
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83 | bsp_fatal(QORIQ_FATAL_FDT_NO_BUS_FREQUENCY); |
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84 | } |
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85 | bsp_time_base_frequency = fdt32_to_cpu(*val_fdt); |
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86 | |
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87 | #ifdef __PPC_CPU_E6500__ |
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88 | val_fdt = (fdt32_t *) fdt_getprop(fdt, node, "clock-frequency", &len); |
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89 | if (val_fdt == NULL || len != 4) { |
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90 | bsp_fatal(QORIQ_FATAL_FDT_NO_CLOCK_FREQUENCY); |
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91 | } |
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92 | qoriq_clock_frequency = fdt32_to_cpu(*val_fdt); |
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93 | #endif |
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94 | } |
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95 | |
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96 | #define MTIVPR(base) \ |
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97 | __asm__ volatile ("mtivpr %0" : : "r" (base)) |
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98 | |
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99 | #ifdef __powerpc64__ |
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100 | #define VECTOR_TABLE_ENTRY_SIZE 32 |
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101 | #else |
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102 | #define VECTOR_TABLE_ENTRY_SIZE 16 |
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103 | #endif |
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104 | |
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105 | #define MTIVOR(vec, offset) \ |
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106 | do { \ |
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107 | __asm__ volatile ("mtspr " RTEMS_XSTRING(vec) ", %0" : : "r" (offset)); \ |
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108 | offset += VECTOR_TABLE_ENTRY_SIZE; \ |
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109 | } while (0) |
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110 | |
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111 | void qoriq_initialize_exceptions(void *interrupt_stack_begin) |
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112 | { |
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113 | uintptr_t addr; |
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114 | |
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115 | ppc_exc_initialize_interrupt_stack( |
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116 | (uintptr_t) interrupt_stack_begin |
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117 | ); |
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118 | |
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119 | addr = (uintptr_t) bsp_exc_vector_base; |
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120 | MTIVPR(addr); |
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121 | MTIVOR(BOOKE_IVOR0, addr); |
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122 | MTIVOR(BOOKE_IVOR1, addr); |
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123 | MTIVOR(BOOKE_IVOR2, addr); |
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124 | MTIVOR(BOOKE_IVOR3, addr); |
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125 | MTIVOR(BOOKE_IVOR4, addr); |
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126 | MTIVOR(BOOKE_IVOR5, addr); |
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127 | MTIVOR(BOOKE_IVOR6, addr); |
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128 | #ifdef __PPC_CPU_E6500__ |
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129 | MTIVOR(BOOKE_IVOR7, addr); |
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130 | #endif |
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131 | MTIVOR(BOOKE_IVOR8, addr); |
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132 | #ifdef __PPC_CPU_E6500__ |
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133 | MTIVOR(BOOKE_IVOR9, addr); |
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134 | #endif |
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135 | MTIVOR(BOOKE_IVOR10, addr); |
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136 | MTIVOR(BOOKE_IVOR11, addr); |
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137 | MTIVOR(BOOKE_IVOR12, addr); |
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138 | MTIVOR(BOOKE_IVOR13, addr); |
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139 | MTIVOR(BOOKE_IVOR14, addr); |
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140 | MTIVOR(BOOKE_IVOR15, addr); |
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141 | MTIVOR(BOOKE_IVOR32, addr); |
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142 | MTIVOR(BOOKE_IVOR33, addr); |
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143 | #ifndef __PPC_CPU_E6500__ |
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144 | MTIVOR(BOOKE_IVOR34, addr); |
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145 | #endif |
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146 | MTIVOR(BOOKE_IVOR35, addr); |
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147 | #ifdef __PPC_CPU_E6500__ |
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148 | MTIVOR(BOOKE_IVOR36, addr); |
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149 | MTIVOR(BOOKE_IVOR37, addr); |
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150 | #ifndef QORIQ_IS_HYPERVISOR_GUEST |
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151 | MTIVOR(BOOKE_IVOR38, addr); |
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152 | MTIVOR(BOOKE_IVOR39, addr); |
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153 | MTIVOR(BOOKE_IVOR40, addr); |
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154 | MTIVOR(BOOKE_IVOR41, addr); |
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155 | MTIVOR(BOOKE_IVOR42, addr); |
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156 | #endif |
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157 | #endif |
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158 | } |
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159 | |
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160 | void bsp_start(void) |
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161 | { |
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162 | /* |
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163 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function |
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164 | * store the result in global variables so that it can be used latter... |
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165 | */ |
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166 | get_ppc_cpu_type(); |
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167 | get_ppc_cpu_revision(); |
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168 | |
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169 | initialize_frequency_parameters(); |
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170 | |
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171 | qoriq_initialize_exceptions( |
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172 | (uintptr_t) _Configuration_Interrupt_stack_area_begin |
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173 | ); |
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174 | bsp_interrupt_initialize(); |
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175 | |
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176 | rtems_cache_coherent_add_area( |
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177 | bsp_section_nocacheheap_begin, |
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178 | (uintptr_t) bsp_section_nocacheheap_size |
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179 | ); |
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180 | |
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181 | #ifndef QORIQ_IS_HYPERVISOR_GUEST |
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182 | /* Disable boot page translation */ |
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183 | #if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT) |
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184 | qoriq.lcc.bstar &= ~LCC_BSTAR_EN; |
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185 | #else |
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186 | qoriq.lcc.bptr &= ~BPTR_EN; |
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187 | #endif |
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188 | #endif |
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189 | } |
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190 | |
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191 | uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells) |
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192 | { |
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193 | #ifndef QORIQ_IS_HYPERVISOR_GUEST |
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194 | return intr[0] - 16; |
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195 | #else |
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196 | return intr[0]; |
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197 | #endif |
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198 | } |
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199 | |
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200 | #ifdef RTEMS_MULTIPROCESSING |
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201 | RTEMS_SYSINIT_ITEM( |
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202 | qoriq_intercom_init, |
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203 | RTEMS_SYSINIT_BSP_PRE_DRIVERS, |
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204 | RTEMS_SYSINIT_ORDER_MIDDLE |
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205 | ); |
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206 | #endif |
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