source: rtems/bsps/powerpc/qoriq/include/bsp/qoriq.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on 12/23/17 at 07:18:56

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.
  • Property mode set to 100644
File size: 14.4 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup QorIQ
5 *
6 * @brief QorIQ Configuration, Control and Status Registers.
7 */
8
9/*
10 * Copyright (c) 2010-2015 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef LIBBSP_POWERPC_QORIQ_QORIQ_H
24#define LIBBSP_POWERPC_QORIQ_QORIQ_H
25
26#include <bsp.h>
27#include <bsp/tsec.h>
28#include <bsp/utility.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif /* __cplusplus */
33
34#define QORIQ_FILL(a, b, s) uint8_t reserved_ ## b [b - a - sizeof(s)]
35#define QORIQ_RESERVE(a, b) uint8_t reserved_ ## b [b - a]
36
37typedef struct {
38  uint32_t reg;
39  QORIQ_FILL(0x00000, 0x00010, uint32_t);
40} qoriq_pic_reg;
41
42typedef struct {
43  uint32_t ccr;
44  QORIQ_FILL(0x00000, 0x00010, uint32_t);
45  uint32_t bcr;
46  QORIQ_FILL(0x00010, 0x00020, uint32_t);
47  uint32_t vpr;
48  QORIQ_FILL(0x00020, 0x00030, uint32_t);
49  uint32_t dr;
50  QORIQ_FILL(0x00030, 0x00040, uint32_t);
51} qoriq_pic_global_timer;
52
53#define GTCCR_TOG BSP_BBIT32(0)
54#define GTCCR_COUNT_GET(reg) BSP_BFLD32GET(reg, 1, 31)
55
56#define GTBCR_CI BSP_BBIT32(0)
57#define GTBCR_COUNT(val) BSP_BFLD32(val, 1, 31)
58#define GTBCR_COUNT_GET(reg) BSP_BFLD32GET(reg, 1, 31)
59#define GTBCR_COUNT_SET(reg, val) BSP_BFLD32SET(reg, val, 1, 31)
60
61typedef struct {
62  uint32_t misc;
63  QORIQ_FILL(0x00000, 0x00010, uint32_t);
64  uint32_t internal [2];
65  QORIQ_FILL(0x00010, 0x00020, uint32_t [2]);
66} qoriq_pic_bit_field;
67
68typedef struct {
69  uint32_t vpr;
70  QORIQ_FILL(0x00000, 0x00010, uint32_t);
71  uint32_t dr;
72  QORIQ_FILL(0x00010, 0x00020, uint32_t);
73} qoriq_pic_src_cfg;
74
75typedef struct {
76  QORIQ_RESERVE(0x00000, 0x00040);
77  qoriq_pic_reg ipidr [4];
78  uint32_t ctpr;
79  QORIQ_FILL(0x00080, 0x00090, uint32_t);
80  uint32_t whoami;
81  QORIQ_FILL(0x00090, 0x000a0, uint32_t);
82  uint32_t iack;
83  QORIQ_FILL(0x000a0, 0x000b0, uint32_t);
84  uint32_t eoi;
85  QORIQ_FILL(0x000b0, 0x01000, uint32_t);
86} qoriq_pic_per_cpu;
87
88typedef struct {
89  uint32_t brr1;
90  QORIQ_FILL(0x00000, 0x00010, uint32_t);
91  uint32_t brr2;
92  QORIQ_FILL(0x00010, 0x00040, uint32_t);
93  qoriq_pic_reg ipidr [4];
94  uint32_t ctpr;
95  QORIQ_FILL(0x00080, 0x00090, uint32_t);
96  uint32_t whoami;
97  QORIQ_FILL(0x00090, 0x000a0, uint32_t);
98  uint32_t iack;
99  QORIQ_FILL(0x000a0, 0x000b0, uint32_t);
100  uint32_t eoi;
101  QORIQ_FILL(0x000b0, 0x01000, uint32_t);
102  uint32_t frr;
103  QORIQ_FILL(0x01000, 0x01020, uint32_t);
104  uint32_t gcr;
105  QORIQ_FILL(0x01020, 0x01080, uint32_t);
106  uint32_t vir;
107  QORIQ_FILL(0x01080, 0x01090, uint32_t);
108  uint32_t pir;
109  QORIQ_FILL(0x01090, 0x010a0, uint32_t);
110  qoriq_pic_reg ipivpr [4];
111  uint32_t svr;
112  QORIQ_FILL(0x010e0, 0x010f0, uint32_t);
113  uint32_t tfrra;
114  QORIQ_FILL(0x010f0, 0x01100, uint32_t);
115  qoriq_pic_global_timer gta [4];
116  QORIQ_RESERVE(0x01200, 0x01300);
117  uint32_t tcra;
118  QORIQ_FILL(0x01300, 0x01308, uint32_t);
119  uint32_t erqsr;
120  QORIQ_FILL(0x01308, 0x01310, uint32_t);
121  qoriq_pic_bit_field irqsr;
122  qoriq_pic_bit_field cisr;
123  qoriq_pic_bit_field pm [4];
124  QORIQ_RESERVE(0x013d0, 0x01400);
125  qoriq_pic_reg msgr03 [4];
126  QORIQ_RESERVE(0x01440, 0x01500);
127  uint32_t mer03;
128  QORIQ_FILL(0x01500, 0x01510, uint32_t);
129  uint32_t msr03;
130  QORIQ_FILL(0x01510, 0x01600, uint32_t);
131  qoriq_pic_reg msir [8];
132  QORIQ_RESERVE(0x01680, 0x01720);
133  uint32_t msisr;
134  QORIQ_FILL(0x01720, 0x01740, uint32_t);
135  uint32_t msiir;
136  QORIQ_FILL(0x01740, 0x020f0, uint32_t);
137  uint32_t tfrrb;
138  QORIQ_FILL(0x020f0, 0x02100, uint32_t);
139  qoriq_pic_global_timer gtb [4];
140  QORIQ_RESERVE(0x02200, 0x02300);
141  uint32_t tcrb;
142  QORIQ_FILL(0x02300, 0x02400, uint32_t);
143  qoriq_pic_reg msgr47 [4];
144  QORIQ_RESERVE(0x02440, 0x02500);
145  uint32_t mer47;
146  QORIQ_FILL(0x02500, 0x02510, uint32_t);
147  uint32_t msr47;
148  QORIQ_FILL(0x02510, 0x10000, uint32_t);
149  qoriq_pic_src_cfg ei [12];
150  QORIQ_RESERVE(0x10180, 0x10200);
151  qoriq_pic_src_cfg ii_0 [160];
152  qoriq_pic_src_cfg mi [8];
153  QORIQ_RESERVE(0x11700, 0x11c00);
154  qoriq_pic_src_cfg msi [8];
155  QORIQ_RESERVE(0x11d00, 0x13000);
156  qoriq_pic_src_cfg ii_1 [96];
157  QORIQ_RESERVE(0x13c00, 0x20000);
158  qoriq_pic_per_cpu per_cpu [2];
159} qoriq_pic;
160
161#define GTTCR_ROVR(val) BSP_BFLD32(val, 5, 7)
162#define GTTCR_ROVR_GET(reg) BSP_BFLD32GET(reg, 5, 7)
163#define GTTCR_ROVR_SET(reg, val) BSP_BFLD32SET(reg, val, 5, 7)
164#define GTTCR_RTM BSP_BBIT32(15)
165#define GTTCR_CLKR(val) BSP_BFLD32(val, 22, 23)
166#define GTTCR_CLKR_GET(reg) BSP_BFLD32GET(reg, 22, 23)
167#define GTTCR_CLKR_SET(reg, val) BSP_BFLD32SET(reg, val, 22, 23)
168#define GTTCR_CASC(val) BSP_BFLD32(val, 29, 31)
169#define GTTCR_CASC_GET(reg) BSP_BFLD32GET(reg, 29, 31)
170#define GTTCR_CASC_SET(reg, val) BSP_BFLD32SET(reg, val, 29, 31)
171
172typedef struct {
173} qoriq_uart;
174
175typedef struct {
176  uint32_t gpdir;
177  uint32_t gpodr;
178  uint32_t gpdat;
179  uint32_t gpier;
180  uint32_t gpimr;
181  uint32_t gpicr;
182  uint32_t gpibe;
183  QORIQ_RESERVE(0x001c, 0x1000);
184} qoriq_gpio;
185
186typedef struct {
187  QORIQ_RESERVE(0x000, 0x100);
188  uint16_t caplength;
189  uint16_t hciversion;
190  uint32_t hcsparams;
191  uint32_t hccparams;
192  QORIQ_RESERVE(0x10c, 0x120);
193  uint32_t dciversion;
194  uint32_t dccparams;
195  QORIQ_RESERVE(0x128, 0x140);
196  uint32_t usbcmd;
197  uint32_t usbsts;
198  uint32_t usbintr;
199  uint32_t frindex;
200  QORIQ_RESERVE(0x150, 0x154);
201  union {
202    uint32_t periodiclistbase;
203    uint32_t deviceaddr;
204  } perbase_devaddr;
205  union {
206    uint32_t asynclistaddr;
207    uint32_t addr;
208  } async_addr;
209  QORIQ_RESERVE(0x15c, 0x160);
210  uint32_t burstsize;
211  uint32_t txfilltuning;
212  QORIQ_RESERVE(0x168, 0x170);
213  uint32_t viewport;
214  QORIQ_RESERVE(0x174, 0x180);
215  uint32_t configflag;
216  uint32_t portsc1;
217  QORIQ_RESERVE(0x188, 0x1a8);
218  uint32_t usbmode;
219  uint32_t endptsetupstat;
220  uint32_t endpointprime;
221  uint32_t endptflush;
222  uint32_t endptstatus;
223  uint32_t endptcomplete;
224  uint32_t endptctrl[6];
225  QORIQ_RESERVE(0x1d8, 0x400);
226  uint32_t snoop1;
227  uint32_t snoop2;
228  uint32_t age_cnt_thresh;
229  uint32_t pri_ctrl;
230  uint32_t si_ctrl;
231  QORIQ_RESERVE(0x414, 0x500);
232  uint32_t control;
233} qoriq_usb;
234
235typedef struct {
236  uint32_t dsaddr;
237  uint32_t blkattr;
238  uint32_t cmdarg;
239  uint32_t xfertyp;
240  uint32_t cmdrsp0;
241  uint32_t cmdrsp1;
242  uint32_t cmdrsp2;
243  uint32_t cmdrsp3;
244  uint32_t datport;
245  uint32_t prsstat;
246  uint32_t proctl;
247  uint32_t sysctl;
248  uint32_t irqstat;
249  uint32_t irqstaten;
250  uint32_t irqsigen;
251  uint32_t autoc12err;
252  uint32_t hostcapblt;
253  uint32_t wml;
254  QORIQ_FILL(0x00044, 0x00050, uint32_t);
255  uint32_t fevt;
256  QORIQ_FILL(0x00050, 0x000fc, uint32_t);
257  uint32_t hostver;
258  QORIQ_FILL(0x000fc, 0x0040c, uint32_t);
259  uint32_t dcr;
260} qoriq_esdhc;
261
262#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT)
263
264typedef struct {
265        uint32_t ccsrbarh;
266        uint32_t ccsrbarl;
267        uint32_t ccsrar;
268        uint32_t altcbarh;
269        uint32_t altcbarl;
270        uint32_t altcar;
271        uint32_t bstrh;
272        uint32_t bstrl;
273        uint32_t bstar;
274} qoriq_lcc;
275
276#define LCC_BSTAR_EN BSP_BBIT32(0)
277
278typedef struct {
279        uint32_t lawbarh;
280        uint32_t lawbarl;
281        uint32_t lawar;
282        uint32_t reserved_0xc;
283} qoriq_law;
284
285typedef struct {
286  uint32_t reserved_0x0[640];
287  uint32_t qmbm_warmrst;
288} qoriq_dcfg;
289
290typedef struct {
291  QORIQ_RESERVE(0x0000, 0x1000);
292} qoriq_bman;
293
294typedef struct {
295  QORIQ_RESERVE(0x0000, 0x1000);
296} qoriq_qman;
297
298typedef struct {
299  QORIQ_RESERVE(0x000000, 0x100000);
300} qoriq_fman;
301
302typedef struct {
303  qoriq_lcc lcc;
304  QORIQ_FILL(0x000000, 0x000c00, qoriq_lcc);
305  qoriq_law law [32];
306  QORIQ_FILL(0x000c00, 0x001000, qoriq_law [32]);
307  QORIQ_RESERVE(0x001000, 0x040000);
308  qoriq_pic pic;
309  QORIQ_FILL(0x040000, 0x070000, qoriq_pic);
310  QORIQ_RESERVE(0x070000, 0x0e0000);
311  qoriq_dcfg dcfg;
312  QORIQ_FILL(0x0e0000, 0x0e1000, qoriq_dcfg);
313  QORIQ_RESERVE(0x0e1000, 0x114000);
314  qoriq_esdhc esdhc;
315  QORIQ_FILL(0x114000, 0x115000, qoriq_esdhc);
316  QORIQ_RESERVE(0x115000, 0x11c500);
317  qoriq_uart uart_0;
318  QORIQ_FILL(0x11c500, 0x11c600, qoriq_uart);
319  qoriq_uart uart_1;
320  QORIQ_FILL(0x11c600, 0x11d500, qoriq_uart);
321  qoriq_uart uart_2;
322  QORIQ_FILL(0x11d500, 0x11d600, qoriq_uart);
323  qoriq_uart uart_3;
324  QORIQ_FILL(0x11d600, 0x11e000, qoriq_uart);
325  QORIQ_RESERVE(0x11e000, 0x130000);
326  qoriq_gpio gpio[4];
327  QORIQ_RESERVE(0x134000, 0x210000);
328  qoriq_usb usb_1;
329  QORIQ_FILL(0x210000, 0x211000, qoriq_usb);
330  QORIQ_RESERVE(0x211000, 0x318000);
331  qoriq_qman qman;
332  QORIQ_RESERVE(0x319000, 0x31a000);
333  qoriq_bman bman;
334  QORIQ_RESERVE(0x31b000, 0x400000);
335  qoriq_fman fman[2];
336  QORIQ_RESERVE(0x600000, 0x2000000);
337} qoriq_ccsr;
338
339#else /* QORIQ_CHIP_VARIANT */
340
341typedef struct {
342        uint32_t ccsrbar;
343        uint32_t reserved_0;
344        uint32_t altcbar;
345        uint32_t reserved_1;
346        uint32_t altcar;
347        uint32_t reserved_2 [3];
348        uint32_t bptr;
349} qoriq_lcc;
350
351#define CCSRBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 23)
352#define CCSRBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 23)
353#define CCSRBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 23)
354
355#define ALTCBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 23)
356#define ALTCBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 23)
357#define ALTCBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 23)
358
359#define ALTCAR_EN BSP_BBIT32(0)
360#define ALTCAR_TRGT_ID(val) BSP_BFLD32(val, 8, 11)
361#define ALTCAR_TRGT_ID_GET(reg) BSP_BFLD32GET(reg, 8, 11)
362#define ALTCAR_TRGT_ID_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 11)
363
364#define BPTR_EN BSP_BBIT32(0)
365#define BPTR_BOOT_PAGE(val) BSP_BFLD32(val, 8, 31)
366#define BPTR_BOOT_PAGE_GET(reg) BSP_BFLD32GET(reg, 8, 31)
367#define BPTR_BOOT_PAGE_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 31)
368
369typedef struct {
370        uint32_t bar;
371        uint32_t reserved_0;
372        uint32_t ar;
373        uint32_t reserved_1 [5];
374} qoriq_law;
375
376#define LAWBAR_BASE_ADDR(val) BSP_BFLD32(val, 8, 31)
377#define LAWBAR_BASE_ADDR_GET(reg) BSP_BFLD32GET(reg, 8, 31)
378#define LAWBAR_BASE_ADDR_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 31)
379
380#define LAWAR_EN BSP_BBIT32(0)
381#define LAWAR_TRGT(val) BSP_BFLD32(val, 8, 11)
382#define LAWAR_TRGT_GET(reg) BSP_BFLD32GET(reg, 8, 11)
383#define LAWAR_TRGT_SET(reg, val) BSP_BFLD32SET(reg, val, 8, 11)
384#define LAWAR_SIZE(val) BSP_BFLD32(val, 26, 31)
385#define LAWAR_SIZE_GET(reg) BSP_BFLD32GET(reg, 26, 31)
386#define LAWAR_SIZE_SET(reg, val) BSP_BFLD32SET(reg, val, 26, 31)
387
388typedef struct {
389} qoriq_ecm;
390
391typedef struct {
392} qoriq_ddr_controller;
393
394typedef struct {
395} qoriq_i2c;
396
397typedef struct {
398} qoriq_local_bus;
399
400typedef struct {
401} qoriq_spi;
402
403typedef struct {
404} qoriq_pci_express;
405
406typedef struct {
407} qoriq_tdm;
408
409typedef struct {
410} qoriq_l2_cache;
411
412typedef struct {
413} qoriq_dma;
414
415typedef struct {
416} qoriq_tdm_dma;
417
418typedef struct {
419} qoriq_sec;
420
421typedef struct {
422} qoriq_serial_rapid_io;
423
424typedef struct {
425} qoriq_global_utilities;
426
427typedef struct {
428} qoriq_performance_monitor;
429
430typedef struct {
431} qoriq_debug_watchpoint;
432
433typedef struct {
434} qoriq_serdes;
435
436typedef struct {
437} qoriq_boot_rom;
438
439typedef struct {
440  qoriq_lcc lcc;
441  QORIQ_FILL(0x00000, 0x00c08, qoriq_lcc);
442  qoriq_law law [12];
443  QORIQ_FILL(0x00c08, 0x01000, qoriq_law [12]);
444  qoriq_ecm ecm;
445  QORIQ_FILL(0x01000, 0x02000, qoriq_ecm);
446  qoriq_ddr_controller ddr_controller;
447  QORIQ_FILL(0x02000, 0x03000, qoriq_ddr_controller);
448  qoriq_i2c i2c;
449  QORIQ_FILL(0x03000, 0x04000, qoriq_i2c);
450  QORIQ_RESERVE(0x04000, 0x04500);
451  qoriq_uart uart_0;
452  QORIQ_FILL(0x04500, 0x04600, qoriq_uart);
453  qoriq_uart uart_1;
454  QORIQ_FILL(0x04600, 0x04700, qoriq_uart);
455  QORIQ_RESERVE(0x04700, 0x05000);
456  qoriq_local_bus local_bus;
457  QORIQ_FILL(0x05000, 0x06000, qoriq_local_bus);
458  qoriq_spi spi;
459  QORIQ_FILL(0x06000, 0x07000, qoriq_spi);
460  QORIQ_RESERVE(0x07000, 0x08000);
461  qoriq_pci_express pci_express_3;
462  QORIQ_FILL(0x08000, 0x09000, qoriq_pci_express);
463  qoriq_pci_express pci_express_2;
464  QORIQ_FILL(0x09000, 0x0a000, qoriq_pci_express);
465  qoriq_pci_express pci_express_1;
466  QORIQ_FILL(0x0a000, 0x0b000, qoriq_pci_express);
467  QORIQ_RESERVE(0x0b000, 0x0c000);
468  qoriq_dma dma_2;
469  QORIQ_FILL(0x0c000, 0x0d000, qoriq_dma);
470  QORIQ_RESERVE(0x0d000, 0x0f000);
471  qoriq_gpio gpio;
472  QORIQ_RESERVE(0x10000, 0x16000);
473  qoriq_tdm tdm;
474  QORIQ_FILL(0x16000, 0x17000, qoriq_tdm);
475  QORIQ_RESERVE(0x17000, 0x20000);
476  qoriq_l2_cache l2_cache;
477  QORIQ_FILL(0x20000, 0x21000, qoriq_l2_cache);
478  qoriq_dma dma_1;
479  QORIQ_FILL(0x21000, 0x22000, qoriq_dma);
480  qoriq_usb usb_1;
481  QORIQ_FILL(0x22000, 0x23000, qoriq_usb);
482  qoriq_usb usb_2;
483  QORIQ_FILL(0x23000, 0x24000, qoriq_usb);
484  tsec_registers tsec_1;
485  QORIQ_FILL(0x24000, 0x25000, tsec_registers);
486  tsec_registers tsec_2;
487  QORIQ_FILL(0x25000, 0x26000, tsec_registers);
488  tsec_registers tsec_3;
489  QORIQ_FILL(0x26000, 0x27000, tsec_registers);
490  QORIQ_RESERVE(0x27000, 0x2c000);
491  qoriq_tdm_dma tdm_dma;
492  QORIQ_FILL(0x2c000, 0x2d000, qoriq_tdm_dma);
493  QORIQ_RESERVE(0x2d000, 0x2e000);
494  qoriq_esdhc esdhc;
495  QORIQ_FILL(0x2e000, 0x2f000, qoriq_esdhc);
496  QORIQ_RESERVE(0x2f000, 0x30000);
497  qoriq_sec sec;
498  QORIQ_FILL(0x30000, 0x31000, qoriq_sec);
499  QORIQ_RESERVE(0x31000, 0x40000);
500  qoriq_pic pic;
501  QORIQ_FILL(0x40000, 0x80000, qoriq_pic);
502  QORIQ_RESERVE(0x80000, 0xb0000);
503  tsec_registers tsec_1_group_0;
504  QORIQ_FILL(0xb0000, 0xb1000, tsec_registers);
505  tsec_registers tsec_2_group_0;
506  QORIQ_FILL(0xb1000, 0xb2000, tsec_registers);
507  tsec_registers tsec_3_group_0;
508  QORIQ_FILL(0xb2000, 0xb3000, tsec_registers);
509  QORIQ_RESERVE(0xb3000, 0xb4000);
510  tsec_registers tsec_1_group_1;
511  QORIQ_FILL(0xb4000, 0xb5000, tsec_registers);
512  tsec_registers tsec_2_group_1;
513  QORIQ_FILL(0xb5000, 0xb6000, tsec_registers);
514  tsec_registers tsec_3_group_1;
515  QORIQ_FILL(0xb6000, 0xb7000, tsec_registers);
516  QORIQ_RESERVE(0xb7000, 0xc0000);
517  qoriq_serial_rapid_io serial_rapid_io;
518  QORIQ_FILL(0xc0000, 0xe0000, qoriq_serial_rapid_io);
519  qoriq_global_utilities global_utilities;
520  QORIQ_FILL(0xe0000, 0xe1000, qoriq_global_utilities);
521  qoriq_performance_monitor performance_monitor;
522  QORIQ_FILL(0xe1000, 0xe2000, qoriq_performance_monitor);
523  qoriq_debug_watchpoint debug_watchpoint;
524  QORIQ_FILL(0xe2000, 0xe3000, qoriq_debug_watchpoint);
525  qoriq_serdes serdes;
526  QORIQ_FILL(0xe3000, 0xe4000, qoriq_serdes);
527  QORIQ_RESERVE(0xe4000, 0xf0000);
528  qoriq_boot_rom boot_rom;
529  QORIQ_FILL(0xf0000, 0x100000, qoriq_boot_rom);
530} qoriq_ccsr;
531
532#endif /* QORIQ_CHIP_VARIANT */
533
534extern volatile qoriq_ccsr qoriq;
535
536#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT)
537extern uint8_t qoriq_bman_portal[2][16777216];
538extern uint8_t qoriq_qman_portal[2][16777216];
539
540void qoriq_clear_ce_portal(void *base, size_t size);
541void qoriq_clear_ci_portal(void *base, size_t size);
542#endif
543
544static inline void qoriq_reset_qman_and_bman(void)
545{
546#if QORIQ_CHIP_IS_T_VARIANT(QORIQ_CHIP_VARIANT)
547  qoriq.dcfg.qmbm_warmrst = 0x3;
548
549  while ((qoriq.dcfg.qmbm_warmrst & 0x3) != 0) {
550    /* Wait for reset done */
551  }
552#endif
553}
554
555#ifdef __cplusplus
556}
557#endif /* __cplusplus */
558
559#endif /* LIBBSP_POWERPC_QORIQ_QORIQ_H */
Note: See TracBrowser for help on using the repository browser.