source: rtems/bsps/powerpc/qemuppc/start/bspstart.c @ a29b9bb4

Last change on this file since a29b9bb4 was a29b9bb4, checked in by Joel Sherrill <joel@…>, on 07/11/22 at 22:29:33

bsps/powerpc/qemuppc: Change license to BSD-2

Updates #3053.

  • Property mode set to 100644
File size: 3.7 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 *  This set of routines starts the application.  It includes application,
5 *  board, and monitor specific initialization and configuration.
6 *  The generic CPU dependent initialization has been performed
7 *  before any of these are invoked.
8 *
9 *  COPYRIGHT (c) 1989-2008.
10 *  On-Line Applications Research Corporation (OAR).
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include <string.h>
35#include <fcntl.h>
36
37#include <rtems/counter.h>
38
39#include <libcpu/bat.h>
40#include <libcpu/spr.h>
41#include <libcpu/powerpc-utility.h>
42
43#include <bsp.h>
44#include <bsp/irq.h>
45#include <bsp/vectors.h>
46#include <bsp/bootcard.h>
47#include <bsp/irq-generic.h>
48
49/*
50 * CPU Bus Frequency
51 */
52unsigned int BSP_bus_frequency;
53
54/* Configuration parameter for clock driver */
55uint32_t bsp_time_base_frequency;
56
57/* Legacy */
58uint32_t bsp_clicks_per_usec;
59
60/*
61 * Memory on this board.
62 */
63extern char RamSize[];
64uint32_t BSP_mem_size = (uint32_t)RamSize;
65
66/* Default decrementer exception handler */
67static int default_decrementer_exception_handler( BSP_Exception_frame *frame, unsigned number)
68{
69  ppc_set_decrementer_register(UINT32_MAX);
70
71  return 0;
72}
73
74uint32_t _CPU_Counter_frequency(void)
75{
76  return bsp_time_base_frequency;
77}
78
79/*
80 *  bsp_start
81 *
82 *  This routine does the bulk of the system initialization.
83 */
84
85void bsp_start( void )
86{
87  rtems_status_code sc = RTEMS_SUCCESSFUL;
88
89  /*
90   * Note we can not get CPU identification dynamically, so
91   * force current_ppc_cpu.
92   */
93  current_ppc_cpu = PPC_PSIM;
94
95  /*
96   *  initialize the device driver parameters
97   * assume we are running with 20MHz bus
98   * this should speed up some tests :-)
99   */
100  BSP_bus_frequency        = 20;
101  bsp_time_base_frequency  = 20000000;
102  bsp_clicks_per_usec      = BSP_bus_frequency;
103
104  BSP_mem_size = (uint32_t )RamSize;
105
106  ppc_exc_initialize();
107
108  /* Install default handler for the decrementer exception */
109  sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler);
110  if (sc != RTEMS_SUCCESSFUL) {
111    rtems_panic("cannot install decrementer exception handler");
112  }
113
114  /* Initalize interrupt support */
115  bsp_interrupt_initialize();
116
117#if 0
118  /*
119   * Setup BATs and enable MMU
120   */
121  /* Memory */
122  setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW);
123  setibat(0, 0x0<<24, 0x0<<24, 2<<24,        0);
124  /* PCI    */
125  setdbat(1, 0x8<<24, 0x8<<24, 1<<24,  IO_PAGE);
126  setdbat(2, 0xc<<24, 0xc<<24, 1<<24,  IO_PAGE);
127
128  _write_MSR(_read_MSR() | MSR_DR | MSR_IR);
129  __asm__ volatile("sync; isync");
130#endif
131}
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