1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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2 | |
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3 | /* |
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4 | * This set of routines starts the application. It includes application, |
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5 | * board, and monitor specific initialization and configuration. |
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6 | * The generic CPU dependent initialization has been performed |
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7 | * before any of these are invoked. |
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8 | * |
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9 | * COPYRIGHT (c) 1989-2008. |
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10 | * On-Line Applications Research Corporation (OAR). |
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11 | * |
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12 | * Redistribution and use in source and binary forms, with or without |
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13 | * modification, are permitted provided that the following conditions |
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14 | * are met: |
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15 | * 1. Redistributions of source code must retain the above copyright |
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16 | * notice, this list of conditions and the following disclaimer. |
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17 | * 2. Redistributions in binary form must reproduce the above copyright |
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18 | * notice, this list of conditions and the following disclaimer in the |
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19 | * documentation and/or other materials provided with the distribution. |
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20 | * |
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21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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25 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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26 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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27 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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28 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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29 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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30 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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31 | * POSSIBILITY OF SUCH DAMAGE. |
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32 | */ |
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33 | |
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34 | #include <string.h> |
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35 | #include <fcntl.h> |
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36 | |
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37 | #include <rtems/counter.h> |
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38 | |
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39 | #include <libcpu/bat.h> |
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40 | #include <libcpu/spr.h> |
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41 | #include <libcpu/powerpc-utility.h> |
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42 | |
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43 | #include <bsp.h> |
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44 | #include <bsp/irq.h> |
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45 | #include <bsp/vectors.h> |
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46 | #include <bsp/bootcard.h> |
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47 | #include <bsp/irq-generic.h> |
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48 | |
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49 | /* |
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50 | * CPU Bus Frequency |
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51 | */ |
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52 | unsigned int BSP_bus_frequency; |
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53 | |
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54 | /* Configuration parameter for clock driver */ |
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55 | uint32_t bsp_time_base_frequency; |
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56 | |
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57 | /* Legacy */ |
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58 | uint32_t bsp_clicks_per_usec; |
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59 | |
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60 | /* |
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61 | * Memory on this board. |
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62 | */ |
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63 | extern char RamSize[]; |
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64 | uint32_t BSP_mem_size = (uint32_t)RamSize; |
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65 | |
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66 | /* Default decrementer exception handler */ |
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67 | static int default_decrementer_exception_handler( BSP_Exception_frame *frame, unsigned number) |
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68 | { |
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69 | ppc_set_decrementer_register(UINT32_MAX); |
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70 | |
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71 | return 0; |
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72 | } |
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73 | |
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74 | uint32_t _CPU_Counter_frequency(void) |
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75 | { |
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76 | return bsp_time_base_frequency; |
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77 | } |
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78 | |
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79 | /* |
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80 | * bsp_start |
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81 | * |
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82 | * This routine does the bulk of the system initialization. |
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83 | */ |
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84 | |
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85 | void bsp_start( void ) |
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86 | { |
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87 | rtems_status_code sc = RTEMS_SUCCESSFUL; |
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88 | |
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89 | /* |
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90 | * Note we can not get CPU identification dynamically, so |
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91 | * force current_ppc_cpu. |
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92 | */ |
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93 | current_ppc_cpu = PPC_PSIM; |
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94 | |
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95 | /* |
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96 | * initialize the device driver parameters |
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97 | * assume we are running with 20MHz bus |
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98 | * this should speed up some tests :-) |
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99 | */ |
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100 | BSP_bus_frequency = 20; |
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101 | bsp_time_base_frequency = 20000000; |
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102 | bsp_clicks_per_usec = BSP_bus_frequency; |
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103 | |
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104 | BSP_mem_size = (uint32_t )RamSize; |
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105 | |
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106 | ppc_exc_initialize(); |
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107 | |
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108 | /* Install default handler for the decrementer exception */ |
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109 | sc = ppc_exc_set_handler( ASM_DEC_VECTOR, default_decrementer_exception_handler); |
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110 | if (sc != RTEMS_SUCCESSFUL) { |
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111 | rtems_panic("cannot install decrementer exception handler"); |
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112 | } |
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113 | |
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114 | /* Initalize interrupt support */ |
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115 | bsp_interrupt_initialize(); |
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116 | |
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117 | #if 0 |
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118 | /* |
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119 | * Setup BATs and enable MMU |
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120 | */ |
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121 | /* Memory */ |
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122 | setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW); |
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123 | setibat(0, 0x0<<24, 0x0<<24, 2<<24, 0); |
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124 | /* PCI */ |
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125 | setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE); |
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126 | setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE); |
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127 | |
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128 | _write_MSR(_read_MSR() | MSR_DR | MSR_IR); |
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129 | __asm__ volatile("sync; isync"); |
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130 | #endif |
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131 | } |
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