1 | /* |
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2 | * PSIM addresses and constants based upon the configuration |
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3 | * of devices used in the script provided by RTEMS. |
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4 | */ |
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5 | |
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6 | #ifndef __PSIM_h |
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7 | #define __PSIM_h |
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8 | |
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9 | /* |
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10 | * RAM Information |
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11 | */ |
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12 | |
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13 | extern char RamBase[]; |
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14 | extern char RamSize[]; |
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15 | |
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16 | /* |
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17 | * RamBase/RamSize is defined by the linker script; |
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18 | * CPP symbols are AFAIK unused and deprecated. |
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19 | */ |
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20 | #define PSIM_RAM_SIZE ((unsigned long)RamSize) |
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21 | #define PSIM_RAM_BASE ((void*)RamBase) |
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22 | |
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23 | /* |
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24 | * NVRAM/RTC Structure and Information |
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25 | */ |
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26 | |
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27 | #define PSIM_RTC_FREEZE 0xc0 |
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28 | #define PSIM_RTC_UPDATE 0x00 |
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29 | |
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30 | typedef struct { |
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31 | volatile uint8_t Control; /* 0x04 */ |
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32 | volatile uint8_t Second; /* 0x05 */ |
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33 | volatile uint8_t Minute; /* 0x06 */ |
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34 | volatile uint8_t Hour; /* 0x07 */ |
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35 | volatile uint8_t Day; /* 0x08 */ |
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36 | volatile uint8_t Date; /* 0x09 */ |
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37 | volatile uint8_t Month; /* 0x0a */ |
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38 | volatile uint8_t Year; /* 0x0b */ |
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39 | } psim_rtc_t; |
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40 | |
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41 | /* |
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42 | * System V IPC Semaphore -- Read Only |
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43 | */ |
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44 | |
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45 | typedef struct { |
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46 | volatile uint32_t obtain_value; /* 0x00 */ |
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47 | volatile uint32_t lock; /* 0x04 */ |
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48 | volatile uint32_t unlock; /* 0x08 */ |
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49 | } psim_sysv_sem_t; |
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50 | |
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51 | typedef struct { |
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52 | /* 0x0c000000 - 0x0c007FFF - AMD 29F040 */ |
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53 | volatile uint8_t Flash[ 512 * 1024 ]; |
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54 | |
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55 | /* 0x0c080000 - 0x0c0FFFFF - NVRAM/NVRAM */ |
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56 | volatile uint8_t nvram[ 512 * 1024 ]; |
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57 | |
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58 | /* 0x0c100000 - 0x0c100007 - NVRAM/RTC */ |
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59 | psim_rtc_t RTC; |
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60 | |
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61 | /* 0x0c100008 - 0x0c10000F - NVRAM/RTC */ |
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62 | uint8_t gap1[8]; |
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63 | |
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64 | /* 0x0c100010 - 0x0c10001b - System V IPC Semaphore */ |
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65 | psim_sysv_sem_t Semaphore; |
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66 | |
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67 | /* 0x0c10001c - 0x0c10001f - NVRAM/RTC */ |
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68 | uint8_t gap2[4]; |
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69 | |
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70 | /* 0x0c100020 - 0x0c10005F - Ethernet */ |
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71 | volatile uint8_t Ethtap[ 64 ]; |
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72 | |
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73 | /* 0x0c100060 - 0x0c10FFFF - NVRAM/RTC */ |
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74 | uint8_t gap3[65440]; |
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75 | |
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76 | /* 0x0c110000 - 0x0c12FFFF - System V IPC Shared Memory */ |
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77 | uint8_t SharedMemory[ 128 * 1024 ]; |
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78 | |
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79 | /* 0x0c130000 - 0x0c170000 - OpenPIC IRQ Controller */ |
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80 | volatile uint8_t OpenPIC[ 256 * 1024 ]; |
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81 | |
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82 | } psim_registers_t; |
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83 | |
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84 | /* |
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85 | * Data Structure Overlay for Registers. See linkcmds for placement. |
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86 | */ |
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87 | extern psim_registers_t PSIM; |
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88 | |
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89 | #endif |
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90 | /* end of include file */ |
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