source: rtems/bsps/powerpc/mvme5500/start/bspstart.c @ 9964895

5
Last change on this file since 9964895 was 9964895, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 20, 2018 at 8:35:35 AM

bsps: Move startup files to bsps

Adjust build support files to new directory layout.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 9.2 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-2007.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  Modified to support the Synergy VGM & Motorola PowerPC boards
17 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
18 *
19 *  Modified to support the MVME5500 board.
20 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
21 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009
22 */
23
24#include <string.h>
25#include <stdlib.h>
26#include <ctype.h>
27
28#include <rtems/sysinit.h>
29#include <rtems/system.h>
30#include <rtems/powerpc/powerpc.h>
31
32#include <libcpu/spr.h>   /* registers.h is included here */
33#include <bsp.h>
34#include <bsp/bootcard.h>
35#include <bsp/uart.h>
36#include <bsp/pci.h>
37#include <libcpu/bat.h>
38#include <libcpu/pte121.h>
39#include <libcpu/cpuIdent.h>
40#include <bsp/vectors.h>
41#include <bsp/VME.h>
42#include <bsp/bspException.h>
43
44#include <rtems/bspIo.h>
45#include <rtems/counter.h>
46
47/*
48#define SHOW_MORE_INIT_SETTINGS
49#define SHOW_LCR1_REGISTER
50#define SHOW_LCR2_REGISTER
51#define SHOW_LCR3_REGISTER
52#define CONF_VPD
53*/
54
55extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
56
57BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
58BSP_polling_getchar_function_type BSP_poll_char = NULL;
59
60extern void _return_to_ppcbug(void);
61extern unsigned long __rtems_end[];
62extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
63extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
64extern void BSP_pgtbl_activate(Triv121PgTbl);
65extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
66extern void BSP_vme_config(void);
67
68extern unsigned char ReadConfVPD_buff(int offset);
69
70uint32_t bsp_clicks_per_usec;
71
72typedef struct CmdLineRec_ {
73    unsigned long  size;
74    char           buf[0];
75} CmdLineRec, *CmdLine;
76
77
78#define mtspr(reg, val)  \
79  __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
80
81
82#define mfspr(reg) \
83  ( { unsigned val; \
84    __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
85    val; } )
86
87/*
88 * Copy Additional boot param passed by boot loader
89 */
90#define MAX_LOADER_ADD_PARM 80
91char loaderParam[MAX_LOADER_ADD_PARM];
92
93/*
94 * Total memory using RESIDUAL DATA
95 */
96unsigned int BSP_mem_size;
97/*
98 * PCI Bus Frequency
99 */
100unsigned int BSP_bus_frequency;
101/*
102 * processor clock frequency
103 */
104unsigned int BSP_processor_frequency;
105/*
106 * Time base divisior (how many tick for 1 second).
107 */
108unsigned int BSP_time_base_divisor;
109static unsigned char ConfVPD_buff[200];
110
111#define CMDLINE_BUF_SIZE  2048
112
113static char cmdline_buf[CMDLINE_BUF_SIZE];
114char *BSP_commandline_string = cmdline_buf;
115
116/* NOTE: we cannot simply malloc the commandline string;
117 * save_boot_params() is called during a very early stage when
118 * libc/malloc etc. are not yet initialized!
119 *
120 * Here's what we do:
121 *
122 * initial layout setup by the loader (preload.S):
123 *
124 * 0..RTEMS...__rtems_end | cmdline ....... TOP
125 *
126 * After the save_boot_params() routine returns, the stack area will be
127 * set up (start.S):
128 *
129 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
130 *
131 * initialize_executive_early() [called from boot_card()]
132 * will initialize the workspace:
133 *
134 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
135 *
136 * and later calls our bsp_predriver_hook() which ends up initializing
137 * libc which in turn initializes the heap
138 *
139 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
140 *
141 * The idea here is to first move the commandline to the future 'heap' area
142 * from where it will be picked up by our bsp_predriver_hook().
143 * bsp_predriver_hook() then moves it either to INIT_STACK or the workspace
144 * area using proper allocation, initializes libc and finally moves
145 * the data to the environment / malloced areas...
146 */
147
148/* this routine is called early at shared/start/start.S
149 * and must be safe with a not properly aligned stack
150 */
151char *
152save_boot_params(
153  void *r3,
154  void *r4,
155  void* r5,
156  char *cmdline_start,
157  char *cmdline_end
158)
159{
160  int i=cmdline_end-cmdline_start;
161
162  if ( i >= CMDLINE_BUF_SIZE )
163    i = CMDLINE_BUF_SIZE-1;
164  else if ( i < 0 )
165    i = 0;
166
167  memmove(cmdline_buf, cmdline_start, i);
168  cmdline_buf[i]=0;
169  return cmdline_buf;
170}
171
172void bsp_start( void )
173{
174#ifdef CONF_VPD
175  int i;
176#endif
177#ifdef SHOW_LCR1_REGISTER
178  unsigned l1cr;
179#endif
180#ifdef SHOW_LCR2_REGISTER
181  unsigned l2cr;
182#endif
183#ifdef SHOW_LCR3_REGISTER
184  unsigned l3cr;
185#endif
186  uintptr_t intrStackStart;
187  uintptr_t intrStackSize;
188  Triv121PgTbl  pt=0;
189
190  /* Till Straumann: 4/2005
191   * Need to map the system registers early, so we can printk...
192   * (otherwise we silently die)
193   */
194  /*
195   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
196   */
197  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
198
199  /* Till Straumann: 2004
200   * map the PCI 0, 1 Domain I/O space, GT64260B registers
201   * and the reserved area so that the size is the power of 2.
202   * 2009 : map the entire 256 M space
203   *
204   */
205  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE);
206
207
208  /*
209   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
210   * function store the result in global variables so that it can be used later.
211   */
212  get_ppc_cpu_type();
213  get_ppc_cpu_revision();
214
215#ifdef SHOW_LCR1_REGISTER
216  l1cr = get_L1CR();
217  printk("Initial L1CR value = %x\n", l1cr);
218#endif
219
220  /*
221   * Initialize the interrupt related settings.
222   */
223  intrStackStart = (uintptr_t) __rtems_end;
224  intrStackSize = rtems_configuration_get_interrupt_stack_size();
225
226  /*
227   * Initialize default raw exception handlers.
228   */
229  ppc_exc_initialize(intrStackStart, intrStackSize);
230
231  /*
232   * Init MMU block address translation to enable hardware
233   * access
234   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
235   */
236  printk("-----------------------------------------\n");
237  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
238  printk("-----------------------------------------\n");
239
240  BSP_mem_size         =  probeMemoryEnd();
241
242  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
243   *       of System Status  register
244   */
245  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
246  BSP_bus_frequency      = 133333333;
247  BSP_processor_frequency    = 1000000000;
248  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
249  BSP_time_base_divisor      = 4000;
250
251  /* Maybe not setup yet becuase of the warning message */
252  /* Allocate and set up the page table mappings
253   * This is only available on >604 CPUs.
254   *
255   * NOTE: This setup routine may modify the available memory
256   *       size. It is essential to call it before
257   *       calculating the workspace etc.
258   */
259  pt = BSP_pgtbl_setup(&BSP_mem_size);
260  if (!pt)
261     printk("WARNING: unable to setup page tables.\n");
262
263  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
264
265  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
266
267  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
268  rtems_counter_initialize_converter(
269    BSP_bus_frequency / (BSP_time_base_divisor / 1000)
270  );
271
272  /*
273   * Initalize RTEMS IRQ system
274   */
275   BSP_rtems_irq_mng_init(0);
276
277#ifdef SHOW_LCR2_REGISTER
278  l2cr = get_L2CR();
279  printk("Initial L2CR value = %x\n", l2cr);
280#endif
281
282#ifdef SHOW_LCR3_REGISTER
283  /* L3CR needs DEC int. handler installed for bsp_delay()*/
284  l3cr = get_L3CR();
285  printk("Initial L3CR value = %x\n", l3cr);
286#endif
287
288
289  /* Activate the page table mappings only after
290   * initializing interrupts because the irq_mng_init()
291   * routine needs to modify the text
292   */
293  if (pt) {
294#ifdef SHOW_MORE_INIT_SETTINGS
295    printk("Page table setup finished; will activate it NOW...\n");
296#endif
297    BSP_pgtbl_activate(pt);
298  }
299  /* Read Configuration Vital Product Data (VPD) */
300  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
301     printk("I2Cread_eeprom() error \n");
302  else {
303#ifdef CONF_VPD
304    printk("\n");
305    for (i=0; i<150; i++) {
306      printk("%2x ", ConfVPD_buff[i]);
307      if ((i % 20)==0 ) printk("\n");
308    }
309    printk("\n");
310#endif
311  }
312
313  /*
314   * PCI 1 domain memory space
315   */
316  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
317
318
319#ifdef SHOW_MORE_INIT_SETTINGS
320  printk("Going to start PCI buses scanning and initialization\n");
321#endif
322  pci_initialize();
323#ifdef SHOW_MORE_INIT_SETTINGS
324  printk("Number of PCI buses found is : %d\n", pci_bus_count());
325#endif
326
327  /* Install our own exception handler (needs PCI) */
328  globalExceptHdl = BSP_exceptionHandler;
329
330  /* clear hostbridge errors. MCP signal is not used on the MVME5500
331   * PCI config space scanning code will trip otherwise :-(
332   */
333  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
334
335#ifdef SHOW_MORE_INIT_SETTINGS
336  printk("MSR %x \n", _read_MSR());
337  printk("Exit from bspstart\n");
338#endif
339
340}
341
342unsigned char ReadConfVPD_buff(int offset)
343{
344  return(ConfVPD_buff[offset]);
345}
346
347RTEMS_SYSINIT_ITEM(
348  BSP_vme_config,
349  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
350  RTEMS_SYSINIT_ORDER_MIDDLE
351);
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