[7be6ad9] | 1 | /* |
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[48aa5e2c] | 2 | * This routine does the bulk of the system initialization. |
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| 3 | */ |
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| 4 | |
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| 5 | /* |
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[07e9642c] | 6 | * COPYRIGHT (c) 1989-2007. |
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[7be6ad9] | 7 | * On-Line Applications Research Corporation (OAR). |
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| 8 | * |
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| 9 | * The license and distribution terms for this file may be |
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| 10 | * found in the file LICENSE in this distribution or at |
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[c499856] | 11 | * http://www.rtems.org/license/LICENSE. |
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[7be6ad9] | 12 | * |
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| 13 | * Modified to support the MCP750. |
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| 14 | * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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| 15 | * |
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[ee732739] | 16 | * Modified to support the Synergy VGM & Motorola PowerPC boards |
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| 17 | * (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005 |
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[7be6ad9] | 18 | * |
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[ee732739] | 19 | * Modified to support the MVME5500 board. |
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| 20 | * Also, the settings of L1, L2, and L3 caches is not necessary here. |
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[72510eb2] | 21 | * (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009 |
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[7be6ad9] | 22 | */ |
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[f8e0327] | 23 | |
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[7be6ad9] | 24 | #include <string.h> |
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| 25 | #include <stdlib.h> |
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| 26 | #include <ctype.h> |
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| 27 | |
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[c4ccf26c] | 28 | #include <rtems/sysinit.h> |
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[7be6ad9] | 29 | #include <rtems/system.h> |
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[1899fe4] | 30 | #include <rtems/powerpc/powerpc.h> |
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| 31 | |
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[7be6ad9] | 32 | #include <libcpu/spr.h> /* registers.h is included here */ |
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| 33 | #include <bsp.h> |
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[48aa5e2c] | 34 | #include <bsp/bootcard.h> |
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[7be6ad9] | 35 | #include <bsp/uart.h> |
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| 36 | #include <bsp/pci.h> |
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| 37 | #include <libcpu/bat.h> |
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| 38 | #include <libcpu/pte121.h> |
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| 39 | #include <libcpu/cpuIdent.h> |
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| 40 | #include <bsp/vectors.h> |
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[c4ccf26c] | 41 | #include <bsp/VME.h> |
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[7be6ad9] | 42 | #include <bsp/bspException.h> |
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| 43 | |
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[ef9e015] | 44 | #include <rtems/bspIo.h> |
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[24bf11e] | 45 | #include <rtems/counter.h> |
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[7be6ad9] | 46 | |
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| 47 | /* |
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| 48 | #define SHOW_MORE_INIT_SETTINGS |
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| 49 | #define SHOW_LCR1_REGISTER |
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| 50 | #define SHOW_LCR2_REGISTER |
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| 51 | #define SHOW_LCR3_REGISTER |
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| 52 | #define CONF_VPD |
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| 53 | */ |
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| 54 | |
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[2e9d27c0] | 55 | extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */ |
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| 56 | |
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[bd0fb919] | 57 | BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial; |
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| 58 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
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[7be6ad9] | 59 | |
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[6771a9e7] | 60 | extern void _return_to_ppcbug(void); |
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[7be6ad9] | 61 | extern unsigned long __rtems_end[]; |
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[6771a9e7] | 62 | extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void); |
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[06d14130] | 63 | extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *); |
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[6771a9e7] | 64 | extern void BSP_pgtbl_activate(Triv121PgTbl); |
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| 65 | extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes); |
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[7be6ad9] | 66 | extern void BSP_vme_config(void); |
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| 67 | |
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[2e9d27c0] | 68 | extern unsigned char ReadConfVPD_buff(int offset); |
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| 69 | |
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[07e9642c] | 70 | uint32_t bsp_clicks_per_usec; |
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| 71 | |
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[7be6ad9] | 72 | typedef struct CmdLineRec_ { |
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[b5e7018] | 73 | unsigned long size; |
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| 74 | char buf[0]; |
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[7be6ad9] | 75 | } CmdLineRec, *CmdLine; |
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| 76 | |
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| 77 | |
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[b5e7018] | 78 | #define mtspr(reg, val) \ |
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| 79 | __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val)) |
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[7be6ad9] | 80 | |
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| 81 | |
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[b5e7018] | 82 | #define mfspr(reg) \ |
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| 83 | ( { unsigned val; \ |
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| 84 | __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \ |
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| 85 | val; } ) |
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[7be6ad9] | 86 | |
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| 87 | /* |
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| 88 | * Copy Additional boot param passed by boot loader |
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| 89 | */ |
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| 90 | #define MAX_LOADER_ADD_PARM 80 |
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| 91 | char loaderParam[MAX_LOADER_ADD_PARM]; |
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| 92 | |
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| 93 | /* |
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| 94 | * Total memory using RESIDUAL DATA |
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| 95 | */ |
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| 96 | unsigned int BSP_mem_size; |
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| 97 | /* |
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| 98 | * PCI Bus Frequency |
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| 99 | */ |
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| 100 | unsigned int BSP_bus_frequency; |
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| 101 | /* |
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| 102 | * processor clock frequency |
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| 103 | */ |
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| 104 | unsigned int BSP_processor_frequency; |
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| 105 | /* |
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| 106 | * Time base divisior (how many tick for 1 second). |
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| 107 | */ |
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| 108 | unsigned int BSP_time_base_divisor; |
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[72510eb2] | 109 | static unsigned char ConfVPD_buff[200]; |
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[7be6ad9] | 110 | |
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[b5e7018] | 111 | #define CMDLINE_BUF_SIZE 2048 |
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[ee732739] | 112 | |
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| 113 | static char cmdline_buf[CMDLINE_BUF_SIZE]; |
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| 114 | char *BSP_commandline_string = cmdline_buf; |
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| 115 | |
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[7be6ad9] | 116 | /* NOTE: we cannot simply malloc the commandline string; |
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| 117 | * save_boot_params() is called during a very early stage when |
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| 118 | * libc/malloc etc. are not yet initialized! |
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| 119 | * |
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| 120 | * Here's what we do: |
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| 121 | * |
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| 122 | * initial layout setup by the loader (preload.S): |
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| 123 | * |
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| 124 | * 0..RTEMS...__rtems_end | cmdline ....... TOP |
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| 125 | * |
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| 126 | * After the save_boot_params() routine returns, the stack area will be |
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| 127 | * set up (start.S): |
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| 128 | * |
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| 129 | * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP |
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| 130 | * |
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| 131 | * initialize_executive_early() [called from boot_card()] |
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| 132 | * will initialize the workspace: |
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| 133 | * |
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| 134 | * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP |
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| 135 | * |
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[e7545f1b] | 136 | * and later calls our bsp_predriver_hook() which ends up initializing |
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[7be6ad9] | 137 | * libc which in turn initializes the heap |
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| 138 | * |
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| 139 | * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP |
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| 140 | * |
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| 141 | * The idea here is to first move the commandline to the future 'heap' area |
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[e7545f1b] | 142 | * from where it will be picked up by our bsp_predriver_hook(). |
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| 143 | * bsp_predriver_hook() then moves it either to INIT_STACK or the workspace |
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[7be6ad9] | 144 | * area using proper allocation, initializes libc and finally moves |
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| 145 | * the data to the environment / malloced areas... |
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| 146 | */ |
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| 147 | |
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[ac7af4a] | 148 | /* this routine is called early at shared/start/start.S |
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[7be6ad9] | 149 | * and must be safe with a not properly aligned stack |
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| 150 | */ |
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[5eccbac] | 151 | char * |
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[b5e7018] | 152 | save_boot_params( |
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| 153 | void *r3, |
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| 154 | void *r4, |
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| 155 | void* r5, |
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| 156 | char *cmdline_start, |
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| 157 | char *cmdline_end |
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| 158 | ) |
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[7be6ad9] | 159 | { |
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[b5e7018] | 160 | int i=cmdline_end-cmdline_start; |
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| 161 | |
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| 162 | if ( i >= CMDLINE_BUF_SIZE ) |
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| 163 | i = CMDLINE_BUF_SIZE-1; |
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| 164 | else if ( i < 0 ) |
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| 165 | i = 0; |
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| 166 | |
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| 167 | memmove(cmdline_buf, cmdline_start, i); |
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| 168 | cmdline_buf[i]=0; |
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[5eccbac] | 169 | return cmdline_buf; |
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[7be6ad9] | 170 | } |
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| 171 | |
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| 172 | void bsp_start( void ) |
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| 173 | { |
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[05682dc] | 174 | #ifdef CONF_VPD |
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[7be6ad9] | 175 | int i; |
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[05682dc] | 176 | #endif |
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| 177 | #ifdef SHOW_LCR1_REGISTER |
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| 178 | unsigned l1cr; |
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| 179 | #endif |
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| 180 | #ifdef SHOW_LCR2_REGISTER |
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| 181 | unsigned l2cr; |
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| 182 | #endif |
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| 183 | #ifdef SHOW_LCR3_REGISTER |
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| 184 | unsigned l3cr; |
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| 185 | #endif |
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[2d2de4eb] | 186 | uintptr_t intrStackStart; |
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| 187 | uintptr_t intrStackSize; |
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[b5e7018] | 188 | Triv121PgTbl pt=0; |
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[ee732739] | 189 | |
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| 190 | /* Till Straumann: 4/2005 |
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| 191 | * Need to map the system registers early, so we can printk... |
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| 192 | * (otherwise we silently die) |
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| 193 | */ |
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| 194 | /* |
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[ac7af4a] | 195 | * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window |
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[ee732739] | 196 | */ |
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| 197 | setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE); |
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| 198 | |
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| 199 | /* Till Straumann: 2004 |
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| 200 | * map the PCI 0, 1 Domain I/O space, GT64260B registers |
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| 201 | * and the reserved area so that the size is the power of 2. |
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[72510eb2] | 202 | * 2009 : map the entire 256 M space |
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[ac7af4a] | 203 | * |
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[ee732739] | 204 | */ |
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[72510eb2] | 205 | setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE); |
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[ee732739] | 206 | |
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| 207 | |
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[7be6ad9] | 208 | /* |
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[958ed38] | 209 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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| 210 | * function store the result in global variables so that it can be used later. |
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[7be6ad9] | 211 | */ |
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[958ed38] | 212 | get_ppc_cpu_type(); |
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| 213 | get_ppc_cpu_revision(); |
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[7be6ad9] | 214 | |
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| 215 | #ifdef SHOW_LCR1_REGISTER |
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| 216 | l1cr = get_L1CR(); |
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[ac7af4a] | 217 | printk("Initial L1CR value = %x\n", l1cr); |
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[7be6ad9] | 218 | #endif |
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| 219 | |
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| 220 | /* |
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[a86f3aac] | 221 | * Initialize the interrupt related settings. |
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[7be6ad9] | 222 | */ |
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[2d2de4eb] | 223 | intrStackStart = (uintptr_t) __rtems_end; |
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[a86f3aac] | 224 | intrStackSize = rtems_configuration_get_interrupt_stack_size(); |
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[7be6ad9] | 225 | |
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| 226 | /* |
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[a86f3aac] | 227 | * Initialize default raw exception handlers. |
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[7be6ad9] | 228 | */ |
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[801b5d8] | 229 | ppc_exc_initialize(intrStackStart, intrStackSize); |
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[b5e7018] | 230 | |
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[7be6ad9] | 231 | /* |
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| 232 | * Init MMU block address translation to enable hardware |
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| 233 | * access |
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| 234 | * More PCI1 memory mapping to be done after BSP_pgtbl_activate. |
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| 235 | */ |
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| 236 | printk("-----------------------------------------\n"); |
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| 237 | printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version ); |
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| 238 | printk("-----------------------------------------\n"); |
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| 239 | |
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[72510eb2] | 240 | BSP_mem_size = probeMemoryEnd(); |
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[169480b] | 241 | |
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[b5e7018] | 242 | /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit |
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| 243 | * of System Status register |
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| 244 | */ |
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[7be6ad9] | 245 | /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */ |
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[b5e7018] | 246 | BSP_bus_frequency = 133333333; |
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| 247 | BSP_processor_frequency = 1000000000; |
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| 248 | /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */ |
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| 249 | BSP_time_base_divisor = 4000; |
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[7be6ad9] | 250 | |
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| 251 | /* Maybe not setup yet becuase of the warning message */ |
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| 252 | /* Allocate and set up the page table mappings |
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| 253 | * This is only available on >604 CPUs. |
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| 254 | * |
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| 255 | * NOTE: This setup routine may modify the available memory |
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| 256 | * size. It is essential to call it before |
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| 257 | * calculating the workspace etc. |
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| 258 | */ |
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| 259 | pt = BSP_pgtbl_setup(&BSP_mem_size); |
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| 260 | if (!pt) |
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| 261 | printk("WARNING: unable to setup page tables.\n"); |
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| 262 | |
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[ac7af4a] | 263 | printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size); |
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[7be6ad9] | 264 | |
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| 265 | /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */ |
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| 266 | |
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[b5e7018] | 267 | bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000); |
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[24bf11e] | 268 | rtems_counter_initialize_converter( |
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| 269 | BSP_bus_frequency / (BSP_time_base_divisor / 1000) |
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| 270 | ); |
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[b5e7018] | 271 | |
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[7be6ad9] | 272 | /* |
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| 273 | * Initalize RTEMS IRQ system |
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| 274 | */ |
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| 275 | BSP_rtems_irq_mng_init(0); |
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| 276 | |
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| 277 | #ifdef SHOW_LCR2_REGISTER |
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| 278 | l2cr = get_L2CR(); |
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| 279 | printk("Initial L2CR value = %x\n", l2cr); |
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[ac7af4a] | 280 | #endif |
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[7be6ad9] | 281 | |
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| 282 | #ifdef SHOW_LCR3_REGISTER |
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| 283 | /* L3CR needs DEC int. handler installed for bsp_delay()*/ |
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| 284 | l3cr = get_L3CR(); |
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| 285 | printk("Initial L3CR value = %x\n", l3cr); |
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[ac7af4a] | 286 | #endif |
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[7be6ad9] | 287 | |
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| 288 | |
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| 289 | /* Activate the page table mappings only after |
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| 290 | * initializing interrupts because the irq_mng_init() |
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| 291 | * routine needs to modify the text |
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[ac7af4a] | 292 | */ |
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[7be6ad9] | 293 | if (pt) { |
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| 294 | #ifdef SHOW_MORE_INIT_SETTINGS |
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| 295 | printk("Page table setup finished; will activate it NOW...\n"); |
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| 296 | #endif |
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| 297 | BSP_pgtbl_activate(pt); |
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| 298 | } |
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[72510eb2] | 299 | /* Read Configuration Vital Product Data (VPD) */ |
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| 300 | if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150)) |
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| 301 | printk("I2Cread_eeprom() error \n"); |
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| 302 | else { |
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| 303 | #ifdef CONF_VPD |
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| 304 | printk("\n"); |
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| 305 | for (i=0; i<150; i++) { |
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[ac7af4a] | 306 | printk("%2x ", ConfVPD_buff[i]); |
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[72510eb2] | 307 | if ((i % 20)==0 ) printk("\n"); |
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| 308 | } |
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| 309 | printk("\n"); |
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| 310 | #endif |
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| 311 | } |
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[7be6ad9] | 312 | |
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| 313 | /* |
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| 314 | * PCI 1 domain memory space |
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| 315 | */ |
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| 316 | setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE); |
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[ac7af4a] | 317 | |
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[7be6ad9] | 318 | |
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| 319 | #ifdef SHOW_MORE_INIT_SETTINGS |
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| 320 | printk("Going to start PCI buses scanning and initialization\n"); |
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[ac7af4a] | 321 | #endif |
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[037864f5] | 322 | pci_initialize(); |
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[7be6ad9] | 323 | #ifdef SHOW_MORE_INIT_SETTINGS |
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[4cbb57da] | 324 | printk("Number of PCI buses found is : %d\n", pci_bus_count()); |
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[7be6ad9] | 325 | #endif |
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| 326 | |
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| 327 | /* Install our own exception handler (needs PCI) */ |
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| 328 | globalExceptHdl = BSP_exceptionHandler; |
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| 329 | |
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| 330 | /* clear hostbridge errors. MCP signal is not used on the MVME5500 |
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| 331 | * PCI config space scanning code will trip otherwise :-( |
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| 332 | */ |
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| 333 | _BSP_clear_hostbridge_errors(0, 1 /*quiet*/); |
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| 334 | |
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| 335 | #ifdef SHOW_MORE_INIT_SETTINGS |
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| 336 | printk("MSR %x \n", _read_MSR()); |
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| 337 | printk("Exit from bspstart\n"); |
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| 338 | #endif |
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| 339 | |
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| 340 | } |
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[72510eb2] | 341 | |
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| 342 | unsigned char ReadConfVPD_buff(int offset) |
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| 343 | { |
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| 344 | return(ConfVPD_buff[offset]); |
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| 345 | } |
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[c4ccf26c] | 346 | |
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| 347 | RTEMS_SYSINIT_ITEM( |
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| 348 | BSP_vme_config, |
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| 349 | RTEMS_SYSINIT_BSP_PRE_DRIVERS, |
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| 350 | RTEMS_SYSINIT_ORDER_MIDDLE |
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| 351 | ); |
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