1 | /* GT64260eth.h |
---|
2 | * |
---|
3 | * Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc. |
---|
4 | * All rights reserved. |
---|
5 | * |
---|
6 | * RTEMS/Mvme5500 port 2004 by S. Kate Feng, <feng1@bnl.gov>, |
---|
7 | * All rights reserved. |
---|
8 | * |
---|
9 | * Redistribution and use in source and binary forms, with or without |
---|
10 | * modification, are permitted provided that the following conditions |
---|
11 | * are met: |
---|
12 | * 1. Redistributions of source code must retain the above copyright |
---|
13 | * notice, this list of conditions and the following disclaimer. |
---|
14 | * 2. Redistributions in binary form must reproduce the above copyright |
---|
15 | * notice, this list of conditions and the following disclaimer in the |
---|
16 | * documentation and/or other materials provided with the distribution. |
---|
17 | * 3. All advertising materials mentioning features or use of this software |
---|
18 | * must display the following acknowledgement: |
---|
19 | * This product includes software developed for the NetBSD Project by |
---|
20 | * Allegro Networks, Inc., and Wasabi Systems, Inc. |
---|
21 | * 4. The name of Allegro Networks, Inc. may not be used to endorse |
---|
22 | * or promote products derived from this software without specific prior |
---|
23 | * written permission. |
---|
24 | * 5. The name of Wasabi Systems, Inc. may not be used to endorse |
---|
25 | * or promote products derived from this software without specific prior |
---|
26 | * written permission. |
---|
27 | * |
---|
28 | * THIS SOFTWARE IS PROVIDED BY ALLEGRO NETWORKS, INC. AND |
---|
29 | * WASABI SYSTEMS, INC. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, |
---|
30 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY |
---|
31 | * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
---|
32 | * IN NO EVENT SHALL EITHER ALLEGRO NETWORKS, INC. OR WASABI SYSTEMS, INC. |
---|
33 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
---|
34 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
---|
35 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
---|
36 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
---|
37 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
---|
38 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
---|
39 | * POSSIBILITY OF SUCH DAMAGE. |
---|
40 | */ |
---|
41 | |
---|
42 | /* Keep the ring sizes a power of two for efficiency. |
---|
43 | Making the Tx ring too long decreases the effectiveness of channel |
---|
44 | bonding and packet priority. |
---|
45 | There are no ill effects from too-large receive rings. */ |
---|
46 | #define TX_RING_SIZE 32 |
---|
47 | #define GT_NEXTTX(x) ((x + 1) % TX_RING_SIZE ) |
---|
48 | #define TX_QUARTER_FULL TX_RING_SIZE/2 |
---|
49 | #define TX_HALF_FULL TX_RING_SIZE/2 |
---|
50 | #define RX_RING_SIZE 16 |
---|
51 | #define HASH_TABLE_SIZE 16 |
---|
52 | #define HASH_DRAM_SIZE HASH_TABLE_SIZE*1024 /* size of DRAM for hash table */ |
---|
53 | #define INTR_ERR_SIZE 16 |
---|
54 | |
---|
55 | enum GTeth_txprio { |
---|
56 | GE_TXPRIO_HI=1, |
---|
57 | GE_TXPRIO_LO=0, |
---|
58 | GE_TXPRIO_NONE=2 |
---|
59 | }; |
---|
60 | enum GTeth_rxprio { |
---|
61 | GE_RXPRIO_HI=3, |
---|
62 | GE_RXPRIO_MEDHI=2, |
---|
63 | GE_RXPRIO_MEDLO=1, |
---|
64 | GE_RXPRIO_LO=0 |
---|
65 | }; |
---|
66 | |
---|
67 | struct GTeth_softc { |
---|
68 | struct GTeth_desc txq_desc[TX_RING_SIZE]; /* transmit descriptor memory */ |
---|
69 | struct GTeth_desc rxq_desc[RX_RING_SIZE]; /* receive descriptor memory */ |
---|
70 | struct mbuf* txq_mbuf[TX_RING_SIZE]; /* transmit buffer memory */ |
---|
71 | struct mbuf* rxq_mbuf[RX_RING_SIZE]; /* receive buffer memory */ |
---|
72 | struct GTeth_softc *next_module; |
---|
73 | volatile unsigned int intr_errsts[INTR_ERR_SIZE]; /* capture the right intr_status */ |
---|
74 | unsigned int intr_err_ptr1; /* ptr used in GTeth_error() */ |
---|
75 | unsigned int intr_err_ptr2; /* ptr used in ISR */ |
---|
76 | struct ifqueue txq_pendq; /* these are ready to go to the GT */ |
---|
77 | unsigned int txq_pending; |
---|
78 | unsigned int txq_lo; /* next to be given to GT DMA */ |
---|
79 | unsigned int txq_fi; /* next to be free */ |
---|
80 | unsigned int txq_to_cpu; /* next to be returned to CPU */ |
---|
81 | unsigned int txq_ei_gapcount; /* counter until next EI */ |
---|
82 | unsigned int txq_nactive; /* number of active descriptors */ |
---|
83 | unsigned int txq_nintr; /* number of txq desc. send TX_EVENT */ |
---|
84 | unsigned int txq_outptr; /* where to put next transmit packet */ |
---|
85 | unsigned int txq_inptr; /* start of 1st queued tx packet */ |
---|
86 | unsigned int txq_free; /* free Tx queue slots. */ |
---|
87 | unsigned txq_intrbits; /* bits to write to EIMR */ |
---|
88 | unsigned txq_esdcmrbits; /* bits to write to ESDCMR */ |
---|
89 | unsigned txq_epsrbits; /* bits to test with EPSR */ |
---|
90 | |
---|
91 | caddr_t txq_ectdp; /* offset to cur. tx desc ptr reg */ |
---|
92 | unsigned long txq_desc_busaddr; /* bus addr of tx descriptors */ |
---|
93 | caddr_t txq_buf_busaddr; /* bus addr of tx buffers */ |
---|
94 | |
---|
95 | struct mbuf *rxq_curpkt; /* mbuf for current packet */ |
---|
96 | struct GTeth_desc *rxq_head_desc; /* rxq head descriptor */ |
---|
97 | unsigned int rxq_fi; /* next to be returned to CPU */ |
---|
98 | unsigned int rxq_active; /* # of descriptors given to GT */ |
---|
99 | unsigned rxq_intrbits; /* bits to write to EIMR */ |
---|
100 | unsigned long rxq_desc_busaddr; /* bus addr of rx descriptors */ |
---|
101 | |
---|
102 | struct arpcom arpcom; /* rtems if structure, contains ifnet */ |
---|
103 | int sc_macno; /* which mac? 0, 1, or 2 */ |
---|
104 | |
---|
105 | unsigned int sc_tickflags; |
---|
106 | #define GE_TICK_TX_IFSTART 0x0001 |
---|
107 | #define GE_TICK_RX_RESTART 0x0002 |
---|
108 | unsigned int sc_flags; |
---|
109 | #define GE_ALLMULTI 0x0001 |
---|
110 | #define GE_PHYSTSCHG 0x0002 |
---|
111 | #define GE_RXACTIVE 0x0004 |
---|
112 | unsigned sc_pcr; /* current EPCR value */ |
---|
113 | unsigned sc_pcxr; /* current EPCXR value */ |
---|
114 | unsigned sc_intrmask; /* current EIMR value */ |
---|
115 | unsigned sc_idlemask; /* suspended EIMR bits */ |
---|
116 | unsigned sc_max_frame_length; /* maximum frame length */ |
---|
117 | unsigned rx_buf_sz; |
---|
118 | |
---|
119 | /* Hash table related members */ |
---|
120 | unsigned long long *sc_hashtable; |
---|
121 | unsigned int sc_hashmask; /* 0x1ff or 0x1fff */ |
---|
122 | |
---|
123 | rtems_id daemonTid; |
---|
124 | rtems_id daemonSync; /* synchronization with the daemon */ |
---|
125 | /* statistics */ |
---|
126 | struct { |
---|
127 | volatile unsigned long rxInterrupts; |
---|
128 | |
---|
129 | volatile unsigned long txInterrupts; |
---|
130 | unsigned long txMultiBuffPacket; |
---|
131 | unsigned long txMultiMaxLen; |
---|
132 | unsigned long txSinglMaxLen; |
---|
133 | unsigned long txMultiMaxLoop; |
---|
134 | unsigned long txBuffMaxLen; |
---|
135 | unsigned long length_errors; |
---|
136 | unsigned long frame_errors; |
---|
137 | unsigned long crc_errors; |
---|
138 | unsigned long or_errors; /* overrun error */ |
---|
139 | } stats; |
---|
140 | }; |
---|