source: rtems/bsps/powerpc/mvme5500/README

Last change on this file was eb36d11, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 25, 2018 at 1:06:08 PM

bsps: Move documentation, etc. files to bsps

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1Please reference README.booting for the boot/load process.
2
3For the priority setting of the Interrupt Requests (IRQs), please
4reference README.irq
5
6The BSP is built and tested on the 4.7.1 and 4.7.99.2 CVS RTEMS release.
7
8I believe in valuable real-time programming, where technical neatness,
9performance and truth are.  I hope I still believe. Any suggestion,
10bug reports, or even bug fixes (great!) would be highly appreciated
11so that I still believe what I believe.
12
13
14ACKNOWLEDGEMENTS
15----------------
16Acknowledgements:
17
18Valuable information was obtained from the following:
191) Marvell NDA document for the discovery system controller.
20Other related documents are listed at :
21http://www.aps.anl.gov/epics/meetings/2006-06/RTEMS_Primer_SIG/RTEMS_BSP_MVME5500.pdf
222) netBSD: For the two NICS and some headers :
23           Allegro Networks, Inc., Wasabi Systems, Inc. 
243) RTEMS:  This BSP also builds on top of the work of others who have
25 contributed to similar RTEMS powerpc shared and motorola_powerpc BSPs, most
26 notably Eric Valette, Till Straumann (SVGM1 BSP, too), Eric Norum and others.
27
28LICENSE
29-------
30See ./LICENSE file.
31
32BSP NAME:           mvme5500
33BOARD:              MVME5500 by Motorola
34BUS:                PCI
35CPU FAMILY:         ppc
36CPU:                MPC7455 @ 1GHZ
37COPROCESSORS:       N/A
38MODE:               32/64 bit mode (support 32 bit for now)
39DEBUG MONITOR:      MOTLoad
40SYSTEM CONTROLLER:  GT64260B
41
42PERIPHERALS
43===========
44TIMERS:             Eight, 32 bit programmable
45SERIAL PORTS:       2 NS 16550 on GT64260B
46REAL-TIME CLOCK:    MK48T37V
4732K NVSRAM:         MK48T37V
48WATCHDOG TIMER:     use the one in GT-64260B
49DMA:                8 channel DMA controller (GT-64260B)
50VIDEO:              none
51NETWORKING:         Port 1: Intel 82544EI Gigabit Ethernet Controller
52                    10/100/1000Mb/s routed to front panel RJ-45
53                    Port 2: 10/100 Mb ethernet unit integrated on the
54                    Marvell's GT64260 system controller
55
56DRIVER INFORMATION
57==================
58CLOCK DRIVER:       PPC internal
59IOSUPP DRIVER:      N/A
60SHMSUPP:            N/A
61TIMER DRIVER:       PPC internal
62TTY DRIVER:         PPC internal
63
64STDIO
65=====
66PORT:               Console port 0
67ELECTRICAL:         na
68BAUD:               na
69BITS PER CHARACTER: na
70PARITY:             na
71STOP BITS:          na
72
73
74Jumpers
75=======
76
771) The BSP is tested with the 60x bus mode instead of the MPX bus mode.
78   ( No jumper or a jumper across pins 1-2 on J19 selects the 60x bus mode)
79
802) On the mvme5500 board, Ethernet 1 is the Gigabit Ethernet port and is
81   front panel only. Ethernet 2 is 10/100 BaseT Ethernet. For front-panel
82   Ethernet2, install jumpers across pins 1-2 on all J6, J7, J100 and
83   J101 headers.
84
853) Enable SROM initialization at startup. (No jumper or a jumper across
86   pins 1-2 on J17)
87
88In fact, (if I did not miss anything) the mvme5500 board should function
89properly if one keeps all the jumpers at factory configuration.
90One can leave out the jumper on J30 to disable EEPROM programming.
91
92Notes
93=====
94
95BSP BAT usage
96----------------------
97DBAT0 and IBAT0
980x00000000
990x0fffffff  1st 256M, for MEMORY access (caching enabled)
100
101DBAT1 and IBAT1
1020x00000000
1030x0fffffff  2nd 256M, for MEMORY access (caching enabled)
104
105UPDATE: (2004/5).
106The BSP now uses page tables for mapping the entire 512MB
107of RAM. DBAT0 and DBAT1 is hence free for use by the
108application. A simple 1:1 (virt<->phys) mapping is employed.
109The BSP write-protects the text and read-only data
110areas of the application.  Special acknowledgement to Till
111Straumann <strauman@slac.stanford.edu> for providing inputs in
112porting the memory protection software he wrote (BSP_pgtbl_xxx())
113to MVME5500.
114
115
116The default VME configuration uses DBAT0 to map
117more PCI memory space for use by the universe VME
118bridge:
119
120DBAT0
1210x90000000      PCI memory space <-> VME
1220x9fffffff
123
124Port  VME-Addr   Size       PCI-Adrs   Mode:
1250:    0x20000000 0x0F000000 0x90000000 A32, Dat, Sup
1261:    0x00000000 0x00FF0000 0x9F000000 A24, Dat, Sup
1272:    0x00000000 0x00010000 0x9FFF0000 A16, Dat, Sup
128
129
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