1 | /* |
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2 | * This routine does the bulk of the system initialization. |
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3 | */ |
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4 | |
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5 | /* |
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6 | * COPYRIGHT (c) 1989-1998. |
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7 | * On-Line Applications Research Corporation (OAR). |
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8 | * |
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9 | * The license and distribution terms for this file may be |
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10 | * found in the file LICENSE in this distribution or at |
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11 | * http://www.rtems.org/license/LICENSE. |
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12 | * |
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13 | * Modified to support the MCP750. |
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14 | * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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15 | * |
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16 | * Modified for mvme3100 by T. Straumann |
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17 | */ |
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18 | |
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19 | #include <string.h> |
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20 | #include <stdlib.h> |
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21 | #include <inttypes.h> |
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22 | |
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23 | #include <rtems.h> |
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24 | #include <bsp.h> |
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25 | #include <bsp/bootcard.h> |
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26 | #include <rtems/bspIo.h> |
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27 | #include <rtems/counter.h> |
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28 | #include <rtems/sysinit.h> |
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29 | #include <libcpu/spr.h> |
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30 | #include <libcpu/io.h> |
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31 | #include <libcpu/e500_mmu.h> |
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32 | #include <bsp/uart.h> |
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33 | #include <bsp/irq.h> |
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34 | #include <bsp/pci.h> |
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35 | #include <bsp/vpd.h> |
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36 | #include <libcpu/cpuIdent.h> |
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37 | #include <bsp/vectors.h> |
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38 | #include <bsp/VME.h> |
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39 | #include <rtems/powerpc/powerpc.h> |
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40 | |
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41 | #define SHOW_MORE_INIT_SETTINGS |
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42 | #undef DEBUG |
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43 | |
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44 | #define NumberOf(arr) (sizeof(arr)/sizeof(arr[0])) |
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45 | |
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46 | #ifdef DEBUG |
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47 | #define STATIC |
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48 | #else |
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49 | #define STATIC static |
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50 | #endif |
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51 | |
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52 | extern unsigned long __rtems_end[]; |
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53 | extern unsigned ppc_exc_lock_std, ppc_exc_gpr3_std; |
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54 | |
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55 | /* |
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56 | * Copy Additional boot param passed by boot loader |
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57 | */ |
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58 | #define CMDLINE_BUF_SIZE 2048 |
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59 | |
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60 | static char cmdline_buf[CMDLINE_BUF_SIZE] = {0}; |
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61 | char *BSP_commandline_string = cmdline_buf; |
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62 | |
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63 | /* |
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64 | * Vital Board data Start using DATA RESIDUAL |
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65 | */ |
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66 | uint32_t bsp_clicks_per_usec = 0; |
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67 | /* |
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68 | * Total memory using RESIDUAL DATA |
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69 | */ |
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70 | unsigned int BSP_mem_size = 0; |
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71 | /* |
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72 | * PCI Bus Frequency |
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73 | */ |
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74 | unsigned int BSP_pci_bus_frequency = 0xdeadbeef; |
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75 | /* |
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76 | * PPC Bus Frequency |
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77 | */ |
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78 | unsigned int BSP_bus_frequency = 0; |
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79 | /* |
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80 | * processor clock frequency |
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81 | */ |
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82 | unsigned int BSP_processor_frequency = 0; |
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83 | /* |
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84 | * Time base divisior (how many tick for 1 second). |
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85 | */ |
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86 | unsigned int BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */ |
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87 | |
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88 | /* Board identification string */ |
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89 | char BSP_productIdent[20] = {0}; |
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90 | char BSP_serialNumber[20] = {0}; |
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91 | |
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92 | /* VPD appends an extra char -- what for ? */ |
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93 | char BSP_enetAddr0[7] = {0}; |
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94 | char BSP_enetAddr1[7] = {0}; |
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95 | char BSP_enetAddr2[7] = {0}; |
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96 | |
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97 | static void |
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98 | prether(char *b, int idx) |
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99 | { |
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100 | int i; |
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101 | printk("Ethernet %i %02X", idx, *b++); |
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102 | for ( i=0; i<5; i++ ) |
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103 | printk(":%02X",*b++); |
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104 | printk("\n"); |
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105 | } |
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106 | |
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107 | BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial; |
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108 | BSP_polling_getchar_function_type BSP_poll_char = NULL; |
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109 | |
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110 | char *rtems_progname; |
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111 | |
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112 | /* |
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113 | * Use the shared implementations of the following routines |
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114 | */ |
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115 | char *save_boot_params( |
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116 | void *r3, |
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117 | void *r4, |
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118 | void *r5, |
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119 | char *cmdline_start, |
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120 | char *cmdline_end |
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121 | ) |
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122 | { |
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123 | |
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124 | strncpy(cmdline_buf, cmdline_start, CMDLINE_BUF_SIZE); |
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125 | cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0'; |
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126 | return cmdline_buf; |
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127 | } |
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128 | |
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129 | #define CS_CONFIG_CS_EN (1<<31) |
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130 | #define CS_BNDS_SA(x) ((((uint32_t)(x))>>(31-15)) & 0xff) |
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131 | #define CS_BNDS_EA(x) ((((uint32_t)(x))>>(31-31)) & 0xff) |
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132 | |
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133 | static inline uint32_t |
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134 | _ccsr_rd32(uint32_t off) |
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135 | { |
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136 | return in_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off) ); |
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137 | } |
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138 | |
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139 | static inline void |
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140 | _ccsr_wr32(uint32_t off, uint32_t val) |
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141 | { |
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142 | out_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off), val ); |
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143 | } |
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144 | |
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145 | |
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146 | STATIC uint32_t |
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147 | BSP_get_mem_size( void ) |
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148 | { |
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149 | int i; |
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150 | uint32_t cs_bnds, cs_config; |
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151 | uint32_t memsz=0; |
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152 | uint32_t v; |
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153 | |
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154 | for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) { |
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155 | if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) { |
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156 | v = _ccsr_rd32( cs_bnds ); |
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157 | |
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158 | memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1; |
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159 | } |
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160 | } |
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161 | return memsz << 24; |
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162 | } |
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163 | |
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164 | STATIC void |
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165 | BSP_calc_freqs( void ) |
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166 | { |
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167 | uint32_t porpllsr = _ccsr_rd32( 0xe0000 ); |
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168 | unsigned plat_ratio = (porpllsr >> (31-30)) & 0x1f; |
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169 | unsigned e500_ratio = (porpllsr >> (31-15)) & 0x3f; |
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170 | |
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171 | switch ( plat_ratio ) { |
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172 | case 2: case 3: case 4: case 5: case 6: |
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173 | case 8: case 9: case 10: case 12: case 16: |
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174 | /* supported ratios */ |
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175 | BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio; |
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176 | break; |
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177 | |
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178 | default: |
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179 | rtems_panic("Unknown PLL sys-clock ratio; something's wrong here"); |
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180 | } |
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181 | |
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182 | switch ( e500_ratio ) { |
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183 | case 4: case 5: case 6: case 7: |
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184 | BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1; |
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185 | break; |
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186 | |
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187 | default: |
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188 | rtems_panic("Unknown PLL e500-clock ratio; something's wrong here"); |
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189 | } |
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190 | |
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191 | printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency); |
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192 | printk("CPU Clock Freq: %10u Hz\n", BSP_processor_frequency); |
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193 | } |
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194 | |
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195 | uint32_t _CPU_Counter_frequency(void) |
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196 | { |
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197 | return BSP_bus_frequency / (BSP_time_base_divisor / 1000); |
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198 | } |
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199 | |
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200 | #include <libcpu/spr.h> |
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201 | |
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202 | SPR_RW(HID1) |
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203 | |
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204 | static void bsp_early( void ) |
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205 | { |
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206 | unsigned char *stack; |
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207 | char *chpt; |
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208 | int i; |
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209 | ppc_cpu_id_t myCpu; |
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210 | ppc_cpu_revision_t myCpuRevision; |
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211 | E500_tlb_va_cache_t *tlb; |
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212 | |
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213 | VpdBufRec vpdData [] = { |
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214 | { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 }, |
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215 | { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 }, |
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216 | { key: BusClockHz, instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency) }, |
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217 | { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) }, |
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218 | { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) }, |
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219 | { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) }, |
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220 | VPD_END |
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221 | }; |
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222 | |
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223 | /* Intersperse messages with actions to help locate problems */ |
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224 | printk("-----------------------------------------\n"); |
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225 | |
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226 | /* |
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227 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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228 | * function store the result in global variables so that it can be used |
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229 | * later... |
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230 | */ |
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231 | myCpu = get_ppc_cpu_type(); |
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232 | myCpuRevision = get_ppc_cpu_revision(); |
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233 | |
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234 | printk("Welcome to %s\n", _RTEMS_version); |
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235 | printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100"); |
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236 | |
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237 | /* |
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238 | * the initial stack has aready been set to this value in start.S |
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239 | * so there is no need to set it in r1 again... It is just for info |
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240 | * so that It can be printed without accessing R1. |
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241 | */ |
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242 | asm volatile("mr %0, 1":"=r"(stack)); |
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243 | |
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244 | /* tag the bottom */ |
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245 | *((uint32_t*)stack) = 0; |
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246 | |
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247 | ppc_exc_initialize(); |
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248 | |
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249 | printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision); |
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250 | |
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251 | #ifdef SHOW_MORE_INIT_SETTINGS |
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252 | printk("Additionnal boot options are %s\n", BSP_commandline_string); |
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253 | printk("Initial system stack at %" PRIxPTR "\n", (uintptr_t) stack); |
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254 | #endif |
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255 | |
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256 | #ifdef SHOW_MORE_INIT_SETTINGS |
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257 | printk("Going to start PCI buses scanning and initialization\n"); |
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258 | #endif |
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259 | |
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260 | BSP_mem_size = BSP_get_mem_size(); |
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261 | |
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262 | { |
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263 | /* memory-select errors were disabled in 'start.S'; |
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264 | * motload has all TLBs mapping a possible larger area as |
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265 | * memory (not-guarded, caching-enabled) than actual physical |
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266 | * memory is available. |
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267 | * In case of speculative loads this may cause 'memory-select' errors |
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268 | * which seem to raise 'core_fault_in' (found no description in |
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269 | * the manual but I experienced this problem). |
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270 | * Such errors (if HID1[RFXE] is clear) may *stall* execution |
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271 | * leading to mysterious 'hangs'. |
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272 | * |
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273 | * Here we remove all mappings, re-enable memory-select |
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274 | * errors and make sure we enable HID1[RFXE] to avoid |
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275 | * stalls (since we don't implement handling individual |
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276 | * error-handling interrupts). |
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277 | */ |
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278 | |
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279 | /* enable machine check for bad bus errors */ |
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280 | _write_HID1( _read_HID1() | 0x20000 ); |
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281 | |
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282 | rtems_e500_initlb(); |
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283 | |
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284 | for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) { |
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285 | /* disable TLBs for caching-enabled, non-guarded areas |
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286 | * beyond physical memory |
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287 | */ |
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288 | if ( tlb->att.v |
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289 | && 0xa != (tlb->att.wimge & 0xa) |
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290 | && (tlb->va.va_epn<<12) >= BSP_mem_size ) { |
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291 | rtems_e500_clrtlb( E500_SELTLB_1 | i ); |
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292 | } |
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293 | } |
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294 | |
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295 | /* clear all pending memory errors */ |
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296 | _ccsr_wr32(0x2e40, 0xffffffff); |
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297 | /* enable checking for memory-select errors */ |
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298 | _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 ); |
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299 | } |
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300 | |
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301 | BSP_vpdRetrieveFields( vpdData ); |
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302 | |
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303 | printk("Board Type: %s (S/N %s)\n", |
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304 | BSP_productIdent[0] ? BSP_productIdent : "n/a", |
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305 | BSP_serialNumber[0] ? BSP_serialNumber : "n/a"); |
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306 | |
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307 | printk("External (=PCI Bus) Clock Freq "); |
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308 | if ( 0xdeadbeef == BSP_pci_bus_frequency ) { |
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309 | BSP_pci_bus_frequency = 66666666; |
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310 | printk(" NOT FOUND in VPD; using %10u Hz\n", |
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311 | BSP_pci_bus_frequency); |
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312 | } else { |
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313 | printk(": %10u Hz\n", |
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314 | BSP_pci_bus_frequency); |
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315 | } |
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316 | |
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317 | /* Calculate CPU and CCB bus freqs */ |
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318 | BSP_calc_freqs(); |
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319 | |
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320 | pci_initialize(); |
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321 | |
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322 | prether(BSP_enetAddr0, 0); |
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323 | prether(BSP_enetAddr1, 1); |
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324 | prether(BSP_enetAddr2, 2); |
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325 | |
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326 | /* need to tweak the motload setup */ |
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327 | BSP_motload_pci_fixup(); |
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328 | |
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329 | #ifdef SHOW_MORE_INIT_SETTINGS |
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330 | printk("Number of PCI buses found is : %d\n", pci_bus_count()); |
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331 | { |
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332 | BSP_pciConfigDump_early(); |
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333 | } |
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334 | #endif |
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335 | |
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336 | if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) { |
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337 | char *endp; |
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338 | uint32_t sz; |
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339 | chpt+=6 /* strlen("MEMSZ=") */; |
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340 | sz = strtoul(chpt, &endp, 0); |
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341 | if ( endp != chpt ) |
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342 | BSP_mem_size = sz; |
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343 | } |
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344 | |
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345 | printk("Memory: %10u bytes\n", BSP_mem_size); |
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346 | |
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347 | BSP_bus_frequency = 333333333; |
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348 | BSP_processor_frequency = 833333333; |
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349 | BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */ |
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350 | |
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351 | /* clear hostbridge errors but leave MCP disabled - |
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352 | * PCI config space scanning code will trip otherwise :-( |
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353 | */ |
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354 | _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/); |
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355 | |
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356 | bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000); |
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357 | |
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358 | /* |
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359 | * Initalize RTEMS IRQ system |
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360 | */ |
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361 | BSP_rtems_irq_mng_init(0); |
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362 | |
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363 | if (1) { |
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364 | int i; |
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365 | unsigned msr,tcr; |
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366 | asm volatile("mfmsr %0":"=r"(msr)); |
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367 | asm volatile("mftcr %0":"=r"(tcr)); |
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368 | printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr); |
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369 | asm volatile("mttcr %0"::"r"(0)); |
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370 | if (0) { |
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371 | asm volatile("mtmsr %0"::"r"(msr|0x8000)); |
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372 | for (i=0; i<12; i++) |
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373 | BSP_enable_irq_at_pic(i); |
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374 | printk("IRQS enabled\n"); |
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375 | } |
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376 | } |
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377 | |
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378 | if (0) { |
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379 | unsigned x; |
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380 | asm volatile("mfivpr %0":"=r"(x)); |
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381 | printk("IVPR: 0x%08x\n",x); |
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382 | asm volatile("mfivor8 %0":"=r"(x)); |
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383 | printk("IVOR8: 0x%08x\n",x); |
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384 | printk("0x%08x\n",*(unsigned *)0xc00); |
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385 | printk("0x%08x\n",*(unsigned *)0xc04); |
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386 | printk("0x%08x\n",*(unsigned *)0xc08); |
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387 | printk("0x%08x\n\n\n",*(unsigned *)0xc0c); |
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388 | if (0) { |
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389 | *(unsigned *)0xc08 = 0x4c000064; |
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390 | asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00)); |
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391 | } |
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392 | |
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393 | printk("0x%08x\n", ppc_exc_lock_std); |
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394 | printk("0x%08x\n", ppc_exc_gpr3_std); |
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395 | |
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396 | asm volatile("sc"); |
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397 | |
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398 | printk("0x%08x\n", ppc_exc_lock_std); |
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399 | printk("0x%08x\n", ppc_exc_gpr3_std); |
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400 | } |
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401 | |
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402 | printk("-----------------------------------------\n"); |
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403 | |
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404 | #ifdef SHOW_MORE_INIT_SETTINGS |
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405 | printk("Exit from bspstart\n"); |
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406 | #endif |
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407 | } |
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408 | |
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409 | RTEMS_SYSINIT_ITEM( |
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410 | bsp_early, |
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411 | RTEMS_SYSINIT_BSP_EARLY, |
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412 | RTEMS_SYSINIT_ORDER_MIDDLE |
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413 | ); |
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414 | |
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415 | void bsp_start( void ) |
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416 | { |
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417 | /* Initialization was done by bsp_early() */ |
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418 | } |
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419 | |
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420 | static void mvme3100_i2c_initialize(void) |
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421 | { |
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422 | BSP_i2c_initialize(); |
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423 | } |
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424 | |
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425 | RTEMS_SYSINIT_ITEM( |
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426 | mvme3100_i2c_initialize, |
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427 | RTEMS_SYSINIT_BSP_PRE_DRIVERS, |
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428 | RTEMS_SYSINIT_ORDER_MIDDLE |
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429 | ); |
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430 | |
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431 | RTEMS_SYSINIT_ITEM( |
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432 | BSP_vme_config, |
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433 | RTEMS_SYSINIT_BSP_PRE_DRIVERS, |
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434 | RTEMS_SYSINIT_ORDER_MIDDLE |
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435 | ); |
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