source: rtems/bsps/powerpc/mvme3100/start/bspstart.c @ e78c0806

5
Last change on this file since e78c0806 was 34a7a12f, checked in by Sebastian Huber <sebastian.huber@…>, on 12/12/19 at 15:02:19

bsps: Add RTEMS_SYSINIT_BSP_EARLY

Add new BSP system initialization step for work to be performed before
the work areas are initialized.

Update #3838.

  • Property mode set to 100644
File size: 11.2 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  Modified for mvme3100 by T. Straumann
17 */
18
19#include <string.h>
20#include <stdlib.h>
21#include <inttypes.h>
22
23#include <rtems.h>
24#include <bsp.h>
25#include <bsp/bootcard.h>
26#include <rtems/bspIo.h>
27#include <rtems/counter.h>
28#include <rtems/sysinit.h>
29#include <libcpu/spr.h>
30#include <libcpu/io.h>
31#include <libcpu/e500_mmu.h>
32#include <bsp/uart.h>
33#include <bsp/irq.h>
34#include <bsp/pci.h>
35#include <bsp/vpd.h>
36#include <libcpu/cpuIdent.h>
37#include <bsp/vectors.h>
38#include <bsp/VME.h>
39#include <rtems/powerpc/powerpc.h>
40
41#define SHOW_MORE_INIT_SETTINGS
42#undef  DEBUG
43
44#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
45
46#ifdef  DEBUG
47#define STATIC
48#else
49#define STATIC static
50#endif
51
52extern unsigned long __rtems_end[];
53extern unsigned      ppc_exc_lock_std, ppc_exc_gpr3_std;
54
55/*
56 * Copy Additional boot param passed by boot loader
57 */
58#define CMDLINE_BUF_SIZE  2048
59
60static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
61char *BSP_commandline_string         = cmdline_buf;
62
63/*
64 * Vital Board data Start using DATA RESIDUAL
65 */
66uint32_t bsp_clicks_per_usec         = 0;
67/*
68 * Total memory using RESIDUAL DATA
69 */
70unsigned int BSP_mem_size            = 0;
71/*
72 * PCI Bus Frequency
73 */
74unsigned int BSP_pci_bus_frequency   = 0xdeadbeef;
75/*
76 * PPC Bus Frequency
77 */
78unsigned int BSP_bus_frequency       = 0;
79/*
80 * processor clock frequency
81 */
82unsigned int BSP_processor_frequency = 0;
83/*
84 * Time base divisior (how many tick for 1 second).
85 */
86unsigned int BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
87
88/* Board identification string */
89char BSP_productIdent[20]            = {0};
90char BSP_serialNumber[20]            = {0};
91
92/* VPD appends an extra char -- what for ? */
93char BSP_enetAddr0[7]                = {0};
94char BSP_enetAddr1[7]                = {0};
95char BSP_enetAddr2[7]                = {0};
96
97static void
98prether(char *b, int idx)
99{
100int i;
101  printk("Ethernet %i                  %02X", idx, *b++);
102  for ( i=0; i<5; i++ )
103    printk(":%02X",*b++);
104  printk("\n");
105}
106
107BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
108BSP_polling_getchar_function_type BSP_poll_char = NULL;
109
110char *rtems_progname;
111
112/*
113 *  Use the shared implementations of the following routines
114 */
115char *save_boot_params(
116  void *r3,
117  void *r4,
118  void *r5,
119  char *cmdline_start,
120  char *cmdline_end
121)
122{
123
124  strncpy(cmdline_buf, cmdline_start, CMDLINE_BUF_SIZE);
125  cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
126  return cmdline_buf;
127}
128
129#define CS_CONFIG_CS_EN (1<<31)
130#define CS_BNDS_SA(x)  ((((uint32_t)(x))>>(31-15)) & 0xff)
131#define CS_BNDS_EA(x)  ((((uint32_t)(x))>>(31-31)) & 0xff)
132
133static inline uint32_t
134_ccsr_rd32(uint32_t off)
135{
136  return in_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off) );
137}
138
139static inline void
140_ccsr_wr32(uint32_t off, uint32_t val)
141{
142  out_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off), val );
143}
144
145
146STATIC uint32_t
147BSP_get_mem_size( void )
148{
149  int i;
150  uint32_t  cs_bnds, cs_config;
151  uint32_t  memsz=0;
152  uint32_t  v;
153
154  for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
155    if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
156      v = _ccsr_rd32( cs_bnds );
157
158      memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
159    }
160  }
161  return memsz << 24;
162}
163
164STATIC void
165BSP_calc_freqs( void )
166{
167  uint32_t  porpllsr   = _ccsr_rd32( 0xe0000 );
168  unsigned  plat_ratio = (porpllsr >> (31-30)) & 0x1f;
169  unsigned    e500_ratio = (porpllsr >> (31-15)) & 0x3f;
170
171  switch ( plat_ratio ) {
172    case  2: case  3: case  4: case  5: case  6:
173    case  8: case  9: case 10: case 12: case 16:
174    /* supported ratios */
175      BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
176    break;
177
178    default:
179      rtems_panic("Unknown PLL sys-clock ratio; something's wrong here");
180  }
181
182  switch ( e500_ratio ) {
183    case 4: case 5: case 6: case 7:
184      BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
185    break;
186
187    default:
188      rtems_panic("Unknown PLL e500-clock ratio; something's wrong here");
189  }
190
191  printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
192  printk("CPU Clock Freq:                    %10u Hz\n", BSP_processor_frequency);
193}
194
195uint32_t _CPU_Counter_frequency(void)
196{
197  return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
198}
199
200#include <libcpu/spr.h>
201
202SPR_RW(HID1)
203
204static void bsp_early( void )
205{
206  unsigned char       *stack;
207  char                *chpt;
208  int                  i;
209  ppc_cpu_id_t         myCpu;
210  ppc_cpu_revision_t   myCpuRevision;
211  E500_tlb_va_cache_t *tlb;
212
213VpdBufRec          vpdData [] = {
214 { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
215 { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
216 { key: BusClockHz,   instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency)  },
217 { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
218 { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
219 { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
220 VPD_END
221};
222
223  /* Intersperse messages with actions to help locate problems */
224  printk("-----------------------------------------\n");
225
226  /*
227   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
228   * function store the result in global variables so that it can be used
229   * later...
230   */
231  myCpu = get_ppc_cpu_type();
232  myCpuRevision = get_ppc_cpu_revision();
233
234  printk("Welcome to %s\n", _RTEMS_version);
235  printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
236
237  /*
238   * the initial stack  has aready been set to this value in start.S
239   * so there is no need to set it in r1 again... It is just for info
240   * so that It can be printed without accessing R1.
241   */
242  asm volatile("mr %0, 1":"=r"(stack));
243
244  /* tag the bottom */
245  *((uint32_t*)stack) = 0;
246
247  ppc_exc_initialize();
248
249  printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
250
251#ifdef SHOW_MORE_INIT_SETTINGS
252  printk("Additionnal boot options are %s\n", BSP_commandline_string);
253  printk("Initial system stack at %" PRIxPTR "\n", (uintptr_t) stack);
254#endif
255
256#ifdef SHOW_MORE_INIT_SETTINGS
257  printk("Going to start PCI buses scanning and initialization\n");
258#endif
259
260  BSP_mem_size            = BSP_get_mem_size();
261
262  {
263    /* memory-select errors were disabled in 'start.S';
264     * motload has all TLBs mapping a possible larger area as
265     * memory (not-guarded, caching-enabled) than actual physical
266     * memory is available.
267     * In case of speculative loads this may cause 'memory-select' errors
268     * which seem to raise 'core_fault_in' (found no description in
269     * the manual but I experienced this problem).
270     * Such errors (if HID1[RFXE] is clear) may *stall* execution
271     * leading to mysterious 'hangs'.
272     *
273     * Here we remove all mappings, re-enable memory-select
274     * errors and make sure we enable HID1[RFXE] to avoid
275     * stalls (since we don't implement handling individual
276     * error-handling interrupts).
277     */
278
279    /* enable machine check for bad bus errors */
280    _write_HID1( _read_HID1() | 0x20000 );
281
282    rtems_e500_initlb();
283
284    for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
285      /* disable TLBs for caching-enabled, non-guarded areas
286       * beyond physical memory
287       */
288      if (    tlb->att.v
289          &&  0xa != (tlb->att.wimge & 0xa)
290        &&  (tlb->va.va_epn<<12) >= BSP_mem_size ) {
291        rtems_e500_clrtlb( E500_SELTLB_1 | i );
292      }
293    }
294
295    /* clear all pending memory errors */
296    _ccsr_wr32(0x2e40, 0xffffffff);
297    /* enable checking for memory-select errors */
298    _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
299  }
300
301  BSP_vpdRetrieveFields( vpdData );
302
303  printk("Board Type: %s (S/N %s)\n",
304      BSP_productIdent[0] ? BSP_productIdent : "n/a",
305      BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
306
307  printk("External (=PCI Bus) Clock Freq   ");
308  if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
309    BSP_pci_bus_frequency  = 66666666;
310    printk(" NOT FOUND in VPD; using %10u Hz\n",
311        BSP_pci_bus_frequency);
312  } else {
313    printk(": %10u Hz\n",
314        BSP_pci_bus_frequency);
315  }
316
317  /* Calculate CPU and CCB bus freqs */
318  BSP_calc_freqs();
319
320  pci_initialize();
321
322  prether(BSP_enetAddr0, 0);
323  prether(BSP_enetAddr1, 1);
324  prether(BSP_enetAddr2, 2);
325
326  /* need to tweak the motload setup */
327  BSP_motload_pci_fixup();
328
329#ifdef SHOW_MORE_INIT_SETTINGS
330  printk("Number of PCI buses found is : %d\n", pci_bus_count());
331  {
332    BSP_pciConfigDump_early();
333  }
334#endif
335
336  if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
337    char    *endp;
338    uint32_t   sz;
339    chpt+=6 /* strlen("MEMSZ=") */;
340    sz = strtoul(chpt, &endp, 0);
341    if ( endp != chpt )
342      BSP_mem_size = sz;
343  }
344
345  printk("Memory:                            %10u bytes\n", BSP_mem_size);
346
347  BSP_bus_frequency       = 333333333;
348  BSP_processor_frequency = 833333333;
349  BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
350
351  /* clear hostbridge errors but leave MCP disabled -
352   * PCI config space scanning code will trip otherwise :-(
353   */
354  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
355
356  bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
357
358  /*
359   * Initalize RTEMS IRQ system
360   */
361  BSP_rtems_irq_mng_init(0);
362
363  if (1) {
364    int i;
365    unsigned msr,tcr;
366    asm volatile("mfmsr %0":"=r"(msr));
367    asm volatile("mftcr %0":"=r"(tcr));
368    printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
369    asm volatile("mttcr %0"::"r"(0));
370    if (0) {
371      asm volatile("mtmsr %0"::"r"(msr|0x8000));
372      for (i=0; i<12; i++)
373        BSP_enable_irq_at_pic(i);
374      printk("IRQS enabled\n");
375    }
376  }
377
378  if (0) {
379    unsigned x;
380    asm volatile("mfivpr %0":"=r"(x));
381    printk("IVPR: 0x%08x\n",x);
382    asm volatile("mfivor8 %0":"=r"(x));
383    printk("IVOR8: 0x%08x\n",x);
384    printk("0x%08x\n",*(unsigned *)0xc00);
385    printk("0x%08x\n",*(unsigned *)0xc04);
386    printk("0x%08x\n",*(unsigned *)0xc08);
387    printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
388    if (0) {
389      *(unsigned *)0xc08 = 0x4c000064;
390      asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
391    }
392
393    printk("0x%08x\n", ppc_exc_lock_std);
394    printk("0x%08x\n", ppc_exc_gpr3_std);
395
396    asm volatile("sc");
397
398    printk("0x%08x\n", ppc_exc_lock_std);
399    printk("0x%08x\n", ppc_exc_gpr3_std);
400  }
401
402  printk("-----------------------------------------\n");
403
404#ifdef SHOW_MORE_INIT_SETTINGS
405  printk("Exit from bspstart\n");
406#endif
407}
408
409RTEMS_SYSINIT_ITEM(
410  bsp_early,
411  RTEMS_SYSINIT_BSP_EARLY,
412  RTEMS_SYSINIT_ORDER_MIDDLE
413);
414
415void bsp_start( void )
416{
417  /* Initialization was done by bsp_early() */
418}
419
420static void mvme3100_i2c_initialize(void)
421{
422  BSP_i2c_initialize();
423}
424
425RTEMS_SYSINIT_ITEM(
426  mvme3100_i2c_initialize,
427  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
428  RTEMS_SYSINIT_ORDER_MIDDLE
429);
430
431RTEMS_SYSINIT_ITEM(
432  BSP_vme_config,
433  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
434  RTEMS_SYSINIT_ORDER_MIDDLE
435);
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