source: rtems/bsps/powerpc/mvme3100/start/bspstart.c @ 54d87f2

5
Last change on this file since 54d87f2 was 54d87f2, checked in by Sebastian Huber <sebastian.huber@…>, on 09/04/18 at 16:28:57

bsps/powerpc: Simplify ppc_exc_initialize()

Remove parameters from ppc_exc_initialize() since all BSPs passed the
same values.

Update #3459.

  • Property mode set to 100644
File size: 11.1 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  Modified for mvme3100 by T. Straumann
17 */
18
19#include <string.h>
20#include <stdlib.h>
21#include <inttypes.h>
22
23#include <rtems.h>
24#include <bsp.h>
25#include <bsp/bootcard.h>
26#include <rtems/bspIo.h>
27#include <rtems/counter.h>
28#include <rtems/sysinit.h>
29#include <libcpu/spr.h>
30#include <libcpu/io.h>
31#include <libcpu/e500_mmu.h>
32#include <bsp/uart.h>
33#include <bsp/irq.h>
34#include <bsp/pci.h>
35#include <bsp/vpd.h>
36#include <libcpu/cpuIdent.h>
37#include <bsp/vectors.h>
38#include <bsp/VME.h>
39#include <rtems/powerpc/powerpc.h>
40
41#define SHOW_MORE_INIT_SETTINGS
42#undef  DEBUG
43
44#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
45
46#ifdef  DEBUG
47#define STATIC
48#else
49#define STATIC static
50#endif
51
52extern unsigned long __rtems_end[];
53extern unsigned      ppc_exc_lock_std, ppc_exc_gpr3_std;
54
55/*
56 * Copy Additional boot param passed by boot loader
57 */
58#define CMDLINE_BUF_SIZE  2048
59
60static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
61char *BSP_commandline_string         = cmdline_buf;
62
63/*
64 * Vital Board data Start using DATA RESIDUAL
65 */
66uint32_t bsp_clicks_per_usec         = 0;
67/*
68 * Total memory using RESIDUAL DATA
69 */
70unsigned int BSP_mem_size            = 0;
71/*
72 * PCI Bus Frequency
73 */
74unsigned int BSP_pci_bus_frequency   = 0xdeadbeef;
75/*
76 * PPC Bus Frequency
77 */
78unsigned int BSP_bus_frequency       = 0;
79/*
80 * processor clock frequency
81 */
82unsigned int BSP_processor_frequency = 0;
83/*
84 * Time base divisior (how many tick for 1 second).
85 */
86unsigned int BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
87
88/* Board identification string */
89char BSP_productIdent[20]            = {0};
90char BSP_serialNumber[20]            = {0};
91
92/* VPD appends an extra char -- what for ? */
93char BSP_enetAddr0[7]                = {0};
94char BSP_enetAddr1[7]                = {0};
95char BSP_enetAddr2[7]                = {0};
96
97static void
98prether(char *b, int idx)
99{
100int i;
101  printk("Ethernet %i                  %02X", idx, *b++);
102  for ( i=0; i<5; i++ )
103    printk(":%02X",*b++);
104  printk("\n");
105}
106
107BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
108BSP_polling_getchar_function_type BSP_poll_char = NULL;
109
110char *rtems_progname;
111
112/*
113 *  Use the shared implementations of the following routines
114 */
115char *save_boot_params(
116  void *r3,
117  void *r4,
118  void *r5,
119  char *cmdline_start,
120  char *cmdline_end
121)
122{
123
124  strncpy(cmdline_buf, cmdline_start, CMDLINE_BUF_SIZE);
125  cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
126  return cmdline_buf;
127}
128
129#define CS_CONFIG_CS_EN (1<<31)
130#define CS_BNDS_SA(x)  ((((uint32_t)(x))>>(31-15)) & 0xff)
131#define CS_BNDS_EA(x)  ((((uint32_t)(x))>>(31-31)) & 0xff)
132
133static inline uint32_t
134_ccsr_rd32(uint32_t off)
135{
136  return in_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off) );
137}
138
139static inline void
140_ccsr_wr32(uint32_t off, uint32_t val)
141{
142  out_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off), val );
143}
144
145
146STATIC uint32_t
147BSP_get_mem_size( void )
148{
149  int i;
150  uint32_t  cs_bnds, cs_config;
151  uint32_t  memsz=0;
152  uint32_t  v;
153
154  for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
155    if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
156      v = _ccsr_rd32( cs_bnds );
157
158      memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
159    }
160  }
161  return memsz << 24;
162}
163
164STATIC void
165BSP_calc_freqs( void )
166{
167  uint32_t  porpllsr   = _ccsr_rd32( 0xe0000 );
168  unsigned  plat_ratio = (porpllsr >> (31-30)) & 0x1f;
169  unsigned    e500_ratio = (porpllsr >> (31-15)) & 0x3f;
170
171  switch ( plat_ratio ) {
172    case  2: case  3: case  4: case  5: case  6:
173    case  8: case  9: case 10: case 12: case 16:
174    /* supported ratios */
175      BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
176    break;
177
178    default:
179      rtems_panic("Unknown PLL sys-clock ratio; something's wrong here");
180  }
181
182  switch ( e500_ratio ) {
183    case 4: case 5: case 6: case 7:
184      BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
185    break;
186
187    default:
188      rtems_panic("Unknown PLL e500-clock ratio; something's wrong here");
189  }
190
191  printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
192  printk("CPU Clock Freq:                    %10u Hz\n", BSP_processor_frequency);
193}
194
195uint32_t _CPU_Counter_frequency(void)
196{
197  return BSP_bus_frequency / (BSP_time_base_divisor / 1000);
198}
199
200/*
201 *  bsp_start
202 *
203 *  This routine does the bulk of the system initialization.
204 */
205
206#include <libcpu/spr.h>
207
208SPR_RW(HID1)
209
210void bsp_start( void )
211{
212  unsigned char       *stack;
213  char                *chpt;
214  int                  i;
215  ppc_cpu_id_t         myCpu;
216  ppc_cpu_revision_t   myCpuRevision;
217  E500_tlb_va_cache_t *tlb;
218
219VpdBufRec          vpdData [] = {
220 { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
221 { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
222 { key: BusClockHz,   instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency)  },
223 { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
224 { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
225 { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
226 VPD_END
227};
228
229  /* Intersperse messages with actions to help locate problems */
230  printk("-----------------------------------------\n");
231
232  /*
233   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
234   * function store the result in global variables so that it can be used
235   * later...
236   */
237  myCpu = get_ppc_cpu_type();
238  myCpuRevision = get_ppc_cpu_revision();
239
240  printk("Welcome to %s\n", _RTEMS_version);
241  printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
242
243  /*
244   * the initial stack  has aready been set to this value in start.S
245   * so there is no need to set it in r1 again... It is just for info
246   * so that It can be printed without accessing R1.
247   */
248  asm volatile("mr %0, 1":"=r"(stack));
249
250  /* tag the bottom */
251  *((uint32_t*)stack) = 0;
252
253  ppc_exc_initialize();
254
255  printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
256
257#ifdef SHOW_MORE_INIT_SETTINGS
258  printk("Additionnal boot options are %s\n", BSP_commandline_string);
259  printk("Initial system stack at %" PRIxPTR "\n", (uintptr_t) stack);
260#endif
261
262#ifdef SHOW_MORE_INIT_SETTINGS
263  printk("Going to start PCI buses scanning and initialization\n");
264#endif
265
266  BSP_mem_size            = BSP_get_mem_size();
267
268  {
269    /* memory-select errors were disabled in 'start.S';
270     * motload has all TLBs mapping a possible larger area as
271     * memory (not-guarded, caching-enabled) than actual physical
272     * memory is available.
273     * In case of speculative loads this may cause 'memory-select' errors
274     * which seem to raise 'core_fault_in' (found no description in
275     * the manual but I experienced this problem).
276     * Such errors (if HID1[RFXE] is clear) may *stall* execution
277     * leading to mysterious 'hangs'.
278     *
279     * Here we remove all mappings, re-enable memory-select
280     * errors and make sure we enable HID1[RFXE] to avoid
281     * stalls (since we don't implement handling individual
282     * error-handling interrupts).
283     */
284
285    /* enable machine check for bad bus errors */
286    _write_HID1( _read_HID1() | 0x20000 );
287
288    rtems_e500_initlb();
289
290    for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
291      /* disable TLBs for caching-enabled, non-guarded areas
292       * beyond physical memory
293       */
294      if (    tlb->att.v
295          &&  0xa != (tlb->att.wimge & 0xa)
296        &&  (tlb->va.va_epn<<12) >= BSP_mem_size ) {
297        rtems_e500_clrtlb( E500_SELTLB_1 | i );
298      }
299    }
300
301    /* clear all pending memory errors */
302    _ccsr_wr32(0x2e40, 0xffffffff);
303    /* enable checking for memory-select errors */
304    _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
305  }
306
307  BSP_vpdRetrieveFields( vpdData );
308
309  printk("Board Type: %s (S/N %s)\n",
310      BSP_productIdent[0] ? BSP_productIdent : "n/a",
311      BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
312
313  printk("External (=PCI Bus) Clock Freq   ");
314  if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
315    BSP_pci_bus_frequency  = 66666666;
316    printk(" NOT FOUND in VPD; using %10u Hz\n",
317        BSP_pci_bus_frequency);
318  } else {
319    printk(": %10u Hz\n",
320        BSP_pci_bus_frequency);
321  }
322
323  /* Calculate CPU and CCB bus freqs */
324  BSP_calc_freqs();
325
326  pci_initialize();
327
328  prether(BSP_enetAddr0, 0);
329  prether(BSP_enetAddr1, 1);
330  prether(BSP_enetAddr2, 2);
331
332  /* need to tweak the motload setup */
333  BSP_motload_pci_fixup();
334
335#ifdef SHOW_MORE_INIT_SETTINGS
336  printk("Number of PCI buses found is : %d\n", pci_bus_count());
337  {
338    BSP_pciConfigDump_early();
339  }
340#endif
341
342  if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
343    char    *endp;
344    uint32_t   sz;
345    chpt+=6 /* strlen("MEMSZ=") */;
346    sz = strtoul(chpt, &endp, 0);
347    if ( endp != chpt )
348      BSP_mem_size = sz;
349  }
350
351  printk("Memory:                            %10u bytes\n", BSP_mem_size);
352
353  BSP_bus_frequency       = 333333333;
354  BSP_processor_frequency = 833333333;
355  BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
356
357  /* clear hostbridge errors but leave MCP disabled -
358   * PCI config space scanning code will trip otherwise :-(
359   */
360  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
361
362  bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
363
364  /*
365   * Initalize RTEMS IRQ system
366   */
367  BSP_rtems_irq_mng_init(0);
368
369  if (1) {
370    int i;
371    unsigned msr,tcr;
372    asm volatile("mfmsr %0":"=r"(msr));
373    asm volatile("mftcr %0":"=r"(tcr));
374    printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
375    asm volatile("mttcr %0"::"r"(0));
376    if (0) {
377      asm volatile("mtmsr %0"::"r"(msr|0x8000));
378      for (i=0; i<12; i++)
379        BSP_enable_irq_at_pic(i);
380      printk("IRQS enabled\n");
381    }
382  }
383
384  if (0) {
385    unsigned x;
386    asm volatile("mfivpr %0":"=r"(x));
387    printk("IVPR: 0x%08x\n",x);
388    asm volatile("mfivor8 %0":"=r"(x));
389    printk("IVOR8: 0x%08x\n",x);
390    printk("0x%08x\n",*(unsigned *)0xc00);
391    printk("0x%08x\n",*(unsigned *)0xc04);
392    printk("0x%08x\n",*(unsigned *)0xc08);
393    printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
394    if (0) {
395      *(unsigned *)0xc08 = 0x4c000064;
396      asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
397    }
398
399    printk("0x%08x\n", ppc_exc_lock_std);
400    printk("0x%08x\n", ppc_exc_gpr3_std);
401
402    asm volatile("sc");
403
404    printk("0x%08x\n", ppc_exc_lock_std);
405    printk("0x%08x\n", ppc_exc_gpr3_std);
406  }
407
408  printk("-----------------------------------------\n");
409
410#ifdef SHOW_MORE_INIT_SETTINGS
411  printk("Exit from bspstart\n");
412#endif
413}
414
415static void mvme3100_i2c_initialize(void)
416{
417  BSP_i2c_initialize();
418}
419
420RTEMS_SYSINIT_ITEM(
421  mvme3100_i2c_initialize,
422  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
423  RTEMS_SYSINIT_ORDER_MIDDLE
424);
425
426RTEMS_SYSINIT_ITEM(
427  BSP_vme_config,
428  RTEMS_SYSINIT_BSP_PRE_DRIVERS,
429  RTEMS_SYSINIT_ORDER_MIDDLE
430);
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