1 | /** |
---|
2 | * @file |
---|
3 | * |
---|
4 | * @ingroup powerpc_irq |
---|
5 | * |
---|
6 | * @brief This include file describe the data structure and the functions |
---|
7 | * implemented by RTEMS to write interrupt handlers. |
---|
8 | */ |
---|
9 | |
---|
10 | /* irq.h |
---|
11 | * |
---|
12 | * This include file describe the data structure and the functions implemented |
---|
13 | * by RTEMS to write interrupt handlers. |
---|
14 | * |
---|
15 | * Copyright (C) 1999 valette@crf.canon.fr |
---|
16 | * |
---|
17 | * This code is heavilly inspired by the public specification of STREAM V2 |
---|
18 | * that can be found at : |
---|
19 | * |
---|
20 | * <http://www.chorus.com/Documentation/index.html> by following |
---|
21 | * the STREAM API Specification Document link. |
---|
22 | * |
---|
23 | * The license and distribution terms for this file may be |
---|
24 | * found in the file LICENSE in this distribution or at |
---|
25 | * http://www.rtems.org/license/LICENSE. |
---|
26 | * |
---|
27 | * Adapted for the mvme3100 BSP by T. Straumann, 2007. |
---|
28 | */ |
---|
29 | |
---|
30 | #ifndef BSP_POWERPC_IRQ_H |
---|
31 | #define BSP_POWERPC_IRQ_H |
---|
32 | |
---|
33 | #define BSP_SHARED_HANDLER_SUPPORT 1 |
---|
34 | #include <rtems/irq.h> |
---|
35 | |
---|
36 | #ifndef ASM |
---|
37 | |
---|
38 | #ifdef __cplusplus |
---|
39 | extern "C" { |
---|
40 | #endif |
---|
41 | |
---|
42 | /** |
---|
43 | * @defgroup powerpc_irq Definitions |
---|
44 | * |
---|
45 | * @ingroup powerpc_mvme3100 |
---|
46 | * |
---|
47 | * @brief rtems_irq_number Definitions |
---|
48 | */ |
---|
49 | |
---|
50 | /* Must pad number of external sources to 16 because |
---|
51 | * of the layout of vector/priority registers in the |
---|
52 | * 8540's openpic where there is a gap between |
---|
53 | * registers corresponding to external and core sources. |
---|
54 | */ |
---|
55 | #define BSP_EXT_IRQ_NUMBER (16) |
---|
56 | #define BSP_CORE_IRQ_NUMBER (32) |
---|
57 | |
---|
58 | /* openpic glue code from shared/irq assigns priorities and configures |
---|
59 | * initial ISRs for BSP_PCI_IRQ_NUMBER entries (plus ISA stuff on legacy |
---|
60 | * boards). Hence PCI_IRQ_NUMBER must also cover the internal sources |
---|
61 | * even though they have nothing to do with PCI. |
---|
62 | */ |
---|
63 | #define BSP_PCI_IRQ_NUMBER (BSP_EXT_IRQ_NUMBER + BSP_CORE_IRQ_NUMBER) |
---|
64 | #define BSP_PCI_IRQ_LOWEST_OFFSET (0) |
---|
65 | #define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) |
---|
66 | |
---|
67 | #define BSP_CORE_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_EXT_IRQ_NUMBER) |
---|
68 | #define BSP_CORE_IRQ_MAX_OFFSET (BSP_CORE_IRQ_LOWEST_OFFSET + BSP_CORE_IRQ_NUMBER - 1) |
---|
69 | |
---|
70 | /* |
---|
71 | * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt |
---|
72 | * handler might be connected |
---|
73 | */ |
---|
74 | #define BSP_PROCESSOR_IRQ_NUMBER (1) |
---|
75 | #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CORE_IRQ_MAX_OFFSET + 1) |
---|
76 | #define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) |
---|
77 | /* Misc vectors for OPENPIC irqs (IPI, timers) |
---|
78 | */ |
---|
79 | #define BSP_MISC_IRQ_NUMBER (8) |
---|
80 | #define BSP_MISC_IRQ_LOWEST_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) |
---|
81 | #define BSP_MISC_IRQ_MAX_OFFSET (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1) |
---|
82 | /* |
---|
83 | * Summary |
---|
84 | */ |
---|
85 | #define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1) |
---|
86 | #define BSP_LOWEST_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET) |
---|
87 | #define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET) |
---|
88 | |
---|
89 | /* |
---|
90 | * Some PCI IRQ symbolic name definition |
---|
91 | */ |
---|
92 | #define BSP_PCI_IRQ0 (BSP_PCI_IRQ_LOWEST_OFFSET) |
---|
93 | |
---|
94 | #define BSP_VME0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 0) |
---|
95 | #define BSP_VME1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1) |
---|
96 | #define BSP_VME2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2) |
---|
97 | #define BSP_VME3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3) |
---|
98 | |
---|
99 | #define BSP_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8) |
---|
100 | #define BSP_TEMP_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9) |
---|
101 | #define BSP_PHY_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10) |
---|
102 | #define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 11) |
---|
103 | |
---|
104 | /* Weird - they provide 3 different IRQ lines per ethernet controller |
---|
105 | * but only one shared line for 2 UARTs ??? |
---|
106 | */ |
---|
107 | #define BSP_UART_COM1_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 26) |
---|
108 | #define BSP_UART_COM2_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 26) |
---|
109 | #define BSP_I2C_IRQ (BSP_CORE_IRQ_LOWEST_OFFSET + 27) |
---|
110 | |
---|
111 | /* |
---|
112 | * Some internal (CORE) name definitions |
---|
113 | */ |
---|
114 | /* Ethernet (FEC) */ |
---|
115 | #define BSP_CORE_IRQ_FEC (BSP_CORE_IRQ_LOWEST_OFFSET + 25) |
---|
116 | /* i2c controller */ |
---|
117 | #define BSP_CORE_IRQ_I2C (BSP_CORE_IRQ_LOWEST_OFFSET + 27) |
---|
118 | |
---|
119 | /* |
---|
120 | * Some Processor execption handled as RTEMS IRQ symbolic name definition |
---|
121 | */ |
---|
122 | #define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) |
---|
123 | |
---|
124 | /*-------------------------------------------------------------------------+ |
---|
125 | | Function Prototypes. |
---|
126 | +--------------------------------------------------------------------------*/ |
---|
127 | |
---|
128 | extern void BSP_rtems_irq_mng_init(unsigned cpuId); |
---|
129 | |
---|
130 | #include <bsp/irq_supp.h> |
---|
131 | |
---|
132 | #ifdef __cplusplus |
---|
133 | }; |
---|
134 | #endif |
---|
135 | |
---|
136 | #endif |
---|
137 | #endif |
---|