source: rtems/bsps/powerpc/mvme3100/include/bsp.h @ 2afb22b

5
Last change on this file since 2afb22b was 2afb22b, checked in by Chris Johns <chrisj@…>, on Dec 23, 2017 at 7:18:56 AM

Remove make preinstall

A speciality of the RTEMS build system was the make preinstall step. It
copied header files from arbitrary locations into the build tree. The
header files were included via the -Bsome/build/tree/path GCC command
line option.

This has at least seven problems:

  • The make preinstall step itself needs time and disk space.
  • Errors in header files show up in the build tree copy. This makes it hard for editors to open the right file to fix the error.
  • There is no clear relationship between source and build tree header files. This makes an audit of the build process difficult.
  • The visibility of all header files in the build tree makes it difficult to enforce API barriers. For example it is discouraged to use BSP-specifics in the cpukit.
  • An introduction of a new build system is difficult.
  • Include paths specified by the -B option are system headers. This may suppress warnings.
  • The parallel build had sporadic failures on some hosts.

This patch removes the make preinstall step. All installed header
files are moved to dedicated include directories in the source tree.
Let @RTEMS_CPU@ be the target architecture, e.g. arm, powerpc, sparc,
etc. Let @RTEMS_BSP_FAMILIY@ be a BSP family base directory, e.g.
erc32, imx, qoriq, etc.

The new cpukit include directories are:

  • cpukit/include
  • cpukit/score/cpu/@RTEMS_CPU@/include
  • cpukit/libnetworking

The new BSP include directories are:

  • bsps/include
  • bsps/@RTEMS_CPU@/include
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILIY@/include

There are build tree include directories for generated files.

The include directory order favours the most general header file, e.g.
it is not possible to override general header files via the include path
order.

The "bootstrap -p" option was removed. The new "bootstrap -H" option
should be used to regenerate the "headers.am" files.

Update #3254.

  • Property mode set to 100644
File size: 11.9 KB
Line 
1/**
2 *  @file
3 *
4 *  @ingroup mvme3100_bsp
5 *
6 *  @brief This file contains BSP API definition.
7 */
8
9/*
10 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.org/license/LICENSE.
15 *
16 *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
17 */
18#ifndef LIBBSP_POWERPC_MVME3100_BSP_H
19#define LIBBSP_POWERPC_MVME3100_BSP_H
20
21#ifndef ASM
22
23#include <bspopts.h>
24#include <bsp/default-initial-extension.h>
25
26#include <rtems.h>
27#include <libcpu/io.h>
28#include <bsp/vectors.h>
29
30/**
31 *  @defgroup mvme3100_bsp confdefs.h overrides
32 *
33 *  @ingroup powerpc_mvme3100
34 *
35 *  @brief confdefs.h overrides for this BSP:
36 */
37
38#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
39
40/*
41 * diagram illustrating the role of the configuration
42 * constants
43 *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
44 *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
45 *                       address being 'visible' or not!).
46 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
47 * _VME_A32_WIN0_ON_VME: VME address of that same window
48 *
49 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
50 * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
51 * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
52 * the base address read from PCI config.space in order to translate that
53 * into a CPU address.
54 *
55 * NOTE: VME addresses should NEVER be translated using these constants!
56 *       they are strictly for BSP internal use. Drivers etc. should use
57 *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
58 *
59 *           CPU ADDR                  PCI_ADDR                                VME ADDR
60 *
61 *           00000000                  XXXXXXXX                                XXXXXXXX
62 *    ^  ^   ........
63 *    |  |
64 *    |  |  e.g., RAM                  XXXXXXXX
65 *    |  |                                                                     00000000
66 *    |  |  .........                                                          ^
67 *    |  |            (possible offset                                         |
68 *    |  |             between pci and XXXXXXXX                                | ......
69 *    |  |             cpu addresses)                                          |
70 *    |  v                                                                     |
71 *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
72 *    |     ........                   ........               ^                |
73 *    |                                invisible              |                |
74 *    |     ........                   from CPU               |                |
75 *    v                                                       |                |
76 *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
77 *                                                            |                |
78 *        pci devices   pci window                            |                |
79 *       visible here                                         v                v
80 *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
81 *                                                 vme window
82 *        VME devices   hostbridge                 mapped by
83 *       visible here                              universe
84 *                    =====================================================
85 *
86 */
87
88/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
89#define _IO_BASE            0xe0000000 /* Motload's PCI IO base */
90#define _ISA_MEM_BASE           CHRP_ISA_MEM_BASE
91/* address of our ram on the PCI bus   */
92#define PCI_DRAM_OFFSET         CHRP_PCI_DRAM_OFFSET
93/* offset of pci memory as seen from the CPU */
94#define PCI_MEM_BASE            0
95/* where (in CPU addr. space) does the PCI window start */
96#define PCI_MEM_WIN0            0x80000000
97
98/*
99 *  Base address definitions for several devices
100 */
101
102#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
103#define BSP_OPEN_PIC_BIG_ENDIAN
104
105#define BSP_8540_CCSR_BASE   (0xe1000000)
106
107#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500)
108#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
109#define PCI_CONFIG_ADDR      (BSP_8540_CCSR_BASE+0x8000)
110#define PCI_CONFIG_DATA      (BSP_8540_CCSR_BASE+0x8004)
111#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((uint32_t*)(addr), (val))
112
113#define BSP_CONSOLE_PORT        BSP_UART_COM1
114#define BSP_UART_BAUD_BASE      (-9600) /* use existing divisor to determine clock rate */
115#define BSP_UART_USE_SHARED_IRQS
116
117#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
118
119/* I2C Devices */
120/* Note that the i2c addresses stated in the manual are
121 * left-shifted by one bit.
122 */
123#define BSP_VPD_I2C_ADDR                        (0xA8>>1)               /* the VPD EEPROM  */
124#define BSP_USR0_I2C_ADDR                       (0xA4>>1)               /* the 1st user EEPROM */
125#define BSP_USR1_I2C_ADDR                       (0xA6>>1)               /* the 2nd user EEPROM */
126#define BSP_THM_I2C_ADDR                        (0x90>>1)               /* the DS1621 temperature sensor & thermostat */
127#define BSP_RTC_I2C_ADDR                        (0xD0>>1)               /* the DS1375 wall-clock */
128
129#define BSP_I2C_BUS_DESCRIPTOR          mpc8540_i2c_bus_descriptor
130
131#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
132
133#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
134#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
135#define BSP_I2C_USR1_EEPROM_NAME      "usr1-eeprom"
136#define BSP_I2C_DS1621_NAME           "ds1621"
137#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
138#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
139#define BSP_I2C_DS1375_RAW_NAME       "ds1375-raw"
140#define BSP_I2C_RTC_RAW_NAME          BSP_I2C_DS1375_RAW_NAME
141
142#define BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
143#define BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
144#define BSP_I2C_USR1_EEPROM_DEV_NAME     (BSP_I2C_BUS0_NAME"."BSP_I2C_USR1_EEPROM_NAME)
145#define BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
146#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
147#define BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
148#define BSP_I2C_DS1375_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1375_RAW_NAME)
149
150/* Definitions useful for bootloader (netboot); where to find
151 * boot/'environment' parameters.
152 */
153#define BSP_EEPROM_BOOTPARMS_NAME        BSP_I2C_USR1_EEPROM_DEV_NAME
154#define BSP_EEPROM_BOOTPARMS_SIZE        1024
155#define BSP_EEPROM_BOOTPARMS_OFFSET      0
156#define BSP_BOOTPARMS_WRITE_ENABLE()     do { BSP_eeprom_write_enable(); } while (0)
157#define BSP_BOOTPARMS_WRITE_DISABLE()    do { BSP_eeprom_write_protect();} while (0)
158
159
160#ifdef __cplusplus
161extern "C" {
162#endif
163/* Initialize the I2C driver and register all devices
164 * RETURNS 0 on success, -1 on error.
165 *
166 * Access to the VPD and user EEPROMS as well
167 * as the ds1621 temperature sensor is possible
168 * by means of file nodes
169 *
170 *   /dev/i2c0.vpd-eeprom   (read-only)
171 *   /dev/i2c0.usr-eeprom   (read-write)
172 *   /dev/i2c0.usr1-eeprom  (read-write)
173 *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
174 *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
175 *   /dev/i2c0.ds1375-raw   (read-write; transfer bytes to/from the ds1375)
176 *
177 */
178int BSP_i2c_initialize(void);
179#define BSP_PREDRIVER_I2C_INIT
180
181/* System Control Register */
182#define BSP_MVME3100_SYS_CR                             ((volatile uint8_t *)0xe2000001)
183#define BSP_MVME3100_SYS_CR_RESET_MSK           (7<<5)
184#define BSP_MVME3100_SYS_CR_RESET                       (5<<5)
185#define BSP_MVME3100_SYS_CR_EEPROM_WP           (1<<1)
186#define BSP_MVME3100_SYS_CR_TSTAT_MSK           (1<<0)
187
188/* LED support */
189#define BSP_MVME3100_SYS_IND_REG                ((volatile uint8_t *)0xe2000002)
190#define BSP_LED_BRD_FAIL                                        (1<<0)
191#define BSP_LED_USR1                                            (1<<1)
192#define BSP_LED_USR2                                            (1<<2)
193#define BSP_LED_USR3                                            (1<<3)
194
195/* Flash CSR   */
196#define BSP_MVME3100_FLASH_CSR                  ((volatile uint8_t *)0xe2000003)
197#define BSP_MVME3100_FLASH_CSR_FLASH_RDY        (1<<0)
198#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL      (1<<1)
199#define BSP_MVME3100_FLASH_CSR_F_WP_HW          (1<<2)
200#define BSP_MVME3100_FLASH_CSR_F_WP_SW          (1<<3)
201#define BSP_MVME3100_FLASH_CSR_MAP_SEL          (1<<4)
202
203/* Phy interrupt detect */
204#define BSP_MVME3100_IRQ_DETECT_REG             ((volatile uint8_t *)0xe2000007)
205
206/* Atomically set bits in a sys-register; The bits set in 'mask'
207 * are set in the register others; are left unmodified.
208 *
209 * RETURNS: old state.
210 *
211 * NOTE   : since BSP_setSysReg( reg, 0 ) does not make
212 *          any changes this call may be used
213 *          to read the current status w/o modifying it.
214 */
215uint8_t BSP_setSysReg(volatile uint8_t *r, uint8_t mask);
216
217/* Atomically clear bits in a sys-register; The bits set in 'mask'
218 * are cleared in the register; others are left unmodified.
219 *
220 * RETURNS: old state.
221 *
222 * NOTE   : since BSP_clrSysReg( reg, 0 ) does not make
223 *          any changes this call may be used
224 *          to read the current status w/o modifying it.
225 */
226
227uint8_t BSP_clrSysReg(volatile uint8_t *r, uint8_t mask);
228
229/* Convenience wrappers around BSP_setSysReg()/BSP_clrSysReg() */
230
231/* Set write-protection for all EEPROM devices
232 * RETURNS: old status
233 */
234uint8_t BSP_eeprom_write_protect(void);
235
236/* Disengage write-protection for all EEPROM devices
237 * RETURNS: old status
238 */
239uint8_t BSP_eeprom_write_enable(void);
240
241/* Set LEDs that have their bit set in the mask
242 *
243 * RETURNS: old status.
244 *
245 * NOTE   : since BSP_setLEDs( 0 ) does not make
246 *          any changes this call may be used
247 *          to read the current status w/o modifying it.
248 */
249uint8_t BSP_setLEDs(uint8_t mask);
250
251/* Clear LEDs that have their bit set in the mask
252 *
253 * RETURNS: old status
254 *
255 * NOTE:  : see above (BSP_setLEDs)
256 */
257uint8_t BSP_clrLEDs(uint8_t mask);
258
259#if 0
260#define outport_byte(port,value) outb(value,port)
261#define outport_word(port,value) outw(value,port)
262#define outport_long(port,value) outl(value,port)
263
264#define inport_byte(port,value) (value = inb(port))
265#define inport_word(port,value) (value = inw(port))
266#define inport_long(port,value) (value = inl(port))
267#endif
268
269/*
270 * Total memory using RESIDUAL DATA
271 */
272extern unsigned int BSP_mem_size;
273/*
274 * PCI Bus Frequency
275 */
276extern unsigned int BSP_bus_frequency;
277/*
278 * processor clock frequency
279 */
280extern unsigned int BSP_processor_frequency;
281/*
282 * Time base divisior (how many tick for 1 second).
283 */
284extern unsigned int BSP_time_base_divisor;
285/*
286 * The commandline as passed from the bootloader.
287 */
288extern char *BSP_commandline_string;
289
290#define BSP_Convert_decrementer( _value ) \
291  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
292
293extern rtems_configuration_table  BSP_Configuration;
294/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
295extern int BSP_disconnect_clock_handler (void);
296extern int BSP_connect_clock_handler (void);
297
298/* clear hostbridge errors
299 *
300 * NOTE: The routine returns always (-1) if 'enableMCP==1'
301 *       [semantics needed by libbspExt] if the MCP input is not wired.
302 *       It returns and clears the error bits of the PCI status register.
303 *       MCP support is disabled because:
304 *         a) the 2100 has no raven chip
305 *         b) the raven (2300) would raise machine check interrupts
306 *            on PCI config space access to empty slots.
307 */
308extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
309extern void BSP_motload_pci_fixup(void);
310
311struct rtems_bsdnet_ifconfig;
312
313int
314rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching);
315
316#define RTEMS_BSP_NETWORK_DRIVER_NAME   "tse1"
317#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach
318
319/*
320 * Prototypes for methods called only from .S for dependency tracking
321 */
322char *save_boot_params(
323  void *r3,
324  void *r4,
325  void *r5,
326  char *cmdline_start,
327  char *cmdline_end
328);
329void zero_bss(void);
330
331/*
332 * Prototypes for methods in the BSP that cross file boundaries
333 */
334extern void BSP_vme_config(void);
335extern void BSP_pciConfigDump_early( void );
336
337#ifdef __cplusplus
338}
339#endif
340
341#endif /* !ASM */
342
343#endif
Note: See TracBrowser for help on using the repository browser.