1 | /* start.S |
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2 | * |
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3 | * Modified for the Motorola PQII ADS board by |
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4 | * Andy Dachs <a.dachs@sstl.co.uk> 23-11-00. |
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5 | * Surrey Satellite Technology Limited |
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6 | * |
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7 | * I have a proprietary bootloader programmed into the flash |
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8 | * on the board which initialises the SDRAM prior to calling |
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9 | * this function. |
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10 | * |
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11 | * This file is based on the one by Jay Monkman (jmonkman@fracsa.com) |
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12 | * which in turn was based on the dlentry.s file for the Papyrus BSP, |
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13 | * written by: |
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14 | * |
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15 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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16 | * |
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17 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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18 | * |
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19 | * To anyone who acknowledges that this file is provided "AS IS" |
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20 | * without any express or implied warranty: |
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21 | * permission to use, copy, modify, and distribute this file |
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22 | * for any purpose is hereby granted without fee, provided that |
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23 | * the above copyright notice and this notice appears in all |
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24 | * copies, and that the name of i-cubed limited not be used in |
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25 | * advertising or publicity pertaining to distribution of the |
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26 | * software without specific, written prior permission. |
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27 | * i-cubed limited makes no representations about the suitability |
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28 | * of this software for any purpose. |
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29 | * |
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30 | */ |
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31 | |
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32 | #include <rtems/asm.h> |
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33 | |
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34 | /* |
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35 | * The initial stack is set to run BELOW the code base address. |
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36 | * (between the vectors and text sections) |
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37 | * |
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38 | * The entry veneer has to clear the BSS and copy the read only |
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39 | * version of the data segment to the correct location. |
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40 | */ |
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41 | |
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42 | .section ".entry" /* This might have to be the first thing in the |
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43 | * text section. At one time, it had to be |
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44 | * first, but I don't believe it is true |
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45 | * any more. */ |
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46 | PUBLIC_VAR (start) |
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47 | SYM(start): |
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48 | bl .startup |
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49 | base_addr: |
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50 | |
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51 | /* |
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52 | * Parameters from linker |
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53 | */ |
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54 | toc_pointer: |
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55 | .long s.got |
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56 | bss_length: |
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57 | .long bss.size |
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58 | bss_addr: |
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59 | .long bss.start |
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60 | |
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61 | PUBLIC_VAR (data_length ) |
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62 | data_length: |
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63 | .long data.size |
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64 | PUBLIC_VAR (data_addr ) |
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65 | data_addr: |
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66 | .long data.start |
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67 | |
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68 | PUBLIC_VAR (text_addr) |
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69 | text_addr: |
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70 | .long text.start |
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71 | |
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72 | PUBLIC_VAR (text_length) |
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73 | text_length: |
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74 | .long text.size |
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75 | |
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76 | /* |
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77 | * Initialization code |
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78 | */ |
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79 | .startup: |
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80 | /* Get start address */ |
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81 | mflr r1 |
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82 | |
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83 | /* -------------------------------------------------- |
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84 | * Clear MSR[EE] to disable interrupts |
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85 | * Clear MSR[IP] bit to put vectors at 0x00000000 |
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86 | * Set MSR[FP] to enable FPU - not on my eval board! |
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87 | * -------------------------------------------------- */ |
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88 | mfmsr r5 |
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89 | lis r13, 0xFFFF |
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90 | ori r13, r13, 0x7FBF |
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91 | and r5, r5, r13 /* Clear EE and IP */ |
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92 | #if 1 |
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93 | ori r5, r5, 0x2000 /* Enable FPU */ |
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94 | #endif |
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95 | mtmsr r5 |
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96 | |
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97 | #ifdef ENABLE_CACHE |
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98 | /* Enable caches */ |
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99 | mfspr r5, 1008 |
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100 | ori r5, r5, 0x8000 |
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101 | isync |
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102 | mtspr 1008, r5 |
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103 | |
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104 | /* Leave D-cache disabled for now */ |
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105 | #if 0 |
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106 | ori r5, r5, 0x4000 |
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107 | sync |
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108 | mtspr 1008, r5 |
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109 | #endif |
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110 | #endif |
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111 | |
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112 | /*-------------------------------------------------- |
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113 | * Set up the power management modes |
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114 | * The 8260 has a dynamic power management mode that |
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115 | * is automatically invoked if the unit is idle. |
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116 | * We invoke the NAP mode in the RTEMS idle task. |
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117 | *-------------------------------------------------- */ |
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118 | |
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119 | lis r13, 0x0050 /* set nap mode and DPM */ |
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120 | or r5, r5, r13 |
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121 | mtspr 1008, r5 |
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122 | |
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123 | /*-------------------------------------------------- |
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124 | * |
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125 | *-------------------------------------------------- */ |
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126 | |
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127 | /* clear the bss section */ |
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128 | bl bssclr |
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129 | |
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130 | /* |
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131 | * C_setup. |
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132 | */ |
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133 | |
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134 | /* set toc */ |
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135 | lwz r2, toc_pointer-base_addr(r1) |
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136 | |
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137 | /* Set up stack pointer = beginning of text section - 56 */ |
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138 | addi r1, r1, -56-4 |
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139 | |
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140 | /* Clear cmdline */ |
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141 | xor r3, r3, r3 |
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142 | |
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143 | .extern SYM (boot_card) |
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144 | bl SYM (boot_card) /* call the first C routine */ |
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145 | |
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146 | /* we don't expect to return from boot_card but if we do */ |
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147 | /* wait here for watchdog to kick us into hard reset */ |
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148 | |
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149 | twiddle: |
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150 | b twiddle |
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151 | |
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152 | /* |
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153 | * bssclr - zero out bss |
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154 | */ |
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155 | bssclr: |
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156 | lwz r4, bss_addr-base_addr(r1) /* Start of bss */ |
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157 | lwz r5, bss_length-base_addr(r1) /* Length of bss */ |
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158 | |
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159 | rlwinm. r5,r5,30,0x3FFFFFFF /* form length/4 */ |
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160 | beqlr /* no bss */ |
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161 | mtctr r5 /* set ctr reg */ |
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162 | xor r6,r6,r6 /* r6 = 0 */ |
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163 | clear_bss: |
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164 | stswi r6,r4,0x4 /* store r6 */ |
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165 | addi r4,r4,0x4 /* update r2 */ |
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166 | |
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167 | bdnz clear_bss /* dec counter and loop */ |
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168 | blr /* return */ |
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