source: rtems/bsps/powerpc/mpc8260ads/start/start.S @ 84e59b7c

Last change on this file since 84e59b7c was 84e59b7c, checked in by Sebastian Huber <sebastian.huber@…>, on Nov 15, 2018 at 7:47:22 PM

bsps/powerpc: Use interrupt stack for init stack

Move start.o to separate file.

Update #3459.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*  start.S
2 *
3 *  Modified for the Motorola PQII ADS board by
4 *  Andy Dachs <a.dachs@sstl.co.uk> 23-11-00.
5 *  Surrey Satellite Technology Limited
6 *
7 *  I have a proprietary bootloader programmed into the flash
8 *  on the board which initialises the SDRAM prior to calling
9 *  this function.
10 *
11 *  This file is based on the one by Jay Monkman (jmonkman@fracsa.com)
12 *  which in turn was based on the dlentry.s file for the Papyrus BSP,
13 *  written by:
14 *
15 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
16 *
17 *  COPYRIGHT (c) 1995 by i-cubed ltd.
18 *
19 *  To anyone who acknowledges that this file is provided "AS IS"
20 *  without any express or implied warranty:
21 *      permission to use, copy, modify, and distribute this file
22 *      for any purpose is hereby granted without fee, provided that
23 *      the above copyright notice and this notice appears in all
24 *      copies, and that the name of i-cubed limited not be used in
25 *      advertising or publicity pertaining to distribution of the
26 *      software without specific, written prior permission.
27 *      i-cubed limited makes no representations about the suitability
28 *      of this software for any purpose.
29 *
30 */
31
32#include <rtems/asm.h>
33#include <libcpu/powerpc-utility.h>
34
35/*
36 *  The entry veneer has to clear the BSS and copy the read only
37 *  version of the data segment to the correct location.
38 */
39
40        .section ".entry"  /* This might have to be the first thing in the
41                            * text section. At one time, it had to be
42                            * first, but I don't believe it is true
43                            * any more. */
44        PUBLIC_VAR (start)
45SYM(start):
46        bl      .startup
47base_addr:
48
49/*
50 * Parameters from linker
51 */
52toc_pointer:
53        .long   s.got
54bss_length:
55        .long   bss.size
56bss_addr:
57        .long   bss.start
58
59PUBLIC_VAR (data_length )
60data_length:
61        .long   data.size
62PUBLIC_VAR (data_addr )
63data_addr:
64        .long   data.start
65
66PUBLIC_VAR (text_addr)
67text_addr:
68        .long   text.start
69
70PUBLIC_VAR (text_length)
71text_length:
72        .long   text.size
73
74/*
75 * Initialization code
76 */
77.startup:
78    /* Get start address */
79        mflr    r1
80
81    /* --------------------------------------------------
82     * Clear MSR[EE] to disable interrupts
83     * Clear MSR[IP] bit to put vectors at 0x00000000
84     * Set MSR[FP] to enable FPU - not on my eval board!
85     * -------------------------------------------------- */
86        mfmsr   r5
87        lis     r13, 0xFFFF
88        ori     r13, r13, 0x7FBF
89        and     r5, r5, r13                     /* Clear EE and IP */
90#if 1
91        ori     r5, r5, 0x2000                  /* Enable FPU */
92#endif
93        mtmsr   r5
94
95#ifdef ENABLE_CACHE
96        /* Enable caches */
97        mfspr   r5, 1008
98        ori     r5, r5, 0x8000
99        isync
100        mtspr   1008, r5
101
102/*      Leave D-cache disabled for now */
103#if 0
104        ori     r5, r5, 0x4000
105        sync
106        mtspr   1008, r5
107#endif
108#endif
109
110        /*--------------------------------------------------
111         * Set up the power management modes
112         * The 8260 has a dynamic power management mode that
113         * is automatically invoked if the unit is idle.
114         * We invoke the NAP mode in the RTEMS idle task.
115         *-------------------------------------------------- */
116
117        lis     r13, 0x0050     /* set nap mode and DPM */
118        or      r5, r5, r13
119        mtspr   1008, r5
120
121        /*--------------------------------------------------
122         *
123         *-------------------------------------------------- */
124
125        /* clear the bss section */
126        bl      bssclr
127
128/*
129 * C_setup.
130 */
131
132        /* set toc */
133        lwz r2, toc_pointer-base_addr(r1)
134
135        /* Clear cmdline */
136        li      r3, 0
137
138        /*
139         * Initialize start stack.  The stacks are statically allocated and
140         * properly aligned.
141         */
142        LA      r1, _ISR_Stack_area_end
143        subi    r1, r1, PPC_DEFAULT_CACHE_LINE_SIZE
144        stw     r3, 0(r1)
145
146        .extern SYM (boot_card)
147        bl       SYM (boot_card)        /* call the first C routine */
148
149        /* we don't expect to return from boot_card but if we do */
150        /* wait here for watchdog to kick us into hard reset     */
151
152twiddle:
153        b               twiddle
154
155/*
156 * bssclr - zero out bss
157 */
158bssclr:
159        lwz     r4, bss_addr-base_addr(r1)      /* Start of bss */
160        lwz     r5, bss_length-base_addr(r1)    /* Length of bss */
161
162        rlwinm. r5,r5,30,0x3FFFFFFF             /* form length/4 */
163        beqlr                                   /* no bss */
164        mtctr   r5                              /* set ctr reg */
165        xor     r6,r6,r6                        /* r6 = 0 */
166clear_bss:
167        stswi   r6,r4,0x4                       /* store r6 */
168        addi    r4,r4,0x4                       /* update r2 */
169
170        bdnz    clear_bss                       /* dec counter and loop */
171        blr                                     /* return */
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